Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 1 | /* |
Ronak Jain | 325bad1 | 2021-12-21 01:39:59 -0800 | [diff] [blame] | 2 | * Copyright (c) 2013-2022, ARM Limited and Contributors. All rights reserved. |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 3 | * |
dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | /* |
| 8 | * Top-level SMC handler for ZynqMP power management calls and |
| 9 | * IPI setup functions for communication with PMU. |
| 10 | */ |
| 11 | |
| 12 | #include <errno.h> |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 13 | |
| 14 | #include <common/runtime_svc.h> |
| 15 | #if ZYNQMP_WDT_RESTART |
| 16 | #include <arch_helpers.h> |
| 17 | #include <drivers/arm/gicv2.h> |
| 18 | #include <lib/mmio.h> |
| 19 | #include <lib/spinlock.h> |
| 20 | #include <plat/common/platform.h> |
| 21 | #endif |
| 22 | |
Jolly Shah | 0bfd700 | 2019-01-08 11:10:47 -0800 | [diff] [blame] | 23 | #include <plat_private.h> |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 24 | #include "pm_api_sys.h" |
| 25 | #include "pm_client.h" |
Ronak Jain | 325bad1 | 2021-12-21 01:39:59 -0800 | [diff] [blame] | 26 | #include "pm_defs.h" |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 27 | #include "pm_ipi.h" |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 28 | |
Rajan Vaja | 720fd9d | 2018-10-05 04:42:57 -0700 | [diff] [blame] | 29 | /* pm_up = !0 - UP, pm_up = 0 - DOWN */ |
| 30 | static int32_t pm_up, ipi_irq_flag; |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 31 | |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 32 | #if ZYNQMP_WDT_RESTART |
| 33 | static spinlock_t inc_lock; |
| 34 | static int active_cores = 0; |
| 35 | #endif |
| 36 | |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 37 | /** |
| 38 | * pm_context - Structure which contains data for power management |
| 39 | * @api_version version of PM API, must match with one on PMU side |
| 40 | * @payload payload array used to store received |
| 41 | * data from ipi buffer registers |
| 42 | */ |
| 43 | static struct { |
| 44 | uint32_t api_version; |
| 45 | uint32_t payload[PAYLOAD_ARG_CNT]; |
| 46 | } pm_ctx; |
| 47 | |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 48 | #if ZYNQMP_WDT_RESTART |
| 49 | /** |
| 50 | * trigger_wdt_restart() - Trigger warm restart event to APU cores |
| 51 | * |
| 52 | * This function triggers SGI for all active APU CPUs. SGI handler then |
| 53 | * power down CPU and call system reset. |
| 54 | */ |
| 55 | static void trigger_wdt_restart(void) |
| 56 | { |
| 57 | uint32_t core_count = 0; |
| 58 | uint32_t core_status[3]; |
| 59 | uint32_t target_cpu_list = 0; |
| 60 | int i; |
| 61 | |
| 62 | for (i = 0; i < 4; i++) { |
| 63 | pm_get_node_status(NODE_APU_0 + i, core_status); |
| 64 | if (core_status[0] == 1) { |
| 65 | core_count++; |
| 66 | target_cpu_list |= (1 << i); |
| 67 | } |
| 68 | } |
| 69 | |
| 70 | spin_lock(&inc_lock); |
| 71 | active_cores = core_count; |
| 72 | spin_unlock(&inc_lock); |
| 73 | |
| 74 | INFO("Active Cores: %d\n", active_cores); |
| 75 | |
Siva Durga Prasad Paladugu | 60bfbc9 | 2018-09-24 22:51:49 -0700 | [diff] [blame] | 76 | for (i = PLATFORM_CORE_COUNT - 1; i >= 0; i--) { |
| 77 | if (target_cpu_list & (1 << i)) { |
| 78 | /* trigger SGI to active cores */ |
| 79 | plat_ic_raise_el3_sgi(ARM_IRQ_SEC_SGI_7, i); |
| 80 | } |
| 81 | } |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 82 | } |
| 83 | |
| 84 | /** |
| 85 | * ttc_fiq_handler() - TTC Handler for timer event |
| 86 | * @id number of the highest priority pending interrupt of the type |
| 87 | * that this handler was registered for |
| 88 | * @flags security state, bit[0] |
| 89 | * @handler pointer to 'cpu_context' structure of the current CPU for the |
| 90 | * security state specified in the 'flags' parameter |
| 91 | * @cookie unused |
| 92 | * |
| 93 | * Function registered as INTR_TYPE_EL3 interrupt handler |
| 94 | * |
| 95 | * When WDT event is received in PMU, PMU needs to notify master to do cleanup |
| 96 | * if required. PMU sets up timer and starts timer to overflow in zero time upon |
| 97 | * WDT event. ATF handles this timer event and takes necessary action required |
| 98 | * for warm restart. |
| 99 | * |
| 100 | * In presence of non-secure software layers (EL1/2) sets the interrupt |
| 101 | * at registered entrance in GIC and informs that PMU responsed or demands |
| 102 | * action. |
| 103 | */ |
| 104 | static uint64_t ttc_fiq_handler(uint32_t id, uint32_t flags, void *handle, |
Michal Simek | 08341b7 | 2022-03-09 08:53:20 +0100 | [diff] [blame] | 105 | void *cookie) |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 106 | { |
| 107 | INFO("BL31: Got TTC FIQ\n"); |
| 108 | |
Siva Durga Prasad Paladugu | 60bfbc9 | 2018-09-24 22:51:49 -0700 | [diff] [blame] | 109 | plat_ic_end_of_interrupt(id); |
| 110 | |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 111 | /* Clear TTC interrupt by reading interrupt register */ |
| 112 | mmio_read_32(TTC3_INTR_REGISTER_1); |
| 113 | |
| 114 | /* Disable the timer interrupts */ |
| 115 | mmio_write_32(TTC3_INTR_ENABLE_1, 0); |
| 116 | |
| 117 | trigger_wdt_restart(); |
| 118 | |
| 119 | return 0; |
| 120 | } |
| 121 | |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 122 | /** |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 123 | * zynqmp_sgi7_irq() - Handler for SGI7 IRQ |
| 124 | * @id number of the highest priority pending interrupt of the type |
| 125 | * that this handler was registered for |
| 126 | * @flags security state, bit[0] |
| 127 | * @handler pointer to 'cpu_context' structure of the current CPU for the |
| 128 | * security state specified in the 'flags' parameter |
| 129 | * @cookie unused |
| 130 | * |
| 131 | * Function registered as INTR_TYPE_EL3 interrupt handler |
| 132 | * |
| 133 | * On receiving WDT event from PMU, ATF generates SGI7 to all running CPUs. |
| 134 | * In response to SGI7 interrupt, each CPUs do clean up if required and last |
| 135 | * running CPU calls system restart. |
| 136 | */ |
| 137 | static uint64_t __unused __dead2 zynqmp_sgi7_irq(uint32_t id, uint32_t flags, |
Michal Simek | 08341b7 | 2022-03-09 08:53:20 +0100 | [diff] [blame] | 138 | void *handle, void *cookie) |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 139 | { |
| 140 | int i; |
Will Wong | cc12795 | 2020-11-22 23:45:21 -0800 | [diff] [blame] | 141 | uint32_t value; |
| 142 | |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 143 | /* enter wfi and stay there */ |
| 144 | INFO("Entering wfi\n"); |
| 145 | |
| 146 | spin_lock(&inc_lock); |
| 147 | active_cores--; |
| 148 | |
| 149 | for (i = 0; i < 4; i++) { |
| 150 | mmio_write_32(BASE_GICD_BASE + GICD_CPENDSGIR + 4 * i, |
| 151 | 0xffffffff); |
| 152 | } |
| 153 | |
Tanmay Shah | 50702ba | 2022-09-13 11:10:08 -0700 | [diff] [blame] | 154 | dsb(); |
| 155 | |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 156 | spin_unlock(&inc_lock); |
| 157 | |
| 158 | if (active_cores == 0) { |
Will Wong | cc12795 | 2020-11-22 23:45:21 -0800 | [diff] [blame] | 159 | pm_mmio_read(PMU_GLOBAL_GEN_STORAGE4, &value); |
| 160 | value = (value & RESTART_SCOPE_MASK) >> RESTART_SCOPE_SHIFT; |
| 161 | pm_system_shutdown(PMF_SHUTDOWN_TYPE_RESET, value); |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 162 | } |
| 163 | |
| 164 | /* enter wfi and stay there */ |
| 165 | while (1) |
| 166 | wfi(); |
| 167 | } |
| 168 | |
| 169 | /** |
| 170 | * pm_wdt_restart_setup() - Setup warm restart interrupts |
| 171 | * |
| 172 | * This function sets up handler for SGI7 and TTC interrupts |
| 173 | * used for warm restart. |
| 174 | */ |
| 175 | static int pm_wdt_restart_setup(void) |
| 176 | { |
| 177 | int ret; |
| 178 | |
| 179 | /* register IRQ handler for SGI7 */ |
| 180 | ret = request_intr_type_el3(ARM_IRQ_SEC_SGI_7, zynqmp_sgi7_irq); |
| 181 | if (ret) { |
| 182 | WARN("BL31: registering SGI7 interrupt failed\n"); |
| 183 | goto err; |
| 184 | } |
| 185 | |
| 186 | ret = request_intr_type_el3(IRQ_TTC3_1, ttc_fiq_handler); |
| 187 | if (ret) |
| 188 | WARN("BL31: registering TTC3 interrupt failed\n"); |
| 189 | |
| 190 | err: |
| 191 | return ret; |
| 192 | } |
| 193 | #endif |
| 194 | |
| 195 | /** |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 196 | * pm_setup() - PM service setup |
| 197 | * |
| 198 | * @return On success, the initialization function must return 0. |
| 199 | * Any other return value will cause the framework to ignore |
| 200 | * the service |
| 201 | * |
| 202 | * Initialization functions for ZynqMP power management for |
| 203 | * communicaton with PMU. |
| 204 | * |
| 205 | * Called from sip_svc_setup initialization function with the |
| 206 | * rt_svc_init signature. |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 207 | */ |
Venkatesh Yadav Abbarapu | e7c4538 | 2022-05-19 14:49:49 +0530 | [diff] [blame] | 208 | int32_t pm_setup(void) |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 209 | { |
Venkatesh Yadav Abbarapu | e7c4538 | 2022-05-19 14:49:49 +0530 | [diff] [blame] | 210 | int32_t status, ret; |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 211 | |
Wendy Liang | 328105c | 2017-10-03 23:21:11 -0700 | [diff] [blame] | 212 | status = pm_ipi_init(primary_proc); |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 213 | |
Rajan Vaja | 720fd9d | 2018-10-05 04:42:57 -0700 | [diff] [blame] | 214 | ret = pm_get_api_version(&pm_ctx.api_version); |
| 215 | if (pm_ctx.api_version < PM_VERSION) { |
| 216 | ERROR("BL31: Platform Management API version error. Expected: " |
| 217 | "v%d.%d - Found: v%d.%d\n", PM_VERSION_MAJOR, |
| 218 | PM_VERSION_MINOR, pm_ctx.api_version >> 16, |
Venkatesh Yadav Abbarapu | a2ca35d | 2022-07-04 11:40:27 +0530 | [diff] [blame] | 219 | pm_ctx.api_version & 0xFFFFU); |
Rajan Vaja | 720fd9d | 2018-10-05 04:42:57 -0700 | [diff] [blame] | 220 | return -EINVAL; |
| 221 | } |
| 222 | |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 223 | #if ZYNQMP_WDT_RESTART |
| 224 | status = pm_wdt_restart_setup(); |
| 225 | if (status) |
| 226 | WARN("BL31: warm-restart setup failed\n"); |
| 227 | #endif |
| 228 | |
Wendy Liang | 328105c | 2017-10-03 23:21:11 -0700 | [diff] [blame] | 229 | if (status >= 0) { |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 230 | INFO("BL31: PM Service Init Complete: API v%d.%d\n", |
| 231 | PM_VERSION_MAJOR, PM_VERSION_MINOR); |
Wendy Liang | 328105c | 2017-10-03 23:21:11 -0700 | [diff] [blame] | 232 | ret = 0; |
| 233 | } else { |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 234 | INFO("BL31: PM Service Init Failed, Error Code %d!\n", status); |
Wendy Liang | 328105c | 2017-10-03 23:21:11 -0700 | [diff] [blame] | 235 | ret = status; |
| 236 | } |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 237 | |
Siva Durga Prasad Paladugu | 79f7595 | 2018-04-30 19:39:49 +0530 | [diff] [blame] | 238 | pm_up = !status; |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 239 | |
Wendy Liang | 328105c | 2017-10-03 23:21:11 -0700 | [diff] [blame] | 240 | return ret; |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 241 | } |
| 242 | |
| 243 | /** |
| 244 | * pm_smc_handler() - SMC handler for PM-API calls coming from EL1/EL2. |
| 245 | * @smc_fid - Function Identifier |
| 246 | * @x1 - x4 - Arguments |
| 247 | * @cookie - Unused |
| 248 | * @handler - Pointer to caller's context structure |
| 249 | * |
| 250 | * @return - Unused |
| 251 | * |
| 252 | * Determines that smc_fid is valid and supported PM SMC Function ID from the |
| 253 | * list of pm_api_ids, otherwise completes the request with |
| 254 | * the unknown SMC Function ID |
| 255 | * |
| 256 | * The SMC calls for PM service are forwarded from SIP Service SMC handler |
| 257 | * function with rt_svc_handle signature |
| 258 | */ |
| 259 | uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3, |
Venkatesh Yadav Abbarapu | 0386e65 | 2022-05-24 14:05:57 +0530 | [diff] [blame] | 260 | uint64_t x4, const void *cookie, void *handle, uint64_t flags) |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 261 | { |
| 262 | enum pm_ret_status ret; |
Ronak Jain | 52de594 | 2022-01-20 23:11:18 -0800 | [diff] [blame] | 263 | uint32_t payload[PAYLOAD_ARG_CNT]; |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 264 | |
Ronak Jain | f841467 | 2022-05-11 02:48:52 -0700 | [diff] [blame] | 265 | uint32_t pm_arg[5]; |
Ronak Jain | 52de594 | 2022-01-20 23:11:18 -0800 | [diff] [blame] | 266 | uint32_t result[PAYLOAD_ARG_CNT]; |
| 267 | uint32_t api_id; |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 268 | |
| 269 | /* Handle case where PM wasn't initialized properly */ |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 270 | if (pm_up == 0) |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 271 | SMC_RET1(handle, SMC_UNK); |
| 272 | |
| 273 | pm_arg[0] = (uint32_t)x1; |
| 274 | pm_arg[1] = (uint32_t)(x1 >> 32); |
| 275 | pm_arg[2] = (uint32_t)x2; |
| 276 | pm_arg[3] = (uint32_t)(x2 >> 32); |
Ronak Jain | 52de594 | 2022-01-20 23:11:18 -0800 | [diff] [blame] | 277 | pm_arg[4] = (uint32_t)x3; |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 278 | |
Ronak Jain | 52de594 | 2022-01-20 23:11:18 -0800 | [diff] [blame] | 279 | api_id = smc_fid & FUNCID_NUM_MASK; |
| 280 | |
| 281 | switch (api_id) { |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 282 | /* PM API Functions */ |
| 283 | case PM_SELF_SUSPEND: |
| 284 | ret = pm_self_suspend(pm_arg[0], pm_arg[1], pm_arg[2], |
| 285 | pm_arg[3]); |
| 286 | SMC_RET1(handle, (uint64_t)ret); |
| 287 | |
| 288 | case PM_REQ_SUSPEND: |
| 289 | ret = pm_req_suspend(pm_arg[0], pm_arg[1], pm_arg[2], |
| 290 | pm_arg[3]); |
| 291 | SMC_RET1(handle, (uint64_t)ret); |
| 292 | |
| 293 | case PM_REQ_WAKEUP: |
Filip Drazic | 78ba145 | 2017-02-07 12:03:57 +0100 | [diff] [blame] | 294 | { |
| 295 | /* Use address flag is encoded in the 1st bit of the low-word */ |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 296 | uint32_t set_addr = pm_arg[1] & 0x1U; |
| 297 | uint64_t address = (uint64_t)pm_arg[2] << 32U; |
Filip Drazic | 78ba145 | 2017-02-07 12:03:57 +0100 | [diff] [blame] | 298 | |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 299 | address |= pm_arg[1] & (~0x1U); |
Filip Drazic | 78ba145 | 2017-02-07 12:03:57 +0100 | [diff] [blame] | 300 | ret = pm_req_wakeup(pm_arg[0], set_addr, address, |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 301 | pm_arg[3]); |
| 302 | SMC_RET1(handle, (uint64_t)ret); |
Filip Drazic | 78ba145 | 2017-02-07 12:03:57 +0100 | [diff] [blame] | 303 | } |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 304 | |
| 305 | case PM_FORCE_POWERDOWN: |
| 306 | ret = pm_force_powerdown(pm_arg[0], pm_arg[1]); |
| 307 | SMC_RET1(handle, (uint64_t)ret); |
| 308 | |
| 309 | case PM_ABORT_SUSPEND: |
| 310 | ret = pm_abort_suspend(pm_arg[0]); |
| 311 | SMC_RET1(handle, (uint64_t)ret); |
| 312 | |
| 313 | case PM_SET_WAKEUP_SOURCE: |
| 314 | ret = pm_set_wakeup_source(pm_arg[0], pm_arg[1], pm_arg[2]); |
| 315 | SMC_RET1(handle, (uint64_t)ret); |
| 316 | |
| 317 | case PM_SYSTEM_SHUTDOWN: |
Soren Brinkmann | 58fbb9b | 2016-09-02 09:50:54 -0700 | [diff] [blame] | 318 | ret = pm_system_shutdown(pm_arg[0], pm_arg[1]); |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 319 | SMC_RET1(handle, (uint64_t)ret); |
| 320 | |
| 321 | case PM_REQ_NODE: |
| 322 | ret = pm_req_node(pm_arg[0], pm_arg[1], pm_arg[2], pm_arg[3]); |
| 323 | SMC_RET1(handle, (uint64_t)ret); |
| 324 | |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 325 | case PM_SET_REQUIREMENT: |
| 326 | ret = pm_set_requirement(pm_arg[0], pm_arg[1], pm_arg[2], |
| 327 | pm_arg[3]); |
| 328 | SMC_RET1(handle, (uint64_t)ret); |
| 329 | |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 330 | case PM_GET_API_VERSION: |
| 331 | /* Check is PM API version already verified */ |
Rajan Vaja | 720fd9d | 2018-10-05 04:42:57 -0700 | [diff] [blame] | 332 | if (pm_ctx.api_version >= PM_VERSION) { |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 333 | if (ipi_irq_flag == 0U) { |
Rajan Vaja | 720fd9d | 2018-10-05 04:42:57 -0700 | [diff] [blame] | 334 | /* |
| 335 | * Enable IPI IRQ |
| 336 | * assume the rich OS is OK to handle callback IRQs now. |
| 337 | * Even if we were wrong, it would not enable the IRQ in |
| 338 | * the GIC. |
| 339 | */ |
| 340 | pm_ipi_irq_enable(primary_proc); |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 341 | ipi_irq_flag = 1U; |
Rajan Vaja | 720fd9d | 2018-10-05 04:42:57 -0700 | [diff] [blame] | 342 | } |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 343 | SMC_RET1(handle, (uint64_t)PM_RET_SUCCESS | |
Rajan Vaja | 720fd9d | 2018-10-05 04:42:57 -0700 | [diff] [blame] | 344 | ((uint64_t)pm_ctx.api_version << 32)); |
Soren Brinkmann | a1b0a90 | 2016-09-30 11:30:21 -0700 | [diff] [blame] | 345 | } |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 346 | |
Nava kishore Manne | 68d460c | 2016-08-20 23:18:09 +0530 | [diff] [blame] | 347 | case PM_FPGA_LOAD: |
| 348 | ret = pm_fpga_load(pm_arg[0], pm_arg[1], pm_arg[2], pm_arg[3]); |
| 349 | SMC_RET1(handle, (uint64_t)ret); |
| 350 | |
| 351 | case PM_FPGA_GET_STATUS: |
| 352 | { |
| 353 | uint32_t value; |
| 354 | |
| 355 | ret = pm_fpga_get_status(&value); |
| 356 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32); |
| 357 | } |
| 358 | |
Siva Durga Prasad Paladugu | de93d98 | 2018-04-30 15:49:27 +0530 | [diff] [blame] | 359 | case PM_SECURE_RSA_AES: |
| 360 | ret = pm_secure_rsaaes(pm_arg[0], pm_arg[1], pm_arg[2], |
| 361 | pm_arg[3]); |
| 362 | SMC_RET1(handle, (uint64_t)ret); |
| 363 | |
Rajan Vaja | 02d1842 | 2019-03-04 11:09:39 +0530 | [diff] [blame] | 364 | case PM_GET_CALLBACK_DATA: |
Tejas Patel | f4c3a25 | 2020-01-29 22:06:12 -0800 | [diff] [blame] | 365 | pm_get_callbackdata(result, ARRAY_SIZE(result)); |
Rajan Vaja | 02d1842 | 2019-03-04 11:09:39 +0530 | [diff] [blame] | 366 | SMC_RET2(handle, |
| 367 | (uint64_t)result[0] | ((uint64_t)result[1] << 32), |
| 368 | (uint64_t)result[2] | ((uint64_t)result[3] << 32)); |
Rajan Vaja | 5529a01 | 2018-01-17 02:39:23 -0800 | [diff] [blame] | 369 | case PM_IOCTL: |
| 370 | { |
| 371 | uint32_t value; |
| 372 | |
| 373 | ret = pm_ioctl(pm_arg[0], pm_arg[1], pm_arg[2], |
| 374 | pm_arg[3], &value); |
| 375 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32); |
| 376 | } |
| 377 | |
Rajan Vaja | 3511613 | 2018-01-17 02:39:25 -0800 | [diff] [blame] | 378 | case PM_QUERY_DATA: |
| 379 | { |
Jolly Shah | 69fb5bf | 2018-02-07 16:25:41 -0800 | [diff] [blame] | 380 | uint32_t data[4] = { 0 }; |
Rajan Vaja | 3511613 | 2018-01-17 02:39:25 -0800 | [diff] [blame] | 381 | |
Rajan Vaja | cd82568 | 2020-11-23 21:33:39 -0800 | [diff] [blame] | 382 | pm_query_data(pm_arg[0], pm_arg[1], pm_arg[2], |
| 383 | pm_arg[3], data); |
Rajan Vaja | 3511613 | 2018-01-17 02:39:25 -0800 | [diff] [blame] | 384 | SMC_RET2(handle, (uint64_t)data[0] | ((uint64_t)data[1] << 32), |
| 385 | (uint64_t)data[2] | ((uint64_t)data[3] << 32)); |
| 386 | } |
| 387 | |
| 388 | case PM_CLOCK_ENABLE: |
| 389 | ret = pm_clock_enable(pm_arg[0]); |
| 390 | SMC_RET1(handle, (uint64_t)ret); |
| 391 | |
| 392 | case PM_CLOCK_DISABLE: |
| 393 | ret = pm_clock_disable(pm_arg[0]); |
| 394 | SMC_RET1(handle, (uint64_t)ret); |
| 395 | |
| 396 | case PM_CLOCK_GETSTATE: |
| 397 | { |
| 398 | uint32_t value; |
| 399 | |
| 400 | ret = pm_clock_getstate(pm_arg[0], &value); |
| 401 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32); |
| 402 | } |
| 403 | |
| 404 | case PM_CLOCK_SETDIVIDER: |
| 405 | ret = pm_clock_setdivider(pm_arg[0], pm_arg[1]); |
| 406 | SMC_RET1(handle, (uint64_t)ret); |
| 407 | |
| 408 | case PM_CLOCK_GETDIVIDER: |
| 409 | { |
| 410 | uint32_t value; |
| 411 | |
| 412 | ret = pm_clock_getdivider(pm_arg[0], &value); |
| 413 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32); |
| 414 | } |
| 415 | |
| 416 | case PM_CLOCK_SETRATE: |
| 417 | ret = pm_clock_setrate(pm_arg[0], |
| 418 | ((uint64_t)pm_arg[2]) << 32 | pm_arg[1]); |
| 419 | |
| 420 | SMC_RET1(handle, (uint64_t)ret); |
| 421 | |
| 422 | case PM_CLOCK_GETRATE: |
| 423 | { |
Ronak Jain | f841467 | 2022-05-11 02:48:52 -0700 | [diff] [blame] | 424 | uint64_t value = 0; |
Rajan Vaja | 3511613 | 2018-01-17 02:39:25 -0800 | [diff] [blame] | 425 | |
| 426 | ret = pm_clock_getrate(pm_arg[0], &value); |
Jolly Shah | 69fb5bf | 2018-02-07 16:25:41 -0800 | [diff] [blame] | 427 | SMC_RET2(handle, (uint64_t)ret | |
| 428 | (((uint64_t)value & 0xFFFFFFFFU) << 32U), |
| 429 | (value >> 32U) & 0xFFFFFFFFU); |
Rajan Vaja | 3511613 | 2018-01-17 02:39:25 -0800 | [diff] [blame] | 430 | |
| 431 | } |
| 432 | |
| 433 | case PM_CLOCK_SETPARENT: |
| 434 | ret = pm_clock_setparent(pm_arg[0], pm_arg[1]); |
| 435 | SMC_RET1(handle, (uint64_t)ret); |
| 436 | |
| 437 | case PM_CLOCK_GETPARENT: |
| 438 | { |
| 439 | uint32_t value; |
| 440 | |
| 441 | ret = pm_clock_getparent(pm_arg[0], &value); |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 442 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32U); |
Rajan Vaja | 3511613 | 2018-01-17 02:39:25 -0800 | [diff] [blame] | 443 | } |
| 444 | |
Rajan Vaja | c7ee23d | 2018-02-14 23:10:54 -0800 | [diff] [blame] | 445 | case PM_GET_TRUSTZONE_VERSION: |
| 446 | SMC_RET1(handle, (uint64_t)PM_RET_SUCCESS | |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 447 | ((uint64_t)ZYNQMP_TZ_VERSION << 32U)); |
Rajan Vaja | c7ee23d | 2018-02-14 23:10:54 -0800 | [diff] [blame] | 448 | |
Siva Durga Prasad Paladugu | 43b23a3 | 2018-04-27 16:26:47 +0530 | [diff] [blame] | 449 | case PM_SET_SUSPEND_MODE: |
| 450 | ret = pm_set_suspend_mode(pm_arg[0]); |
| 451 | SMC_RET1(handle, (uint64_t)ret); |
| 452 | |
Siva Durga Prasad Paladugu | f3994cc | 2018-05-01 11:12:55 +0530 | [diff] [blame] | 453 | case PM_SECURE_SHA: |
| 454 | ret = pm_sha_hash(pm_arg[0], pm_arg[1], pm_arg[2], |
| 455 | pm_arg[3]); |
| 456 | SMC_RET1(handle, (uint64_t)ret); |
| 457 | |
| 458 | case PM_SECURE_RSA: |
| 459 | ret = pm_rsa_core(pm_arg[0], pm_arg[1], pm_arg[2], |
| 460 | pm_arg[3]); |
| 461 | SMC_RET1(handle, (uint64_t)ret); |
| 462 | |
Siva Durga Prasad Paladugu | a4ed4b2 | 2018-04-30 20:06:58 +0530 | [diff] [blame] | 463 | case PM_SECURE_IMAGE: |
| 464 | { |
Siva Durga Prasad Paladugu | a4ed4b2 | 2018-04-30 20:06:58 +0530 | [diff] [blame] | 465 | ret = pm_secure_image(pm_arg[0], pm_arg[1], pm_arg[2], |
| 466 | pm_arg[3], &result[0]); |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 467 | SMC_RET2(handle, (uint64_t)ret | ((uint64_t)result[0] << 32U), |
Siva Durga Prasad Paladugu | a4ed4b2 | 2018-04-30 20:06:58 +0530 | [diff] [blame] | 468 | result[1]); |
| 469 | } |
| 470 | |
Siva Durga Prasad Paladugu | 7c6516a | 2018-09-04 17:41:34 +0530 | [diff] [blame] | 471 | case PM_FPGA_READ: |
| 472 | { |
| 473 | uint32_t value; |
| 474 | |
| 475 | ret = pm_fpga_read(pm_arg[0], pm_arg[1], pm_arg[2], pm_arg[3], |
| 476 | &value); |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 477 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32U); |
Siva Durga Prasad Paladugu | 7c6516a | 2018-09-04 17:41:34 +0530 | [diff] [blame] | 478 | } |
| 479 | |
Siva Durga Prasad Paladugu | 8bd905b | 2018-09-04 18:05:50 +0530 | [diff] [blame] | 480 | case PM_SECURE_AES: |
| 481 | { |
| 482 | uint32_t value; |
| 483 | |
| 484 | ret = pm_aes_engine(pm_arg[0], pm_arg[1], &value); |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 485 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32U); |
Siva Durga Prasad Paladugu | 8bd905b | 2018-09-04 18:05:50 +0530 | [diff] [blame] | 486 | } |
| 487 | |
Jolly Shah | a7cc5ee | 2019-01-02 12:27:00 -0800 | [diff] [blame] | 488 | case PM_PLL_SET_PARAMETER: |
| 489 | ret = pm_pll_set_parameter(pm_arg[0], pm_arg[1], pm_arg[2]); |
| 490 | SMC_RET1(handle, (uint64_t)ret); |
| 491 | |
Jolly Shah | cb2f45d | 2019-01-04 11:28:38 -0800 | [diff] [blame] | 492 | case PM_PLL_GET_PARAMETER: |
| 493 | { |
| 494 | uint32_t value; |
| 495 | |
| 496 | ret = pm_pll_get_parameter(pm_arg[0], pm_arg[1], &value); |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 497 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value << 32U)); |
Jolly Shah | cb2f45d | 2019-01-04 11:28:38 -0800 | [diff] [blame] | 498 | } |
| 499 | |
Jolly Shah | 1f0d585 | 2019-01-04 11:32:31 -0800 | [diff] [blame] | 500 | case PM_PLL_SET_MODE: |
| 501 | ret = pm_pll_set_mode(pm_arg[0], pm_arg[1]); |
| 502 | SMC_RET1(handle, (uint64_t)ret); |
| 503 | |
Jolly Shah | 141421e | 2019-01-04 11:35:48 -0800 | [diff] [blame] | 504 | case PM_PLL_GET_MODE: |
| 505 | { |
| 506 | uint32_t mode; |
| 507 | |
| 508 | ret = pm_pll_get_mode(pm_arg[0], &mode); |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 509 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)mode << 32U)); |
Jolly Shah | 141421e | 2019-01-04 11:35:48 -0800 | [diff] [blame] | 510 | } |
| 511 | |
Kalyani Akula | 6ebe483 | 2020-11-22 22:42:10 -0800 | [diff] [blame] | 512 | case PM_REGISTER_ACCESS: |
| 513 | { |
| 514 | uint32_t value; |
| 515 | |
| 516 | ret = pm_register_access(pm_arg[0], pm_arg[1], pm_arg[2], |
| 517 | pm_arg[3], &value); |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 518 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32U); |
Kalyani Akula | 6ebe483 | 2020-11-22 22:42:10 -0800 | [diff] [blame] | 519 | } |
| 520 | |
VNSL Durga | deb1a36 | 2020-11-23 04:46:04 -0800 | [diff] [blame] | 521 | case PM_EFUSE_ACCESS: |
| 522 | { |
| 523 | uint32_t value; |
| 524 | |
Vesa Jääskeläinen | 28f9ce5 | 2022-04-29 08:47:24 +0300 | [diff] [blame] | 525 | #if defined(ZYNQMP_SECURE_EFUSES) |
| 526 | if (is_caller_non_secure(flags)) { |
| 527 | SMC_RET1(handle, |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 528 | (((uint64_t)PM_RET_ERROR_NOT_ENABLED) << 32U) | |
Vesa Jääskeläinen | 28f9ce5 | 2022-04-29 08:47:24 +0300 | [diff] [blame] | 529 | (uint64_t)PM_RET_ERROR_ACCESS); |
| 530 | } |
| 531 | #endif |
VNSL Durga | deb1a36 | 2020-11-23 04:46:04 -0800 | [diff] [blame] | 532 | ret = pm_efuse_access(pm_arg[0], pm_arg[1], &value); |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 533 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32U); |
VNSL Durga | deb1a36 | 2020-11-23 04:46:04 -0800 | [diff] [blame] | 534 | } |
| 535 | |
Nava kishore Manne | 2af6d53 | 2022-01-13 13:29:36 +0530 | [diff] [blame] | 536 | case PM_FPGA_GET_VERSION: |
| 537 | case PM_FPGA_GET_FEATURE_LIST: |
| 538 | { |
Nava kishore Manne | 2af6d53 | 2022-01-13 13:29:36 +0530 | [diff] [blame] | 539 | uint32_t ret_payload[PAYLOAD_ARG_CNT]; |
| 540 | |
| 541 | PM_PACK_PAYLOAD5(payload, smc_fid & FUNCID_NUM_MASK, |
| 542 | pm_arg[0], pm_arg[1], pm_arg[2], pm_arg[3]); |
| 543 | ret = pm_ipi_send_sync(primary_proc, payload, ret_payload, 3U); |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 544 | SMC_RET2(handle, (uint64_t)ret | (uint64_t)ret_payload[0] << 32U, |
| 545 | (uint64_t)ret_payload[1] | (uint64_t)ret_payload[2] << 32U); |
Nava kishore Manne | 2af6d53 | 2022-01-13 13:29:36 +0530 | [diff] [blame] | 546 | } |
| 547 | |
Ronak Jain | 325bad1 | 2021-12-21 01:39:59 -0800 | [diff] [blame] | 548 | case PM_FEATURE_CHECK: |
| 549 | { |
Ronak Jain | f841467 | 2022-05-11 02:48:52 -0700 | [diff] [blame] | 550 | uint32_t version = 0; |
Ronak Jain | 325bad1 | 2021-12-21 01:39:59 -0800 | [diff] [blame] | 551 | uint32_t bit_mask[2] = {0}; |
| 552 | |
| 553 | ret = pm_feature_check(pm_arg[0], &version, bit_mask, |
| 554 | ARRAY_SIZE(bit_mask)); |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 555 | SMC_RET2(handle, (uint64_t)ret | ((uint64_t)version << 32U), |
| 556 | (uint64_t)bit_mask[0] | ((uint64_t)bit_mask[1] << 32U)); |
Ronak Jain | 325bad1 | 2021-12-21 01:39:59 -0800 | [diff] [blame] | 557 | } |
| 558 | |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 559 | default: |
Ronak Jain | 52de594 | 2022-01-20 23:11:18 -0800 | [diff] [blame] | 560 | /* Send request to the PMU */ |
| 561 | PM_PACK_PAYLOAD6(payload, api_id, pm_arg[0], pm_arg[1], |
| 562 | pm_arg[2], pm_arg[3], pm_arg[4]); |
| 563 | ret = pm_ipi_send_sync(primary_proc, payload, result, |
| 564 | PAYLOAD_ARG_CNT); |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 565 | SMC_RET2(handle, (uint64_t)ret | ((uint64_t)result[0] << 32U), |
| 566 | (uint64_t)result[1] | ((uint64_t)result[2] << 32U)); |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 567 | } |
| 568 | } |
Venkatesh Yadav Abbarapu | 7ace4af | 2020-11-23 04:26:54 -0800 | [diff] [blame] | 569 | |
| 570 | /** |
| 571 | * em_smc_handler() - SMC handler for EM-API calls coming from EL1/EL2. |
| 572 | * @smc_fid - Function Identifier |
| 573 | * @x1 - x4 - Arguments |
| 574 | * @cookie - Unused |
| 575 | * @handler - Pointer to caller's context structure |
| 576 | * |
| 577 | * @return - Unused |
| 578 | * |
| 579 | * Determines that smc_fid is valid and supported EM SMC Function ID from the |
| 580 | * list of em_api_ids, otherwise completes the request with |
| 581 | * the unknown SMC Function ID |
| 582 | * |
| 583 | * The SMC calls for EM service are forwarded from SIP Service SMC handler |
| 584 | * function with rt_svc_handle signature |
| 585 | */ |
| 586 | uint64_t em_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3, |
Venkatesh Yadav Abbarapu | 0386e65 | 2022-05-24 14:05:57 +0530 | [diff] [blame] | 587 | uint64_t x4, const void *cookie, void *handle, uint64_t flags) |
Venkatesh Yadav Abbarapu | 7ace4af | 2020-11-23 04:26:54 -0800 | [diff] [blame] | 588 | { |
| 589 | enum pm_ret_status ret; |
| 590 | |
| 591 | switch (smc_fid & FUNCID_NUM_MASK) { |
| 592 | /* EM API Functions */ |
| 593 | case EM_SET_ACTION: |
| 594 | { |
| 595 | uint32_t value; |
| 596 | |
| 597 | ret = em_set_action(&value); |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 598 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32U); |
Venkatesh Yadav Abbarapu | 7ace4af | 2020-11-23 04:26:54 -0800 | [diff] [blame] | 599 | } |
| 600 | |
| 601 | case EM_REMOVE_ACTION: |
| 602 | { |
| 603 | uint32_t value; |
| 604 | |
| 605 | ret = em_remove_action(&value); |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 606 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32U); |
Venkatesh Yadav Abbarapu | 7ace4af | 2020-11-23 04:26:54 -0800 | [diff] [blame] | 607 | } |
| 608 | |
| 609 | case EM_SEND_ERRORS: |
| 610 | { |
| 611 | uint32_t value; |
| 612 | |
| 613 | ret = em_send_errors(&value); |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 614 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32U); |
Venkatesh Yadav Abbarapu | 7ace4af | 2020-11-23 04:26:54 -0800 | [diff] [blame] | 615 | } |
| 616 | |
| 617 | default: |
| 618 | WARN("Unimplemented EM Service Call: 0x%x\n", smc_fid); |
| 619 | SMC_RET1(handle, SMC_UNK); |
| 620 | } |
| 621 | } |