Paul Beesley | f3653a6 | 2019-05-22 11:22:44 +0100 | [diff] [blame] | 1 | Xilinx Zynq UltraScale+ MPSoC |
| 2 | ============================= |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 3 | |
Dan Handley | 610e7e1 | 2018-03-01 18:44:00 +0000 | [diff] [blame] | 4 | Trusted Firmware-A (TF-A) implements the EL3 firmware layer for Xilinx Zynq |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 5 | UltraScale + MPSoC. |
Dan Handley | 610e7e1 | 2018-03-01 18:44:00 +0000 | [diff] [blame] | 6 | The platform only uses the runtime part of TF-A as ZynqMP already has a |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 7 | BootROM (BL1) and FSBL (BL2). |
| 8 | |
Dan Handley | 610e7e1 | 2018-03-01 18:44:00 +0000 | [diff] [blame] | 9 | BL31 is TF-A. |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 10 | BL32 is an optional Secure Payload. |
| 11 | BL33 is the non-secure world software (U-Boot, Linux etc). |
| 12 | |
| 13 | To build: |
| 14 | |
| 15 | .. code:: bash |
| 16 | |
Venkatesh Yadav Abbarapu | 476336b | 2022-04-11 09:13:17 +0530 | [diff] [blame] | 17 | make CROSS_COMPILE=aarch64-none-elf- PLAT=zynqmp RESET_TO_BL31=1 bl31 |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 18 | |
| 19 | To build bl32 TSP you have to rebuild bl31 too: |
| 20 | |
| 21 | .. code:: bash |
| 22 | |
Venkatesh Yadav Abbarapu | 476336b | 2022-04-11 09:13:17 +0530 | [diff] [blame] | 23 | make CROSS_COMPILE=aarch64-none-elf- PLAT=zynqmp SPD=tspd RESET_TO_BL31=1 bl31 bl32 |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 24 | |
Venkatesh Yadav Abbarapu | 34fbf1f | 2020-11-27 04:45:01 -0700 | [diff] [blame] | 25 | To build TF-A for JTAG DCC console: |
| 26 | |
| 27 | .. code:: bash |
| 28 | |
| 29 | make CROSS_COMPILE=aarch64-none-elf- PLAT=zynqmp RESET_TO_BL31=1 bl31 ZYNQMP_CONSOLE=dcc |
| 30 | |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 31 | ZynqMP platform specific build options |
Paul Beesley | f3653a6 | 2019-05-22 11:22:44 +0100 | [diff] [blame] | 32 | -------------------------------------- |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 33 | |
Akshay Belsare | ec0afc8 | 2023-02-27 12:04:26 +0530 | [diff] [blame] | 34 | - ``XILINX_OF_BOARD_DTB_ADDR`` : Specifies the base address of Device tree. |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 35 | - ``ZYNQMP_ATF_MEM_BASE``: Specifies the base address of the bl31 binary. |
| 36 | - ``ZYNQMP_ATF_MEM_SIZE``: Specifies the size of the memory region of the bl31 binary. |
| 37 | - ``ZYNQMP_BL32_MEM_BASE``: Specifies the base address of the bl32 binary. |
| 38 | - ``ZYNQMP_BL32_MEM_SIZE``: Specifies the size of the memory region of the bl32 binary. |
| 39 | |
| 40 | - ``ZYNQMP_CONSOLE``: Select the console driver. Options: |
| 41 | |
| 42 | - ``cadence``, ``cadence0``: Cadence UART 0 |
| 43 | - ``cadence1`` : Cadence UART 1 |
| 44 | |
Akshay Belsare | 69c6a59 | 2023-02-15 10:49:52 +0530 | [diff] [blame] | 45 | ZynqMP Debug behavior |
| 46 | --------------------- |
| 47 | |
| 48 | With DEBUG=1, TF-A for ZynqMP uses DDR memory range instead of OCM memory range |
| 49 | due to size constraints. |
| 50 | For DEBUG=1 configuration for ZynqMP the BL31_BASE is set to the DDR location |
Akshay Belsare | ec0afc8 | 2023-02-27 12:04:26 +0530 | [diff] [blame] | 51 | of 0x1000 and BL31_LIMIT is set to DDR location of 0x7FFFF. By default the |
| 52 | above memory range will NOT be reserved in device tree. |
| 53 | |
| 54 | To reserve the above memory range in device tree, the device tree base address |
| 55 | must be provided during build as, |
| 56 | |
| 57 | make CROSS_COMPILE=aarch64-none-elf- PLAT=zynqmp RESET_TO_BL31=1 DEBUG=1 \ |
| 58 | XILINX_OF_BOARD_DTB_ADDR=<DTB address> bl31 |
| 59 | |
| 60 | The default DTB base address for ZynqMP platform is 0x100000. This default value |
| 61 | is not set in the code and to use this default address, user still needs to |
| 62 | provide it through the build command as above. |
Akshay Belsare | 69c6a59 | 2023-02-15 10:49:52 +0530 | [diff] [blame] | 63 | |
| 64 | If the user wants to move the bl31 to a different DDR location, user can provide |
Akshay Belsare | ec0afc8 | 2023-02-27 12:04:26 +0530 | [diff] [blame] | 65 | the DDR address location using the build time parameters ZYNQMP_ATF_MEM_BASE and |
| 66 | ZYNQMP_ATF_MEM_SIZE. |
| 67 | |
| 68 | The DDR address must be reserved in the DTB by the user, either by manually |
| 69 | adding the reserved memory node, in the device tree, with the required address |
| 70 | range OR let TF-A modify the device tree on the run. |
| 71 | |
| 72 | To let TF-A access and modify the device tree, the DTB address must be provided |
| 73 | to the build command as follows, |
Akshay Belsare | 69c6a59 | 2023-02-15 10:49:52 +0530 | [diff] [blame] | 74 | |
| 75 | make CROSS_COMPILE=aarch64-none-elf- PLAT=zynqmp RESET_TO_BL31=1 DEBUG=1 \ |
Akshay Belsare | ec0afc8 | 2023-02-27 12:04:26 +0530 | [diff] [blame] | 76 | ZYNQMP_ATF_MEM_BASE=<DDR address> ZYNQMP_ATF_MEM_SIZE=<size> \ |
| 77 | XILINX_OF_BOARD_DTB_ADDR=<DTB address> bl31 |
Akshay Belsare | 69c6a59 | 2023-02-15 10:49:52 +0530 | [diff] [blame] | 78 | |
Belsare, Akshay | 03f3711 | 2023-03-06 15:08:54 +0530 | [diff] [blame] | 79 | DDR Address Range Usage |
| 80 | ----------------------- |
| 81 | |
| 82 | When FSBL runs on RPU and TF-A is to be placed in DDR address range, |
| 83 | then the user needs to make sure that the DDR address is beyond 256KB. |
| 84 | In the RPU view, the first 256 KB is TCM memory. |
| 85 | |
| 86 | For this use case, with the minimum base address in DDR for TF-A, |
| 87 | the build command example is; |
| 88 | |
| 89 | make CROSS_COMPILE=aarch64-none-elf- PLAT=zynqmp RESET_TO_BL31=1 DEBUG=1 \ |
| 90 | ZYNQMP_ATF_MEM_BASE=0x40000 ZYNQMP_ATF_MEM_SIZE=<size> |
Akshay Belsare | 69c6a59 | 2023-02-15 10:49:52 +0530 | [diff] [blame] | 91 | |
Akshay Belsare | 32d5c90 | 2023-04-06 16:21:06 +0530 | [diff] [blame] | 92 | Configurable Stack Size |
| 93 | ----------------------- |
| 94 | |
| 95 | The stack size in TF-A for ZynqMP platform is configurable. |
| 96 | The custom package can define the desired stack size as per the requirement in |
| 97 | the make file as follows, |
| 98 | |
| 99 | PLATFORM_STACK_SIZE := <value> |
| 100 | $(eval $(call add_define,PLATFORM_STACK_SIZE)) |
| 101 | |
Dan Handley | 610e7e1 | 2018-03-01 18:44:00 +0000 | [diff] [blame] | 102 | FSBL->TF-A Parameter Passing |
Paul Beesley | f3653a6 | 2019-05-22 11:22:44 +0100 | [diff] [blame] | 103 | ---------------------------- |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 104 | |
Dan Handley | 610e7e1 | 2018-03-01 18:44:00 +0000 | [diff] [blame] | 105 | The FSBL populates a data structure with image information for TF-A. TF-A uses |
| 106 | that data to hand off to the loaded images. The address of the handoff data |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 107 | structure is passed in the ``PMU_GLOBAL.GLOBAL_GEN_STORAGE6`` register. The |
Dan Handley | 610e7e1 | 2018-03-01 18:44:00 +0000 | [diff] [blame] | 108 | register is free to be used by other software once TF-A has brought up |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 109 | further firmware images. |
| 110 | |
| 111 | Power Domain Tree |
Paul Beesley | f3653a6 | 2019-05-22 11:22:44 +0100 | [diff] [blame] | 112 | ----------------- |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 113 | |
Dan Handley | 610e7e1 | 2018-03-01 18:44:00 +0000 | [diff] [blame] | 114 | The following power domain tree represents the power domain model used by TF-A |
| 115 | for ZynqMP: |
Douglas Raillard | d7c21b7 | 2017-06-28 15:23:03 +0100 | [diff] [blame] | 116 | |
| 117 | :: |
| 118 | |
| 119 | +-+ |
| 120 | |0| |
| 121 | +-+ |
| 122 | +-------+---+---+-------+ |
| 123 | | | | | |
| 124 | | | | | |
| 125 | v v v v |
| 126 | +-+ +-+ +-+ +-+ |
| 127 | |0| |1| |2| |3| |
| 128 | +-+ +-+ +-+ +-+ |
| 129 | |
| 130 | The 4 leaf power domains represent the individual A53 cores, while resources |
| 131 | common to the cluster are grouped in the power domain on the top. |
Amit Nagal | f7ecba3 | 2023-02-15 18:43:55 +0530 | [diff] [blame] | 132 | |
| 133 | CUSTOM SIP service support |
| 134 | -------------------------- |
| 135 | |
| 136 | - Dedicated SMC FID ZYNQMP_SIP_SVC_CUSTOM(0x82002000)(32-bit)/ |
| 137 | (0xC2002000)(64-bit) to be used by a custom package for |
| 138 | providing CUSTOM SIP service. |
| 139 | |
| 140 | - by default platform provides bare minimum definition for |
| 141 | custom_smc_handler in this service. |
| 142 | |
| 143 | - to use this service, custom package should implement their |
| 144 | smc handler with the name custom_smc_handler. once custom package is |
| 145 | included in TF-A build, their definition of custom_smc_handler is |
| 146 | enabled. |
| 147 | |
| 148 | Custom package makefile fragment inclusion in TF-A build |
| 149 | -------------------------------------------------------- |
| 150 | |
| 151 | - custom package is not directly part of TF-A source. |
| 152 | |
| 153 | - <CUSTOM_PKG_PATH> is the location at which user clones a |
| 154 | custom package locally. |
| 155 | |
| 156 | - custom package needs to implement makefile fragment named |
| 157 | custom_pkg.mk so as to get included in TF-A build. |
| 158 | |
| 159 | - custom_pkg.mk specify all the rules to include custom package |
| 160 | specific header files, dependent libs, source files that are |
| 161 | supposed to be included in TF-A build. |
| 162 | |
| 163 | - when <CUSTOM_PKG_PATH> is specified in TF-A build command, |
| 164 | custom_pkg.mk is included from <CUSTOM_PKG_PATH> in TF-A build. |
| 165 | |
| 166 | - TF-A build command: |
| 167 | make CROSS_COMPILE=aarch64-none-elf- PLAT=zynqmp RESET_TO_BL31=1 |
| 168 | bl31 CUSTOM_PKG_PATH=<...> |
Prasad Kummari | 2b04528 | 2024-02-08 17:28:46 +0530 | [diff] [blame] | 169 | |
| 170 | Reference DEN0028E SMC calling convention |
| 171 | ------------------------------------------ |
| 172 | |
| 173 | Allocated subranges of Function Identifier to SIP services |
| 174 | ------------------------------------------------------------ |
| 175 | |
| 176 | +-----------------------+-------------------------------------------------------+ |
| 177 | | SMC Function | Identifier Service type | |
| 178 | +-----------------------+-------------------------------------------------------+ |
| 179 | | 0xC2000000-0xC200FFFF | Fast SMC64 SiP Service Calls as per SMCCC Section 6.1 | |
| 180 | +-----------------------+-------------------------------------------------------+ |
| 181 | |
| 182 | IPI SMC call ranges |
| 183 | ------------------- |
| 184 | |
| 185 | +---------------------------+-----------------------------------------------------------+ |
| 186 | | SMC Function Identifier | Service type | |
| 187 | +---------------------------+-----------------------------------------------------------+ |
| 188 | | 0xc2001000-0xc2001FFF | Fast SMC64 SiP Service call range used for AMD-Xilinx IPI | |
| 189 | +---------------------------+-----------------------------------------------------------+ |
| 190 | |
| 191 | PM SMC call ranges |
| 192 | ------------------ |
| 193 | |
| 194 | +---------------------------+---------------------------------------------------------------------------+ |
| 195 | | SMC Function Identifier | Service type | |
| 196 | +---------------------------+---------------------------------------------------------------------------+ |
| 197 | | 0xc2000000-0xc2000FFF | Fast SMC64 SiP Service call range used for AMD-Xilinx Platform Management | |
| 198 | +---------------------------+---------------------------------------------------------------------------+ |
| 199 | |
| 200 | SMC function IDs for SiP Service queries |
| 201 | ---------------------------------------- |
| 202 | |
| 203 | +--------------+--------------+--------------+ |
| 204 | | Service | Call UID | Revision | |
| 205 | +--------------+--------------+--------------+ |
| 206 | | SiP Service | 0x8200_FF01 | 0x8200_FF03 | |
| 207 | +--------------+--------------+--------------+ |
| 208 | |
| 209 | Call UID Query – Returns a unique identifier of the service provider. |
| 210 | |
| 211 | Revision Query – Returns revision details of the service implementor. |
| 212 | |
| 213 | CUSTOM SIP service support |
| 214 | -------------------------- |
| 215 | |
| 216 | +-------------+------------+------------+ |
| 217 | | Service | 32-bit | 64-bit | |
| 218 | +-------------+------------+------------+ |
| 219 | | SiP Service | 0x82002000 | 0xC2002000 | |
| 220 | +-------------+------------+------------+ |