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Dan Handley9df48042015-03-19 18:58:55 +00001/*
Antonio Nino Diaz23ede6a2018-06-19 09:29:36 +01002 * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
Dan Handley9df48042015-03-19 18:58:55 +00003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Dan Handley9df48042015-03-19 18:58:55 +00005 */
6
Dan Handley9df48042015-03-19 18:58:55 +00007#include <assert.h>
8#include <errno.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +00009
Soby Mathewfeac8fc2015-09-29 15:47:16 +010010#include <platform_def.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000011
12#include <arch_helpers.h>
13#include <lib/psci/psci.h>
Antonio Nino Diazbd7b7402019-01-25 14:30:04 +000014#include <plat/arm/common/plat_arm.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000015#include <plat/common/platform.h>
16
Dimitris Papastamosd7a36512018-06-18 13:01:06 +010017/* Allow ARM Standard platforms to override these functions */
Dimitris Papastamosd7a36512018-06-18 13:01:06 +010018#pragma weak plat_arm_program_trusted_mailbox
Soby Mathew0b4c5a32016-10-21 17:51:22 +010019
Soby Mathew7799cf72015-04-16 14:49:09 +010020#if !ARM_RECOM_STATE_ID_ENC
Dan Handley9df48042015-03-19 18:58:55 +000021/*******************************************************************************
Soby Mathewfec4eb72015-07-01 16:16:20 +010022 * ARM standard platform handler called to check the validity of the power state
23 * parameter.
Dan Handley9df48042015-03-19 18:58:55 +000024 ******************************************************************************/
Soby Mathewfec4eb72015-07-01 16:16:20 +010025int arm_validate_power_state(unsigned int power_state,
26 psci_power_state_t *req_state)
Dan Handley9df48042015-03-19 18:58:55 +000027{
Antonio Nino Diazfec756f2018-07-18 16:24:16 +010028 unsigned int pstate = psci_get_pstate_type(power_state);
29 unsigned int pwr_lvl = psci_get_pstate_pwrlvl(power_state);
30 unsigned int i;
Dan Handley9df48042015-03-19 18:58:55 +000031
Sathees Balya50905c72018-10-05 13:30:59 +010032 assert(req_state != NULL);
Dan Handley9df48042015-03-19 18:58:55 +000033
Soby Mathewfec4eb72015-07-01 16:16:20 +010034 if (pwr_lvl > PLAT_MAX_PWR_LVL)
35 return PSCI_E_INVALID_PARAMS;
Dan Handley9df48042015-03-19 18:58:55 +000036
Dan Handley9df48042015-03-19 18:58:55 +000037 /* Sanity check the requested state */
Soby Mathewfec4eb72015-07-01 16:16:20 +010038 if (pstate == PSTATE_TYPE_STANDBY) {
Dan Handley9df48042015-03-19 18:58:55 +000039 /*
Soby Mathewfec4eb72015-07-01 16:16:20 +010040 * It's possible to enter standby only on power level 0
41 * Ignore any other power level.
Dan Handley9df48042015-03-19 18:58:55 +000042 */
Soby Mathewfec4eb72015-07-01 16:16:20 +010043 if (pwr_lvl != ARM_PWR_LVL0)
Dan Handley9df48042015-03-19 18:58:55 +000044 return PSCI_E_INVALID_PARAMS;
Soby Mathewfec4eb72015-07-01 16:16:20 +010045
46 req_state->pwr_domain_state[ARM_PWR_LVL0] =
47 ARM_LOCAL_STATE_RET;
48 } else {
49 for (i = ARM_PWR_LVL0; i <= pwr_lvl; i++)
50 req_state->pwr_domain_state[i] =
51 ARM_LOCAL_STATE_OFF;
Dan Handley9df48042015-03-19 18:58:55 +000052 }
53
54 /*
55 * We expect the 'state id' to be zero.
56 */
Antonio Nino Diazfec756f2018-07-18 16:24:16 +010057 if (psci_get_pstate_id(power_state) != 0U)
Dan Handley9df48042015-03-19 18:58:55 +000058 return PSCI_E_INVALID_PARAMS;
59
Soby Mathew7799cf72015-04-16 14:49:09 +010060 return PSCI_E_SUCCESS;
61}
62
63#else
64/*******************************************************************************
65 * ARM standard platform handler called to check the validity of the power
66 * state parameter. The power state parameter has to be a composite power
67 * state.
68 ******************************************************************************/
69int arm_validate_power_state(unsigned int power_state,
70 psci_power_state_t *req_state)
71{
72 unsigned int state_id;
73 int i;
74
Sathees Balya50905c72018-10-05 13:30:59 +010075 assert(req_state != NULL);
Soby Mathew7799cf72015-04-16 14:49:09 +010076
77 /*
78 * Currently we are using a linear search for finding the matching
79 * entry in the idle power state array. This can be made a binary
80 * search if the number of entries justify the additional complexity.
81 */
82 for (i = 0; !!arm_pm_idle_states[i]; i++) {
83 if (power_state == arm_pm_idle_states[i])
84 break;
85 }
86
87 /* Return error if entry not found in the idle state array */
88 if (!arm_pm_idle_states[i])
89 return PSCI_E_INVALID_PARAMS;
90
91 i = 0;
92 state_id = psci_get_pstate_id(power_state);
93
94 /* Parse the State ID and populate the state info parameter */
95 while (state_id) {
96 req_state->pwr_domain_state[i++] = state_id &
97 ARM_LOCAL_PSTATE_MASK;
98 state_id >>= ARM_LOCAL_PSTATE_WIDTH;
99 }
100
Dan Handley9df48042015-03-19 18:58:55 +0000101 return PSCI_E_SUCCESS;
102}
Soby Mathew7799cf72015-04-16 14:49:09 +0100103#endif /* __ARM_RECOM_STATE_ID_ENC__ */
Soby Mathew0d9e8522015-07-15 13:36:24 +0100104
105/*******************************************************************************
106 * ARM standard platform handler called to check the validity of the non secure
Jeenu Viswambharan59424d82017-09-19 09:27:18 +0100107 * entrypoint. Returns 0 if the entrypoint is valid, or -1 otherwise.
Soby Mathew0d9e8522015-07-15 13:36:24 +0100108 ******************************************************************************/
109int arm_validate_ns_entrypoint(uintptr_t entrypoint)
110{
111 /*
112 * Check if the non secure entrypoint lies within the non
113 * secure DRAM.
114 */
115 if ((entrypoint >= ARM_NS_DRAM1_BASE) && (entrypoint <
Jeenu Viswambharan59424d82017-09-19 09:27:18 +0100116 (ARM_NS_DRAM1_BASE + ARM_NS_DRAM1_SIZE))) {
117 return 0;
118 }
dp-arm84fc2952017-05-03 12:14:10 +0100119#ifndef AARCH32
Soby Mathew0d9e8522015-07-15 13:36:24 +0100120 if ((entrypoint >= ARM_DRAM2_BASE) && (entrypoint <
Jeenu Viswambharan59424d82017-09-19 09:27:18 +0100121 (ARM_DRAM2_BASE + ARM_DRAM2_SIZE))) {
122 return 0;
123 }
dp-arm84fc2952017-05-03 12:14:10 +0100124#endif
Soby Mathew0d9e8522015-07-15 13:36:24 +0100125
Jeenu Viswambharan59424d82017-09-19 09:27:18 +0100126 return -1;
127}
128
129int arm_validate_psci_entrypoint(uintptr_t entrypoint)
130{
Sathees Balya50905c72018-10-05 13:30:59 +0100131 return (arm_validate_ns_entrypoint(entrypoint) == 0) ? PSCI_E_SUCCESS :
Jeenu Viswambharan59424d82017-09-19 09:27:18 +0100132 PSCI_E_INVALID_ADDRESS;
Soby Mathew0d9e8522015-07-15 13:36:24 +0100133}
Soby Mathewfeac8fc2015-09-29 15:47:16 +0100134
Soby Mathew61e8d0b2015-10-12 17:32:29 +0100135/******************************************************************************
Soby Mathew9ca28062017-10-11 16:08:58 +0100136 * Helper function to save the platform state before a system suspend. Save the
137 * state of the system components which are not in the Always ON power domain.
138 *****************************************************************************/
139void arm_system_pwr_domain_save(void)
140{
141 /* Assert system power domain is available on the platform */
142 assert(PLAT_MAX_PWR_LVL >= ARM_PWR_LVL2);
143
144 plat_arm_gic_save();
145
146 /*
Antonio Nino Diaz23ede6a2018-06-19 09:29:36 +0100147 * Unregister console now so that it is not registered for a second
148 * time during resume.
149 */
150 arm_console_runtime_end();
151
152 /*
Soby Mathew9ca28062017-10-11 16:08:58 +0100153 * All the other peripheral which are configured by ARM TF are
154 * re-initialized on resume from system suspend. Hence we
155 * don't save their state here.
156 */
157}
158
159/******************************************************************************
Soby Mathew61e8d0b2015-10-12 17:32:29 +0100160 * Helper function to resume the platform from system suspend. Reinitialize
161 * the system components which are not in the Always ON power domain.
162 * TODO: Unify the platform setup when waking up from cold boot and system
163 * resume in arm_bl31_platform_setup().
164 *****************************************************************************/
165void arm_system_pwr_domain_resume(void)
166{
Antonio Nino Diaz23ede6a2018-06-19 09:29:36 +0100167 /* Initialize the console */
168 arm_console_runtime_init();
Soby Mathew61e8d0b2015-10-12 17:32:29 +0100169
170 /* Assert system power domain is available on the platform */
171 assert(PLAT_MAX_PWR_LVL >= ARM_PWR_LVL2);
172
Soby Mathew9ca28062017-10-11 16:08:58 +0100173 plat_arm_gic_resume();
174
Soby Mathew61e8d0b2015-10-12 17:32:29 +0100175 plat_arm_security_setup();
Soby Mathew61e8d0b2015-10-12 17:32:29 +0100176 arm_configure_sys_timer();
177}
178
Soby Mathewfeac8fc2015-09-29 15:47:16 +0100179/*******************************************************************************
Dimitris Papastamosd7a36512018-06-18 13:01:06 +0100180 * ARM platform function to program the mailbox for a cpu before it is released
Soby Mathewfeac8fc2015-09-29 15:47:16 +0100181 * from reset. This function assumes that the Trusted mail box base is within
182 * the ARM_SHARED_RAM region
183 ******************************************************************************/
Dimitris Papastamosd7a36512018-06-18 13:01:06 +0100184void plat_arm_program_trusted_mailbox(uintptr_t address)
Soby Mathewfeac8fc2015-09-29 15:47:16 +0100185{
186 uintptr_t *mailbox = (void *) PLAT_ARM_TRUSTED_MAILBOX_BASE;
187
188 *mailbox = address;
189
190 /*
191 * Ensure that the PLAT_ARM_TRUSTED_MAILBOX_BASE is within
192 * ARM_SHARED_RAM region.
193 */
194 assert((PLAT_ARM_TRUSTED_MAILBOX_BASE >= ARM_SHARED_RAM_BASE) &&
195 ((PLAT_ARM_TRUSTED_MAILBOX_BASE + sizeof(*mailbox)) <= \
196 (ARM_SHARED_RAM_BASE + ARM_SHARED_RAM_SIZE)));
Soby Mathewfeac8fc2015-09-29 15:47:16 +0100197}
198
199/*******************************************************************************
200 * The ARM Standard platform definition of platform porting API
201 * `plat_setup_psci_ops`.
202 ******************************************************************************/
Daniel Boulbyf45a4bb2018-09-18 13:26:03 +0100203int __init plat_setup_psci_ops(uintptr_t sec_entrypoint,
Soby Mathewfeac8fc2015-09-29 15:47:16 +0100204 const plat_psci_ops_t **psci_ops)
205{
Soby Mathew0b4c5a32016-10-21 17:51:22 +0100206 *psci_ops = plat_arm_psci_override_pm_ops(&plat_arm_psci_pm_ops);
Soby Mathewfeac8fc2015-09-29 15:47:16 +0100207
208 /* Setup mailbox with entry point. */
Dimitris Papastamosd7a36512018-06-18 13:01:06 +0100209 plat_arm_program_trusted_mailbox(sec_entrypoint);
Soby Mathewfeac8fc2015-09-29 15:47:16 +0100210 return 0;
211}