blob: 3f473097d65d0c90f6dd5376ee58c215ebea7e6b [file] [log] [blame]
Dan Handley9df48042015-03-19 18:58:55 +00001/*
2 * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include <arch_helpers.h>
32#include <assert.h>
33#include <errno.h>
34#include <psci.h>
35
Dan Handley9df48042015-03-19 18:58:55 +000036/*******************************************************************************
Soby Mathewfec4eb72015-07-01 16:16:20 +010037 * ARM standard platform handler called to check the validity of the power state
38 * parameter.
Dan Handley9df48042015-03-19 18:58:55 +000039 ******************************************************************************/
Soby Mathewfec4eb72015-07-01 16:16:20 +010040int arm_validate_power_state(unsigned int power_state,
41 psci_power_state_t *req_state)
Dan Handley9df48042015-03-19 18:58:55 +000042{
Soby Mathewfec4eb72015-07-01 16:16:20 +010043 int pstate = psci_get_pstate_type(power_state);
44 int pwr_lvl = psci_get_pstate_pwrlvl(power_state);
45 int i;
Dan Handley9df48042015-03-19 18:58:55 +000046
Soby Mathewfec4eb72015-07-01 16:16:20 +010047 assert(req_state);
Dan Handley9df48042015-03-19 18:58:55 +000048
Soby Mathewfec4eb72015-07-01 16:16:20 +010049 if (pwr_lvl > PLAT_MAX_PWR_LVL)
50 return PSCI_E_INVALID_PARAMS;
Dan Handley9df48042015-03-19 18:58:55 +000051
Dan Handley9df48042015-03-19 18:58:55 +000052 /* Sanity check the requested state */
Soby Mathewfec4eb72015-07-01 16:16:20 +010053 if (pstate == PSTATE_TYPE_STANDBY) {
Dan Handley9df48042015-03-19 18:58:55 +000054 /*
Soby Mathewfec4eb72015-07-01 16:16:20 +010055 * It's possible to enter standby only on power level 0
56 * Ignore any other power level.
Dan Handley9df48042015-03-19 18:58:55 +000057 */
Soby Mathewfec4eb72015-07-01 16:16:20 +010058 if (pwr_lvl != ARM_PWR_LVL0)
Dan Handley9df48042015-03-19 18:58:55 +000059 return PSCI_E_INVALID_PARAMS;
Soby Mathewfec4eb72015-07-01 16:16:20 +010060
61 req_state->pwr_domain_state[ARM_PWR_LVL0] =
62 ARM_LOCAL_STATE_RET;
63 } else {
64 for (i = ARM_PWR_LVL0; i <= pwr_lvl; i++)
65 req_state->pwr_domain_state[i] =
66 ARM_LOCAL_STATE_OFF;
Dan Handley9df48042015-03-19 18:58:55 +000067 }
68
69 /*
70 * We expect the 'state id' to be zero.
71 */
72 if (psci_get_pstate_id(power_state))
73 return PSCI_E_INVALID_PARAMS;
74
75 return PSCI_E_SUCCESS;
76}