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git01.mediatek.com / filogic / atf / 6fbe0fce8fc37c87acddbb4198b90451e3bff496 / . / drivers / staging / renesas / rcar / ddr / ddr_a / ddr_init_e3.c
blob: 7aedc88d6bcd7851e9311231694818e1d38708d8 [file] [log] [blame]
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1/*
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]2 * Copyright (c) 2015-2019, Renesas Electronics Corporation.
3 * All rights reserved.
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
Marek Vasutb9e78d42019-07-14 09:22:57 +0200[diff] [blame]8#include <lib/mmio.h>
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]9#include <stdint.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +0000[diff] [blame]10
11#include <common/debug.h>
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]12
Marek Vasut11d94432019-07-14 11:19:18 +0200[diff] [blame]13#include "boot_init_dram.h"
Marek Vasut291bbfe2019-07-14 09:10:34 +0200[diff] [blame]14#include "boot_init_dram_regdef.h"
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]15
16#include "../dram_sub_func.h"
17
Marek Vasut11d94432019-07-14 11:19:18 +0200[diff] [blame]18#define RCAR_E3_DDR_VERSION "rev.0.12"
19
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]20/* Average periodic refresh interval[ns]. Support 3900,7800 */
Marek Vasut11d94432019-07-14 11:19:18 +0200[diff] [blame]21#ifdef ddr_qos_init_setting
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]22#define REFRESH_RATE 3900U
Marek Vasut11d94432019-07-14 11:19:18 +0200[diff] [blame]23#else
24#if RCAR_REF_INT == 1
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]25#define REFRESH_RATE 7800U
Marek Vasut11d94432019-07-14 11:19:18 +0200[diff] [blame]26#else
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]27#define REFRESH_RATE 3900U
Marek Vasut11d94432019-07-14 11:19:18 +0200[diff] [blame]28#endif
29#endif
30
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]31/*
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]32 * Initialize ddr
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]33 */
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]34uint32_t init_ddr(void)
35{
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]36 uint32_t i, r2, r5, r6, r7, r12;
37 uint32_t ddr_md;
38 uint32_t regval, j;
39 uint32_t dqsgd_0c, bdlcount_0c, bdlcount_0c_div2, bdlcount_0c_div4;
40 uint32_t bdlcount_0c_div8, bdlcount_0c_div16;
41 uint32_t gatesl_0c, rdqsd_0c, rdqsnd_0c, rbd_0c[4];
42 uint32_t pdqsr_ctl, lcdl_ctl, lcdl_judge1, lcdl_judge2;
43 uint32_t pdr_ctl;
44 uint32_t byp_ctl;
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]45
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]46 if ((mmio_read_32(0xFFF00044) & 0x000000FF) == 0x00000000) {
47 pdqsr_ctl = 1;
48 lcdl_ctl = 1;
49 pdr_ctl = 1;
50 byp_ctl = 1;
51 } else {
52 pdqsr_ctl = 0;
53 lcdl_ctl = 0;
54 pdr_ctl = 0;
55 byp_ctl = 0;
56 }
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]57
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]58 /* Judge the DDR bit rate (ddr_md : 0 = 1584Mbps, 1 = 1856Mbps) */
59 ddr_md = (mmio_read_32(RST_MODEMR) >> 19) & BIT(0);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]60
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]61 /* 1584Mbps setting */
62 if (ddr_md == 0) {
63 mmio_write_32(CPG_CPGWPR, 0x5A5AFFFF);
64 mmio_write_32(CPG_CPGWPCR, 0xA5A50000);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]65
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]66 mmio_write_32(CPG_SRCR4, 0x20000000);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]67
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]68 mmio_write_32(0xE61500DC, 0xe2200000); /* Change to 1584Mbps */
69 while (!(mmio_read_32(CPG_PLLECR) & BIT(11)))
70 ;
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]71
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]72 mmio_write_32(CPG_SRSTCLR4, 0x20000000);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]73
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]74 mmio_write_32(CPG_CPGWPCR, 0xA5A50001);
75 }
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]76
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]77 mmio_write_32(DBSC_DBSYSCNT0, 0x00001234);
78 mmio_write_32(DBSC_DBKIND, 0x00000007);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]79
80#if RCAR_DRAM_DDR3L_MEMCONF == 0
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]81 mmio_write_32(DBSC_DBMEMCONF00, 0x0f030a02); /* 1GB */
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]82#else
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]83 mmio_write_32(DBSC_DBMEMCONF00, 0x10030a02); /* 2GB(default) */
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]84#endif
85
86#if RCAR_DRAM_DDR3L_MEMDUAL == 1
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]87 r2 = mmio_read_32(0xE6790614);
88 mmio_write_32(0xE6790614, r2 | 0x3); /* MCS1_N/MODT1 are activated. */
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]89#endif
90
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]91 mmio_write_32(DBSC_DBPHYCONF0, 0x1);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]92
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]93 /* Select setting value in bps */
94 if (ddr_md == 0) { /* 1584Mbps */
95 mmio_write_32(DBSC_DBTR0, 0xB);
96 mmio_write_32(DBSC_DBTR1, 0x8);
97 } else { /* 1856Mbps */
98 mmio_write_32(DBSC_DBTR0, 0xD);
99 mmio_write_32(DBSC_DBTR1, 0x9);
100 }
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]101
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]102 mmio_write_32(DBSC_DBTR2, 0x00000000);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]103
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]104 /* Select setting value in bps */
105 if (ddr_md == 0) { /* 1584Mbps */
106 mmio_write_32(DBSC_DBTR3, 0x0000000B);
107 mmio_write_32(DBSC_DBTR4, 0x000B000B);
108 mmio_write_32(DBSC_DBTR5, 0x00000027);
109 mmio_write_32(DBSC_DBTR6, 0x0000001C);
110 } else { /* 1856Mbps */
111 mmio_write_32(DBSC_DBTR3, 0x0000000D);
112 mmio_write_32(DBSC_DBTR4, 0x000D000D);
113 mmio_write_32(DBSC_DBTR5, 0x0000002D);
114 mmio_write_32(DBSC_DBTR6, 0x00000020);
115 }
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]116
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]117 mmio_write_32(DBSC_DBTR7, 0x00060006);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]118
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]119 /* Select setting value in bps */
120 if (ddr_md == 0) { /* 1584Mbps */
121 mmio_write_32(DBSC_DBTR8, 0x00000020);
122 mmio_write_32(DBSC_DBTR9, 0x00000006);
123 mmio_write_32(DBSC_DBTR10, 0x0000000C);
124 mmio_write_32(DBSC_DBTR11, 0x0000000A);
125 mmio_write_32(DBSC_DBTR12, 0x00120012);
126 mmio_write_32(DBSC_DBTR13, 0x000000CE);
127 mmio_write_32(DBSC_DBTR14, 0x00140005);
128 mmio_write_32(DBSC_DBTR15, 0x00050004);
129 mmio_write_32(DBSC_DBTR16, 0x071F0305);
130 mmio_write_32(DBSC_DBTR17, 0x040C0000);
131 } else { /* 1856Mbps */
132 mmio_write_32(DBSC_DBTR8, 0x00000021);
133 mmio_write_32(DBSC_DBTR9, 0x00000007);
134 mmio_write_32(DBSC_DBTR10, 0x0000000E);
135 mmio_write_32(DBSC_DBTR11, 0x0000000C);
136 mmio_write_32(DBSC_DBTR12, 0x00140014);
137 mmio_write_32(DBSC_DBTR13, 0x000000F2);
138 mmio_write_32(DBSC_DBTR14, 0x00170006);
139 mmio_write_32(DBSC_DBTR15, 0x00060005);
140 mmio_write_32(DBSC_DBTR16, 0x09210507);
141 mmio_write_32(DBSC_DBTR17, 0x040E0000);
142 }
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]143
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]144 mmio_write_32(DBSC_DBTR18, 0x00000200);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]145
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]146 /* Select setting value in bps */
147 if (ddr_md == 0) { /* 1584Mbps */
148 mmio_write_32(DBSC_DBTR19, 0x01000040);
149 mmio_write_32(DBSC_DBTR20, 0x020000D6);
150 } else { /* 1856Mbps */
151 mmio_write_32(DBSC_DBTR19, 0x0129004B);
152 mmio_write_32(DBSC_DBTR20, 0x020000FB);
153 }
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]154
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]155 mmio_write_32(DBSC_DBTR21, 0x00040004);
156 mmio_write_32(DBSC_DBBL, 0x00000000);
157 mmio_write_32(DBSC_DBODT0, 0x00000001);
158 mmio_write_32(DBSC_DBADJ0, 0x00000001);
159 mmio_write_32(DBSC_DBSYSCONF1, 0x00000002);
160 mmio_write_32(DBSC_DBDFICNT0, 0x00000010);
161 mmio_write_32(DBSC_DBBCAMDIS, 0x00000001);
162 mmio_write_32(DBSC_DBSCHRW1, 0x00000046);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]163
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]164 /* Select setting value in bps */
165 if (ddr_md == 0) { /* 1584Mbps */
166 mmio_write_32(DBSC_SCFCTST0, 0x0D050B03);
167 mmio_write_32(DBSC_SCFCTST1, 0x0306030C);
168 } else { /* 1856Mbps */
169 mmio_write_32(DBSC_SCFCTST0, 0x0C050B03);
170 mmio_write_32(DBSC_SCFCTST1, 0x0305030C);
171 }
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]172
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]173 /*
174 * Initial_Step0( INITBYP )
175 */
176 mmio_write_32(DBSC_DBPDLK0, 0x0000A55A);
177 mmio_write_32(DBSC_DBCMD, 0x01840001);
178 mmio_write_32(DBSC_DBCMD, 0x08840000);
179 NOTICE("BL2: [COLD_BOOT]\n");
180 mmio_write_32(DBSC_DBPDRGA0, 0x00000001);
181 mmio_write_32(DBSC_DBPDRGD0, 0x80010000);
182 mmio_write_32(DBSC_DBPDRGA0, 0x00000006);
183 while (!(mmio_read_32(DBSC_DBPDRGD0) & BIT(0)))
184 ;
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]185
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]186 /*
187 * Initial_Step1( ZCAL,PLLINIT,DCAL,PHYRST training )
188 */
189 mmio_write_32(DBSC_DBPDRGA0, 0x00000008);
190 mmio_write_32(DBSC_DBPDRGD0, 0x000B8000);
191 mmio_write_32(DBSC_DBPDRGA0, 0x00000090);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]192
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]193 /* Select setting value in bps */
194 if (ddr_md == 0) /* 1584Mbps */
195 mmio_write_32(DBSC_DBPDRGD0, 0x04058904);
196 else /* 1856Mbps */
197 mmio_write_32(DBSC_DBPDRGD0, 0x04058A04);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]198
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]199 mmio_write_32(DBSC_DBPDRGA0, 0x00000091);
200 mmio_write_32(DBSC_DBPDRGD0, 0x0007BB6B);
201 mmio_write_32(DBSC_DBPDRGA0, 0x00000095);
202 mmio_write_32(DBSC_DBPDRGD0, 0x0007BBAD);
203 mmio_write_32(DBSC_DBPDRGA0, 0x00000099);
204 mmio_write_32(DBSC_DBPDRGD0, 0x0007BB6B);
205 mmio_write_32(DBSC_DBPDRGA0, 0x00000090);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]206
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]207 /* Select setting value in bps */
208 if (ddr_md == 0) /* 1584Mbps */
209 mmio_write_32(DBSC_DBPDRGD0, 0x04058900);
210 else /* 1856Mbps */
211 mmio_write_32(DBSC_DBPDRGD0, 0x04058A00);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]212
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]213 mmio_write_32(DBSC_DBPDRGA0, 0x00000021);
214 mmio_write_32(DBSC_DBPDRGD0, 0x0024641E);
215 mmio_write_32(DBSC_DBPDRGA0, 0x00000001);
216 mmio_write_32(DBSC_DBPDRGD0, 0x00010073);
217 mmio_write_32(DBSC_DBPDRGA0, 0x00000006);
218 while (!(mmio_read_32(DBSC_DBPDRGD0) & BIT(0)))
219 ;
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]220
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]221 /*
222 * Initial_Step2( DRAMRST/DRAMINT training )
223 */
224 mmio_write_32(DBSC_DBPDRGA0, 0x00000090);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]225
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]226 /* Select setting value in bps */
227 if (ddr_md == 0) /* 1584Mbps */
228 mmio_write_32(DBSC_DBPDRGD0, 0x0C058900);
229 else /* 1856Mbps */
230 mmio_write_32(DBSC_DBPDRGD0, 0x0C058A00);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]231
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]232 mmio_write_32(DBSC_DBPDRGA0, 0x00000090);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]233
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]234 /* Select setting value in bps */
235 if (ddr_md == 0) /* 1584Mbps */
236 mmio_write_32(DBSC_DBPDRGD0, 0x04058900);
237 else /* 1856Mbps */
238 mmio_write_32(DBSC_DBPDRGD0, 0x04058A00);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]239
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]240 mmio_write_32(DBSC_DBPDRGA0, 0x00000006);
241 while (!(mmio_read_32(DBSC_DBPDRGD0) & BIT(0)))
242 ;
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]243
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]244 mmio_write_32(DBSC_DBPDRGA0, 0x00000003);
245 if (byp_ctl == 1)
246 mmio_write_32(DBSC_DBPDRGD0, 0x0780C720);
247 else
248 mmio_write_32(DBSC_DBPDRGD0, 0x0780C700);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]249
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]250 mmio_write_32(DBSC_DBPDRGA0, 0x00000007);
251 while (!(mmio_read_32(DBSC_DBPDRGD0) & BIT(30)))
252 ;
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]253
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]254 mmio_write_32(DBSC_DBPDRGA0, 0x00000004);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]255
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]256 /* Select setting value in bps */
257 if (ddr_md == 0) { /* 1584Mbps */
258 mmio_write_32(DBSC_DBPDRGD0, (REFRESH_RATE * 792 / 125) -
259 400 + 0x08B00000);
260 } else { /* 1856Mbps */
261 mmio_write_32(DBSC_DBPDRGD0, (REFRESH_RATE * 928 / 125) -
262 400 + 0x0A300000);
263 }
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]264
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]265 mmio_write_32(DBSC_DBPDRGA0, 0x00000022);
266 mmio_write_32(DBSC_DBPDRGD0, 0x1000040B);
267 mmio_write_32(DBSC_DBPDRGA0, 0x00000023);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]268
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]269 /* Select setting value in bps */
270 if (ddr_md == 0) /* 1584Mbps */
271 mmio_write_32(DBSC_DBPDRGD0, 0x2D9C0B66);
272 else /* 1856Mbps */
273 mmio_write_32(DBSC_DBPDRGD0, 0x35A00D77);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]274
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]275 mmio_write_32(DBSC_DBPDRGA0, 0x00000024);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]276
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]277 /* Select setting value in bps */
278 if (ddr_md == 0) /* 1584Mbps */
279 mmio_write_32(DBSC_DBPDRGD0, 0x2A88B400);
280 else /* 1856Mbps */
281 mmio_write_32(DBSC_DBPDRGD0, 0x2A8A2C28);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]282
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]283 mmio_write_32(DBSC_DBPDRGA0, 0x00000025);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]284
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]285 /* Select setting value in bps */
286 if (ddr_md == 0) /* 1584Mbps */
287 mmio_write_32(DBSC_DBPDRGD0, 0x30005200);
288 else /* 1856Mbps */
289 mmio_write_32(DBSC_DBPDRGD0, 0x30005E00);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]290
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]291 mmio_write_32(DBSC_DBPDRGA0, 0x00000026);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]292
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]293 /* Select setting value in bps */
294 if (ddr_md == 0) /* 1584Mbps */
295 mmio_write_32(DBSC_DBPDRGD0, 0x0014A9C9);
296 else /* 1856Mbps */
297 mmio_write_32(DBSC_DBPDRGD0, 0x0014CB49);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]298
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]299 mmio_write_32(DBSC_DBPDRGA0, 0x00000027);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]300
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]301 /* Select setting value in bps */
302 if (ddr_md == 0) /* 1584Mbps */
303 mmio_write_32(DBSC_DBPDRGD0, 0x00000D70);
304 else /* 1856Mbps */
305 mmio_write_32(DBSC_DBPDRGD0, 0x00000F14);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]306
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]307 mmio_write_32(DBSC_DBPDRGA0, 0x00000028);
308 mmio_write_32(DBSC_DBPDRGD0, 0x00000046);
309 mmio_write_32(DBSC_DBPDRGA0, 0x00000029);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]310
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]311 /* Select setting value in bps */
312 if (ddr_md == 0) { /* 1584Mbps */
313 if (REFRESH_RATE > 3900) /* [7]SRT=0 */
314 mmio_write_32(DBSC_DBPDRGD0, 0x18);
315 else /* [7]SRT=1 */
316 mmio_write_32(DBSC_DBPDRGD0, 0x98);
317 } else { /* 1856Mbps */
318 if (REFRESH_RATE > 3900) /* [7]SRT=0 */
319 mmio_write_32(DBSC_DBPDRGD0, 0x20);
320 else /* [7]SRT=1 */
321 mmio_write_32(DBSC_DBPDRGD0, 0xA0);
322 }
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]323
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]324 mmio_write_32(DBSC_DBPDRGA0, 0x0000002C);
325 mmio_write_32(DBSC_DBPDRGD0, 0x81003047);
326 mmio_write_32(DBSC_DBPDRGA0, 0x00000020);
327 mmio_write_32(DBSC_DBPDRGD0, 0x00181884);
328 mmio_write_32(DBSC_DBPDRGA0, 0x0000001A);
329 mmio_write_32(DBSC_DBPDRGD0, 0x33C03C10);
330 mmio_write_32(DBSC_DBPDRGA0, 0x00000006);
331 while (!(mmio_read_32(DBSC_DBPDRGD0) & BIT(0)))
332 ;
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]333
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]334 mmio_write_32(DBSC_DBPDRGA0, 0x000000A7);
335 mmio_write_32(DBSC_DBPDRGD0, 0x0D0D0D0D);
336 mmio_write_32(DBSC_DBPDRGA0, 0x000000A8);
337 mmio_write_32(DBSC_DBPDRGD0, 0x0D0D0D0D);
338 mmio_write_32(DBSC_DBPDRGA0, 0x000000A9);
339 mmio_write_32(DBSC_DBPDRGD0, 0x000D0D0D);
340 mmio_write_32(DBSC_DBPDRGA0, 0x000000C7);
341 mmio_write_32(DBSC_DBPDRGD0, 0x0D0D0D0D);
342 mmio_write_32(DBSC_DBPDRGA0, 0x000000C8);
343 mmio_write_32(DBSC_DBPDRGD0, 0x0D0D0D0D);
344 mmio_write_32(DBSC_DBPDRGA0, 0x000000C9);
345 mmio_write_32(DBSC_DBPDRGD0, 0x000D0D0D);
346 mmio_write_32(DBSC_DBPDRGA0, 0x000000E7);
347 mmio_write_32(DBSC_DBPDRGD0, 0x0D0D0D0D);
348 mmio_write_32(DBSC_DBPDRGA0, 0x000000E8);
349 mmio_write_32(DBSC_DBPDRGD0, 0x0D0D0D0D);
350 mmio_write_32(DBSC_DBPDRGA0, 0x000000E9);
351 mmio_write_32(DBSC_DBPDRGD0, 0x000D0D0D);
352 mmio_write_32(DBSC_DBPDRGA0, 0x00000107);
353 mmio_write_32(DBSC_DBPDRGD0, 0x0D0D0D0D);
354 mmio_write_32(DBSC_DBPDRGA0, 0x00000108);
355 mmio_write_32(DBSC_DBPDRGD0, 0x0D0D0D0D);
356 mmio_write_32(DBSC_DBPDRGA0, 0x00000109);
357 mmio_write_32(DBSC_DBPDRGD0, 0x000D0D0D);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]358
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]359 mmio_write_32(DBSC_DBPDRGA0, 0x00000001);
360 mmio_write_32(DBSC_DBPDRGD0, 0x00010181);
361 mmio_write_32(DBSC_DBCMD, 0x08840001);
362 mmio_write_32(DBSC_DBPDRGA0, 0x00000006);
363 while (!(mmio_read_32(DBSC_DBPDRGD0) & BIT(0)))
364 ;
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]365
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]366 /*
367 * Initial_Step3( WL/QSG training )
368 */
369 mmio_write_32(DBSC_DBPDRGA0, 0x00000001);
370 mmio_write_32(DBSC_DBPDRGD0, 0x00010601);
371 mmio_write_32(DBSC_DBPDRGA0, 0x00000006);
372 while (!(mmio_read_32(DBSC_DBPDRGD0) & BIT(0)))
373 ;
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]374
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]375 for (i = 0; i < 4; i++) {
376 mmio_write_32(DBSC_DBPDRGA0, 0xB1 + i * 0x20);
377 r5 = (mmio_read_32(DBSC_DBPDRGD0) & 0xFF00) >> 0x8;
378 mmio_write_32(DBSC_DBPDRGA0, 0xB4 + i * 0x20);
379 r6 = mmio_read_32(DBSC_DBPDRGD0) & 0xFF;
380 mmio_write_32(DBSC_DBPDRGA0, 0xB3 + i * 0x20);
381 r7 = mmio_read_32(DBSC_DBPDRGD0) & 0x7;
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]382
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]383 if (r6 > 0) {
384 mmio_write_32(DBSC_DBPDRGA0, 0xB2 + i * 0x20);
385 r2 = mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFFF8;
386 mmio_write_32(DBSC_DBPDRGA0, 0xB2 + i * 0x20);
387 mmio_write_32(DBSC_DBPDRGD0, r2 | ((r7 + 0x1) & 0x7));
388 mmio_write_32(DBSC_DBPDRGA0, 0xB0 + i * 0x20);
389 r2 = mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFF00;
390 mmio_write_32(DBSC_DBPDRGA0, 0xB0 + i * 0x20);
391 mmio_write_32(DBSC_DBPDRGD0, r2 | r6);
392 } else {
393 mmio_write_32(DBSC_DBPDRGA0, 0xB2 + i * 0x20);
394 r2 = mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFFF8;
395 mmio_write_32(DBSC_DBPDRGA0, 0xB2 + i * 0x20);
396 mmio_write_32(DBSC_DBPDRGD0, r2 | r7);
397 mmio_write_32(DBSC_DBPDRGA0, 0xB0 + i * 0x20);
398 r2 = mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFF00;
399 mmio_write_32(DBSC_DBPDRGA0, 0xB0 + i * 0x20);
400 mmio_write_32(DBSC_DBPDRGD0, r2 |
401 ((r6 + ((r5) << 1)) &
402 0xFF));
403 }
404 }
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]405
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]406 /*
407 * Initial_Step4( WLADJ training )
408 */
409 mmio_write_32(DBSC_DBPDRGA0, 0x00000005);
410 mmio_write_32(DBSC_DBPDRGD0, 0xC1AA00C0);
Marek Vasut432d7672018-12-12 18:06:39 +0100[diff] [blame]411
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]412 if (pdqsr_ctl == 0) {
413 mmio_write_32(DBSC_DBPDRGA0, 0x000000A0);
414 mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5);
415 mmio_write_32(DBSC_DBPDRGA0, 0x000000C0);
416 mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5);
417 mmio_write_32(DBSC_DBPDRGA0, 0x000000E0);
418 mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5);
419 mmio_write_32(DBSC_DBPDRGA0, 0x00000100);
420 mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5);
421 }
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]422
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]423 /* PDR always off */
424 if (pdr_ctl == 1) {
425 mmio_write_32(DBSC_DBPDRGA0, 0x000000A3);
426 mmio_write_32(DBSC_DBPDRGD0, 0x00000008);
427 mmio_write_32(DBSC_DBPDRGA0, 0x000000C3);
428 mmio_write_32(DBSC_DBPDRGD0, 0x00000008);
429 mmio_write_32(DBSC_DBPDRGA0, 0x000000E3);
430 mmio_write_32(DBSC_DBPDRGD0, 0x00000008);
431 mmio_write_32(DBSC_DBPDRGA0, 0x00000103);
432 mmio_write_32(DBSC_DBPDRGD0, 0x00000008);
433 }
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]434
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]435 mmio_write_32(DBSC_DBPDRGA0, 0x00000001);
436 mmio_write_32(DBSC_DBPDRGD0, 0x00010801);
437 mmio_write_32(DBSC_DBPDRGA0, 0x00000006);
438 while (!(mmio_read_32(DBSC_DBPDRGD0) & BIT(0)))
439 ;
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]440
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]441 /*
442 * Initial_Step5(Read Data Bit Deskew)
443 */
444 mmio_write_32(DBSC_DBPDRGA0, 0x00000005);
445 mmio_write_32(DBSC_DBPDRGD0, 0xC1AA00D8);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]446
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]447 mmio_write_32(DBSC_DBPDRGA0, 0x00000001);
448 mmio_write_32(DBSC_DBPDRGD0, 0x00011001);
449 mmio_write_32(DBSC_DBPDRGA0, 0x00000006);
450 while (!(mmio_read_32(DBSC_DBPDRGD0) & BIT(0)))
451 ;
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]452
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]453 if (pdqsr_ctl == 1) {
454 mmio_write_32(DBSC_DBPDRGA0, 0x000000A0);
455 mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5);
456 mmio_write_32(DBSC_DBPDRGA0, 0x000000C0);
457 mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5);
458 mmio_write_32(DBSC_DBPDRGA0, 0x000000E0);
459 mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5);
460 mmio_write_32(DBSC_DBPDRGA0, 0x00000100);
461 mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5);
462 }
Marek Vasut432d7672018-12-12 18:06:39 +0100[diff] [blame]463
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]464 /* PDR dynamic */
465 if (pdr_ctl == 1) {
466 mmio_write_32(DBSC_DBPDRGA0, 0x000000A3);
467 mmio_write_32(DBSC_DBPDRGD0, 0x00000000);
468 mmio_write_32(DBSC_DBPDRGA0, 0x000000C3);
469 mmio_write_32(DBSC_DBPDRGD0, 0x00000000);
470 mmio_write_32(DBSC_DBPDRGA0, 0x000000E3);
471 mmio_write_32(DBSC_DBPDRGD0, 0x00000000);
472 mmio_write_32(DBSC_DBPDRGA0, 0x00000103);
473 mmio_write_32(DBSC_DBPDRGD0, 0x00000000);
474 }
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]475
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]476 /*
477 * Initial_Step6(Write Data Bit Deskew)
478 */
479 mmio_write_32(DBSC_DBPDRGA0, 0x00000001);
480 mmio_write_32(DBSC_DBPDRGD0, 0x00012001);
481 mmio_write_32(DBSC_DBPDRGA0, 0x00000006);
482 while (!(mmio_read_32(DBSC_DBPDRGD0) & BIT(0)))
483 ;
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]484
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]485 /*
486 * Initial_Step7(Read Data Eye Training)
487 */
488 if (pdqsr_ctl == 1) {
489 mmio_write_32(DBSC_DBPDRGA0, 0x000000A0);
490 mmio_write_32(DBSC_DBPDRGD0, 0x7C000285);
491 mmio_write_32(DBSC_DBPDRGA0, 0x000000C0);
492 mmio_write_32(DBSC_DBPDRGD0, 0x7C000285);
493 mmio_write_32(DBSC_DBPDRGA0, 0x000000E0);
494 mmio_write_32(DBSC_DBPDRGD0, 0x7C000285);
495 mmio_write_32(DBSC_DBPDRGA0, 0x00000100);
496 mmio_write_32(DBSC_DBPDRGD0, 0x7C000285);
497 }
Marek Vasut432d7672018-12-12 18:06:39 +0100[diff] [blame]498
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]499 /* PDR always off */
500 if (pdr_ctl == 1) {
501 mmio_write_32(DBSC_DBPDRGA0, 0x000000A3);
502 mmio_write_32(DBSC_DBPDRGD0, 0x00000008);
503 mmio_write_32(DBSC_DBPDRGA0, 0x000000C3);
504 mmio_write_32(DBSC_DBPDRGD0, 0x00000008);
505 mmio_write_32(DBSC_DBPDRGA0, 0x000000E3);
506 mmio_write_32(DBSC_DBPDRGD0, 0x00000008);
507 mmio_write_32(DBSC_DBPDRGA0, 0x00000103);
508 mmio_write_32(DBSC_DBPDRGD0, 0x00000008);
509 }
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]510
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]511 mmio_write_32(DBSC_DBPDRGA0, 0x00000001);
512 mmio_write_32(DBSC_DBPDRGD0, 0x00014001);
513 mmio_write_32(DBSC_DBPDRGA0, 0x00000006);
514 while (!(mmio_read_32(DBSC_DBPDRGD0) & BIT(0)))
515 ;
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]516
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]517 if (pdqsr_ctl == 1) {
518 mmio_write_32(DBSC_DBPDRGA0, 0x000000A0);
519 mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5);
520 mmio_write_32(DBSC_DBPDRGA0, 0x000000C0);
521 mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5);
522 mmio_write_32(DBSC_DBPDRGA0, 0x000000E0);
523 mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5);
524 mmio_write_32(DBSC_DBPDRGA0, 0x00000100);
525 mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5);
526 }
Marek Vasut432d7672018-12-12 18:06:39 +0100[diff] [blame]527
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]528 /* PDR dynamic */
529 if (pdr_ctl == 1) {
530 mmio_write_32(DBSC_DBPDRGA0, 0x000000A3);
531 mmio_write_32(DBSC_DBPDRGD0, 0x00000000);
532 mmio_write_32(DBSC_DBPDRGA0, 0x000000C3);
533 mmio_write_32(DBSC_DBPDRGD0, 0x00000000);
534 mmio_write_32(DBSC_DBPDRGA0, 0x000000E3);
535 mmio_write_32(DBSC_DBPDRGD0, 0x00000000);
536 mmio_write_32(DBSC_DBPDRGA0, 0x00000103);
537 mmio_write_32(DBSC_DBPDRGD0, 0x00000000);
538 }
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]539
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]540 /*
541 * Initial_Step8(Write Data Eye Training)
542 */
543 mmio_write_32(DBSC_DBPDRGA0, 0x00000001);
544 mmio_write_32(DBSC_DBPDRGD0, 0x00018001);
545 mmio_write_32(DBSC_DBPDRGA0, 0x00000006);
546 while (!(mmio_read_32(DBSC_DBPDRGD0) & BIT(0)))
547 ;
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]548
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]549 /*
550 * Initial_Step3_2( DQS Gate Training )
551 */
552 mmio_write_32(DBSC_DBPDRGA0, 0x000000A0);
553 mmio_write_32(DBSC_DBPDRGD0, 0x7C000285);
554 mmio_write_32(DBSC_DBPDRGA0, 0x000000C0);
555 mmio_write_32(DBSC_DBPDRGD0, 0x7C000285);
556 mmio_write_32(DBSC_DBPDRGA0, 0x000000E0);
557 mmio_write_32(DBSC_DBPDRGD0, 0x7C000285);
558 mmio_write_32(DBSC_DBPDRGA0, 0x00000100);
559 mmio_write_32(DBSC_DBPDRGD0, 0x7C000285);
560 mmio_write_32(DBSC_DBPDRGA0, 0x0000002C);
561 mmio_write_32(DBSC_DBPDRGD0, 0x81003087);
562 mmio_write_32(DBSC_DBPDRGA0, 0x00000001);
563 mmio_write_32(DBSC_DBPDRGD0, 0x00010401);
564 mmio_write_32(DBSC_DBPDRGA0, 0x00000006);
565 while (!(mmio_read_32(DBSC_DBPDRGD0) & BIT(0)))
566 ;
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]567
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]568 for (i = 0; i < 4; i++) {
569 mmio_write_32(DBSC_DBPDRGA0, 0xB1 + i * 0x20);
570 r5 = ((mmio_read_32(DBSC_DBPDRGD0) & 0xFF00) >> 0x8);
571 mmio_write_32(DBSC_DBPDRGA0, 0xB4 + i * 0x20);
572 r6 = mmio_read_32(DBSC_DBPDRGD0) & 0xFF;
573 mmio_write_32(DBSC_DBPDRGA0, 0xB3 + i * 0x20);
574 r7 = mmio_read_32(DBSC_DBPDRGD0) & 0x7;
575 r12 = (r5 >> 0x2);
576 if (r12 < r6) {
577 mmio_write_32(DBSC_DBPDRGA0, 0xB2 + i * 0x20);
578 r2 = mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFFF8;
579 mmio_write_32(DBSC_DBPDRGA0, 0xB2 + i * 0x20);
580 mmio_write_32(DBSC_DBPDRGD0, r2 | ((r7 + 0x1) & 0x7));
581 mmio_write_32(DBSC_DBPDRGA0, 0xB0 + i * 0x20);
582 r2 = mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFF00;
583 mmio_write_32(DBSC_DBPDRGA0, 0xB0 + i * 0x20);
584 mmio_write_32(DBSC_DBPDRGD0, r2 | ((r6 - r12) & 0xFF));
585 } else {
586 mmio_write_32(DBSC_DBPDRGA0, 0xB2 + i * 0x20);
587 r2 = mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFFF8;
588 mmio_write_32(DBSC_DBPDRGA0, 0xB2 + i * 0x20);
589 mmio_write_32(DBSC_DBPDRGD0, r2 | (r7 & 0x7));
590 mmio_write_32(DBSC_DBPDRGA0, 0xB0 + i * 0x20);
591 r2 = mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFF00;
592 mmio_write_32(DBSC_DBPDRGA0, 0xB0 + i * 0x20);
593 mmio_write_32(DBSC_DBPDRGD0, r2 | ((r6 + r5 +
594 (r5 >> 1) + r12) & 0xFF));
595 }
596 }
Marek Vasut432d7672018-12-12 18:06:39 +0100[diff] [blame]597
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]598 /*
599 * Initial_Step5-2_7-2( Rd bit Rd eye )
600 */
601 if (pdqsr_ctl == 0) {
602 mmio_write_32(DBSC_DBPDRGA0, 0x000000A0);
603 mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5);
604 mmio_write_32(DBSC_DBPDRGA0, 0x000000C0);
605 mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5);
606 mmio_write_32(DBSC_DBPDRGA0, 0x000000E0);
607 mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5);
608 mmio_write_32(DBSC_DBPDRGA0, 0x00000100);
609 mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5);
610 }
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]611
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]612 /* PDR always off */
613 if (pdr_ctl == 1) {
614 mmio_write_32(DBSC_DBPDRGA0, 0x000000A3);
615 mmio_write_32(DBSC_DBPDRGD0, 0x00000008);
616 mmio_write_32(DBSC_DBPDRGA0, 0x000000C3);
617 mmio_write_32(DBSC_DBPDRGD0, 0x00000008);
618 mmio_write_32(DBSC_DBPDRGA0, 0x000000E3);
619 mmio_write_32(DBSC_DBPDRGD0, 0x00000008);
620 mmio_write_32(DBSC_DBPDRGA0, 0x00000103);
621 mmio_write_32(DBSC_DBPDRGD0, 0x00000008);
622 }
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]623
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]624 mmio_write_32(DBSC_DBPDRGA0, 0x00000001);
625 mmio_write_32(DBSC_DBPDRGD0, 0x00015001);
626 mmio_write_32(DBSC_DBPDRGA0, 0x00000006);
627 while (!(mmio_read_32(DBSC_DBPDRGD0) & BIT(0)))
628 ;
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]629
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]630 if (lcdl_ctl == 1) {
631 for (i = 0; i < 4; i++) {
632 mmio_write_32(DBSC_DBPDRGA0, 0xB0 + i * 0x20);
633 dqsgd_0c = mmio_read_32(DBSC_DBPDRGD0) & 0xFF;
634 mmio_write_32(DBSC_DBPDRGA0, 0xB1 + i * 0x20);
635 bdlcount_0c = (mmio_read_32(DBSC_DBPDRGD0) & 0xFF00) >>
636 8;
637 bdlcount_0c_div2 = bdlcount_0c >> 1;
638 bdlcount_0c_div4 = bdlcount_0c >> 2;
639 bdlcount_0c_div8 = bdlcount_0c >> 3;
640 bdlcount_0c_div16 = bdlcount_0c >> 4;
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]641
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]642 if (ddr_md == 0) { /* 1584Mbps */
643 lcdl_judge1 = bdlcount_0c_div2 +
644 bdlcount_0c_div4 +
645 bdlcount_0c_div8;
646 lcdl_judge2 = bdlcount_0c +
647 bdlcount_0c_div4 +
648 bdlcount_0c_div16;
649 } else { /* 1856Mbps */
650 lcdl_judge1 = bdlcount_0c_div2 +
651 bdlcount_0c_div4;
652 lcdl_judge2 = bdlcount_0c +
653 bdlcount_0c_div4;
654 }
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]655
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]656 if (dqsgd_0c <= lcdl_judge1)
657 continue;
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]658
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]659 if (dqsgd_0c <= lcdl_judge2) {
660 mmio_write_32(DBSC_DBPDRGA0, 0xB0 + i * 0x20);
661 regval = mmio_read_32(DBSC_DBPDRGD0) &
662 0xFFFFFF00;
663 mmio_write_32(DBSC_DBPDRGD0,
664 (dqsgd_0c - bdlcount_0c_div8) |
665 regval);
666 } else {
667 mmio_write_32(DBSC_DBPDRGA0, 0xB0 + i * 0x20);
668 regval = mmio_read_32(DBSC_DBPDRGD0) &
669 0xFFFFFF00;
670 mmio_write_32(DBSC_DBPDRGD0, regval);
671 mmio_write_32(DBSC_DBPDRGA0, 0xB2 + i * 0x20);
672 gatesl_0c = mmio_read_32(DBSC_DBPDRGD0) & 0x7;
673 mmio_write_32(DBSC_DBPDRGA0, 0xB2 + i * 0x20);
674 regval = mmio_read_32(DBSC_DBPDRGD0) &
675 0xFFFFFFF8;
676 mmio_write_32(DBSC_DBPDRGD0, regval |
677 (gatesl_0c + 1));
678 mmio_write_32(DBSC_DBPDRGA0, 0xAF + i * 0x20);
679 regval = (mmio_read_32(DBSC_DBPDRGD0));
680 rdqsd_0c = (regval & 0xFF00) >> 8;
681 rdqsnd_0c = (regval & 0xFF0000) >> 16;
682 mmio_write_32(DBSC_DBPDRGA0, 0xAF + i * 0x20);
683 mmio_write_32(DBSC_DBPDRGD0,
684 (regval & 0xFF0000FF) |
685 ((rdqsd_0c +
686 bdlcount_0c_div4) << 8) |
687 ((rdqsnd_0c +
688 bdlcount_0c_div4) << 16));
689 mmio_write_32(DBSC_DBPDRGA0, 0xAA + i * 0x20);
690 regval = (mmio_read_32(DBSC_DBPDRGD0));
691 rbd_0c[0] = (regval) & 0x1f;
692 rbd_0c[1] = (regval >> 8) & 0x1f;
693 rbd_0c[2] = (regval >> 16) & 0x1f;
694 rbd_0c[3] = (regval >> 24) & 0x1f;
695 mmio_write_32(DBSC_DBPDRGA0, 0xAA + i * 0x20);
696 regval = mmio_read_32(DBSC_DBPDRGD0) &
697 0xE0E0E0E0;
698 for (j = 0; j < 4; j++) {
699 rbd_0c[j] = rbd_0c[j] +
700 bdlcount_0c_div4;
701 if (rbd_0c[j] > 0x1F)
702 rbd_0c[j] = 0x1F;
703 regval = regval | (rbd_0c[j] << 8 * j);
704 }
705 mmio_write_32(DBSC_DBPDRGD0, regval);
706 mmio_write_32(DBSC_DBPDRGA0, 0xAB + i * 0x20);
707 regval = (mmio_read_32(DBSC_DBPDRGD0));
708 rbd_0c[0] = (regval) & 0x1f;
709 rbd_0c[1] = (regval >> 8) & 0x1f;
710 rbd_0c[2] = (regval >> 16) & 0x1f;
711 rbd_0c[3] = (regval >> 24) & 0x1f;
712 mmio_write_32(DBSC_DBPDRGA0, 0xAB + i * 0x20);
713 regval = mmio_read_32(DBSC_DBPDRGD0) &
714 0xE0E0E0E0;
715 for (j = 0; j < 4; j++) {
716 rbd_0c[j] = rbd_0c[j] +
717 bdlcount_0c_div4;
718 if (rbd_0c[j] > 0x1F)
719 rbd_0c[j] = 0x1F;
720 regval = regval | (rbd_0c[j] << 8 * j);
721 }
722 mmio_write_32(DBSC_DBPDRGD0, regval);
723 }
724 }
725 mmio_write_32(DBSC_DBPDRGA0, 0x2);
726 mmio_write_32(DBSC_DBPDRGD0, 0x7D81E37);
727 }
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]728
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]729 mmio_write_32(DBSC_DBPDRGA0, 0x00000003);
730 if (byp_ctl == 1)
731 mmio_write_32(DBSC_DBPDRGD0, 0x0380C720);
732 else
733 mmio_write_32(DBSC_DBPDRGD0, 0x0380C700);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]734
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]735 mmio_write_32(DBSC_DBPDRGA0, 0x00000007);
736 while (mmio_read_32(DBSC_DBPDRGD0) & BIT(30))
737 ;
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]738
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]739 mmio_write_32(DBSC_DBPDRGA0, 0x00000021);
740 mmio_write_32(DBSC_DBPDRGD0, 0x0024643E);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]741
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]742 mmio_write_32(DBSC_DBBUS0CNF1, 0x00000010);
743 mmio_write_32(DBSC_DBCALCNF, (64000000 / REFRESH_RATE) + 0x01000000);
744 /* Select setting value in bps */
745 if (ddr_md == 0) { /* 1584Mbps */
746 mmio_write_32(DBSC_DBRFCNF1,
747 (REFRESH_RATE * 99 / 125) + 0x00080000);
748 } else { /* 1856Mbps */
749 mmio_write_32(DBSC_DBRFCNF1,
750 (REFRESH_RATE * 116 / 125) + 0x00080000);
751 }
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]752
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]753 mmio_write_32(DBSC_DBRFCNF2, 0x00010000);
754 mmio_write_32(DBSC_DBDFICUPDCNF, 0x40100001);
755 mmio_write_32(DBSC_DBRFEN, 0x00000001);
756 mmio_write_32(DBSC_DBACEN, 0x00000001);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]757
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]758 if (pdqsr_ctl == 1) {
759 mmio_write_32(0xE67F0018, 0x00000001);
760 regval = mmio_read_32(0x40000000);
761 mmio_write_32(DBSC_DBPDRGA0, 0x00000000);
762 mmio_write_32(DBSC_DBPDRGD0, regval);
763 mmio_write_32(DBSC_DBPDRGA0, 0x000000A0);
764 mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5);
765 mmio_write_32(DBSC_DBPDRGA0, 0x000000C0);
766 mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5);
767 mmio_write_32(DBSC_DBPDRGA0, 0x000000E0);
768 mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5);
769 mmio_write_32(DBSC_DBPDRGA0, 0x00000100);
770 mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5);
771 }
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]772
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]773 /* PDR dynamic */
774 if (pdr_ctl == 1) {
775 mmio_write_32(DBSC_DBPDRGA0, 0x000000A3);
776 mmio_write_32(DBSC_DBPDRGD0, 0x00000000);
777 mmio_write_32(DBSC_DBPDRGA0, 0x000000C3);
778 mmio_write_32(DBSC_DBPDRGD0, 0x00000000);
779 mmio_write_32(DBSC_DBPDRGA0, 0x000000E3);
780 mmio_write_32(DBSC_DBPDRGD0, 0x00000000);
781 mmio_write_32(DBSC_DBPDRGA0, 0x00000103);
782 mmio_write_32(DBSC_DBPDRGD0, 0x00000000);
783 }
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]784
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]785 /*
786 * Initial_Step9( Initial End )
787 */
788 mmio_write_32(DBSC_DBPDLK0, 0x00000000);
789 mmio_write_32(DBSC_DBSYSCNT0, 0x00000000);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]790
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]791#ifdef ddr_qos_init_setting /* only for non qos_init */
792 mmio_write_32(DBSC_DBSYSCNT0, 0x00001234);
793 mmio_write_32(DBSC_DBCAM0CNF1, 0x00043218);
794 mmio_write_32(DBSC_DBCAM0CNF2, 0x000000F4);
795 mmio_write_32(DBSC_DBSCHCNT0, 0x000f0037);
796 mmio_write_32(DBSC_DBSCHSZ0, 0x00000001);
797 mmio_write_32(DBSC_DBSCHRW0, 0x22421111);
798 mmio_write_32(DBSC_SCFCTST2, 0x012F1123);
799 mmio_write_32(DBSC_DBSCHQOS00, 0x00000F00);
800 mmio_write_32(DBSC_DBSCHQOS01, 0x00000B00);
801 mmio_write_32(DBSC_DBSCHQOS02, 0x00000000);
802 mmio_write_32(DBSC_DBSCHQOS03, 0x00000000);
803 mmio_write_32(DBSC_DBSCHQOS40, 0x00000300);
804 mmio_write_32(DBSC_DBSCHQOS41, 0x000002F0);
805 mmio_write_32(DBSC_DBSCHQOS42, 0x00000200);
806 mmio_write_32(DBSC_DBSCHQOS43, 0x00000100);
807 mmio_write_32(DBSC_DBSCHQOS90, 0x00000100);
808 mmio_write_32(DBSC_DBSCHQOS91, 0x000000F0);
809 mmio_write_32(DBSC_DBSCHQOS92, 0x000000A0);
810 mmio_write_32(DBSC_DBSCHQOS93, 0x00000040);
811 mmio_write_32(DBSC_DBSCHQOS130, 0x00000100);
812 mmio_write_32(DBSC_DBSCHQOS131, 0x000000F0);
813 mmio_write_32(DBSC_DBSCHQOS132, 0x000000A0);
814 mmio_write_32(DBSC_DBSCHQOS133, 0x00000040);
815 mmio_write_32(DBSC_DBSCHQOS140, 0x000000C0);
816 mmio_write_32(DBSC_DBSCHQOS141, 0x000000B0);
817 mmio_write_32(DBSC_DBSCHQOS142, 0x00000080);
818 mmio_write_32(DBSC_DBSCHQOS143, 0x00000040);
819 mmio_write_32(DBSC_DBSCHQOS150, 0x00000040);
820 mmio_write_32(DBSC_DBSCHQOS151, 0x00000030);
821 mmio_write_32(DBSC_DBSCHQOS152, 0x00000020);
822 mmio_write_32(DBSC_DBSCHQOS153, 0x00000010);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]823
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]824 if (pdqsr_ctl == 0)
825 mmio_write_32(0xE67F0018, 0x00000001);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]826
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]827 mmio_write_32(DBSC_DBSYSCNT0, 0x00000000);
828#endif
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]829
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]830 return 1;
831}
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]832
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]833static uint32_t recovery_from_backup_mode(uint32_t ddr_backup)
834{
835 /*
836 * recovery_Step0(DBSC Setting 1) / same "init_ddr"
837 */
838 uint32_t r2, r5, r6, r7, r12, i;
839 uint32_t ddr_md;
840 uint32_t err;
841 uint32_t regval, j;
842 uint32_t dqsgd_0c, bdlcount_0c, bdlcount_0c_div2, bdlcount_0c_div4;
843 uint32_t bdlcount_0c_div8, bdlcount_0c_div16;
844 uint32_t gatesl_0c, rdqsd_0c, rdqsnd_0c, rbd_0c[4];
845 uint32_t pdqsr_ctl, lcdl_ctl, lcdl_judge1, lcdl_judge2;
846 uint32_t pdr_ctl;
847 uint32_t byp_ctl;
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]848
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]849 if ((mmio_read_32(0xFFF00044) & 0x000000FF) == 0x00000000) {
850 pdqsr_ctl = 1;
851 lcdl_ctl = 1;
852 pdr_ctl = 1;
853 byp_ctl = 1;
854 } else {
855 pdqsr_ctl = 0;
856 lcdl_ctl = 0;
857 pdr_ctl = 0;
858 byp_ctl = 0;
859 }
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]860
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]861 /* Judge the DDR bit rate (ddr_md : 0 = 1584Mbps, 1 = 1856Mbps) */
862 ddr_md = (mmio_read_32(RST_MODEMR) >> 19) & BIT(0);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]863
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]864 /* 1584Mbps setting */
865 if (ddr_md == 0) {
866 mmio_write_32(CPG_CPGWPR, 0x5A5AFFFF);
867 mmio_write_32(CPG_CPGWPCR, 0xA5A50000);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]868
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]869 mmio_write_32(CPG_SRCR4, 0x20000000);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]870
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]871 mmio_write_32(0xE61500DC, 0xe2200000); /* Change to 1584Mbps */
872 while (!(mmio_read_32(CPG_PLLECR) & BIT(11)))
873 ;
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]874
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]875 mmio_write_32(CPG_SRSTCLR4, 0x20000000);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]876
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]877 mmio_write_32(CPG_CPGWPCR, 0xA5A50001);
878 }
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]879
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]880 mmio_write_32(DBSC_DBSYSCNT0, 0x00001234);
881 mmio_write_32(DBSC_DBKIND, 0x00000007);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]882
883#if RCAR_DRAM_DDR3L_MEMCONF == 0
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]884 mmio_write_32(DBSC_DBMEMCONF00, 0x0f030a02);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]885#else
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]886 mmio_write_32(DBSC_DBMEMCONF00, 0x10030a02);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]887#endif
888
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]889#if RCAR_DRAM_DDR3L_MEMDUAL == 1
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]890 r2 = mmio_read_32(0xE6790614);
891 mmio_write_32(0xE6790614, r2 | 0x3); /* MCS1_N/MODT1 are activated. */
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]892#endif
893
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]894 mmio_write_32(DBSC_DBPHYCONF0, 0x00000001);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]895
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]896 /* Select setting value in bps */
897 if (ddr_md == 0) { /* 1584Mbps */
898 mmio_write_32(DBSC_DBTR0, 0x0000000B);
899 mmio_write_32(DBSC_DBTR1, 0x00000008);
900 } else { /* 1856Mbps */
901 mmio_write_32(DBSC_DBTR0, 0x0000000D);
902 mmio_write_32(DBSC_DBTR1, 0x00000009);
903 }
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]904
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]905 mmio_write_32(DBSC_DBTR2, 0x00000000);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]906
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]907 /* Select setting value in bps */
908 if (ddr_md == 0) { /* 1584Mbps */
909 mmio_write_32(DBSC_DBTR3, 0x0000000B);
910 mmio_write_32(DBSC_DBTR4, 0x000B000B);
911 mmio_write_32(DBSC_DBTR5, 0x00000027);
912 mmio_write_32(DBSC_DBTR6, 0x0000001C);
913 } else { /* 1856Mbps */
914 mmio_write_32(DBSC_DBTR3, 0x0000000D);
915 mmio_write_32(DBSC_DBTR4, 0x000D000D);
916 mmio_write_32(DBSC_DBTR5, 0x0000002D);
917 mmio_write_32(DBSC_DBTR6, 0x00000020);
918 }
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]919
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]920 mmio_write_32(DBSC_DBTR7, 0x00060006);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]921
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]922 /* Select setting value in bps */
923 if (ddr_md == 0) { /* 1584Mbps */
924 mmio_write_32(DBSC_DBTR8, 0x00000020);
925 mmio_write_32(DBSC_DBTR9, 0x00000006);
926 mmio_write_32(DBSC_DBTR10, 0x0000000C);
927 mmio_write_32(DBSC_DBTR11, 0x0000000A);
928 mmio_write_32(DBSC_DBTR12, 0x00120012);
929 mmio_write_32(DBSC_DBTR13, 0x000000CE);
930 mmio_write_32(DBSC_DBTR14, 0x00140005);
931 mmio_write_32(DBSC_DBTR15, 0x00050004);
932 mmio_write_32(DBSC_DBTR16, 0x071F0305);
933 mmio_write_32(DBSC_DBTR17, 0x040C0000);
934 } else { /* 1856Mbps */
935 mmio_write_32(DBSC_DBTR8, 0x00000021);
936 mmio_write_32(DBSC_DBTR9, 0x00000007);
937 mmio_write_32(DBSC_DBTR10, 0x0000000E);
938 mmio_write_32(DBSC_DBTR11, 0x0000000C);
939 mmio_write_32(DBSC_DBTR12, 0x00140014);
940 mmio_write_32(DBSC_DBTR13, 0x000000F2);
941 mmio_write_32(DBSC_DBTR14, 0x00170006);
942 mmio_write_32(DBSC_DBTR15, 0x00060005);
943 mmio_write_32(DBSC_DBTR16, 0x09210507);
944 mmio_write_32(DBSC_DBTR17, 0x040E0000);
945 }
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]946
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]947 mmio_write_32(DBSC_DBTR18, 0x00000200);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]948
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]949 /* Select setting value in bps */
950 if (ddr_md == 0) { /* 1584Mbps */
951 mmio_write_32(DBSC_DBTR19, 0x01000040);
952 mmio_write_32(DBSC_DBTR20, 0x020000D6);
953 } else { /* 1856Mbps */
954 mmio_write_32(DBSC_DBTR19, 0x0129004B);
955 mmio_write_32(DBSC_DBTR20, 0x020000FB);
956 }
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]957
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]958 mmio_write_32(DBSC_DBTR21, 0x00040004);
959 mmio_write_32(DBSC_DBBL, 0x00000000);
960 mmio_write_32(DBSC_DBODT0, 0x00000001);
961 mmio_write_32(DBSC_DBADJ0, 0x00000001);
962 mmio_write_32(DBSC_DBSYSCONF1, 0x00000002);
963 mmio_write_32(DBSC_DBDFICNT0, 0x00000010);
964 mmio_write_32(DBSC_DBBCAMDIS, 0x00000001);
965 mmio_write_32(DBSC_DBSCHRW1, 0x00000046);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]966
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]967 /* Select setting value in bps */
968 if (ddr_md == 0) { /* 1584Mbps */
969 mmio_write_32(DBSC_SCFCTST0, 0x0D050B03);
970 mmio_write_32(DBSC_SCFCTST1, 0x0306030C);
971 } else { /* 1856Mbps */
972 mmio_write_32(DBSC_SCFCTST0, 0x0C050B03);
973 mmio_write_32(DBSC_SCFCTST1, 0x0305030C);
974 }
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]975
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]976 /*
977 * recovery_Step1(PHY setting 1)
978 */
979 mmio_write_32(DBSC_DBPDLK0, 0x0000A55A);
980 mmio_write_32(DBSC_DBCMD, 0x01840001);
981 mmio_write_32(DBSC_DBCMD, 0x0A840000);
982 mmio_write_32(DBSC_DBPDRGA0, 0x00000008); /* DDR_PLLCR */
983 mmio_write_32(DBSC_DBPDRGD0, 0x000B8000);
984 mmio_write_32(DBSC_DBPDRGA0, 0x00000003); /* DDR_PGCR1 */
985 if (byp_ctl == 1)
986 mmio_write_32(DBSC_DBPDRGD0, 0x0780C720);
987 else
988 mmio_write_32(DBSC_DBPDRGD0, 0x0780C700);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]989
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]990 mmio_write_32(DBSC_DBPDRGA0, 0x00000020); /* DDR_DXCCR */
991 mmio_write_32(DBSC_DBPDRGD0, 0x00181884);
992 mmio_write_32(DBSC_DBPDRGA0, 0x0000001A); /* DDR_ACIOCR0 */
993 mmio_write_32(DBSC_DBPDRGD0, 0x33C03C10);
994 mmio_write_32(DBSC_DBPDRGA0, 0x00000007);
995 while (!(mmio_read_32(DBSC_DBPDRGD0) & BIT(30)))
996 ;
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]997
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]998 mmio_write_32(DBSC_DBPDRGA0, 0x00000004);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]999
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1000 /* Select setting value in bps */
1001 if (ddr_md == 0) { /* 1584Mbps */
1002 mmio_write_32(DBSC_DBPDRGD0, (REFRESH_RATE * 792 / 125) -
1003 400 + 0x08B00000);
1004 } else { /* 1856Mbps */
1005 mmio_write_32(DBSC_DBPDRGD0, (REFRESH_RATE * 928 / 125) -
1006 400 + 0x0A300000);
1007 }
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1008
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1009 mmio_write_32(DBSC_DBPDRGA0, 0x00000022);
1010 mmio_write_32(DBSC_DBPDRGD0, 0x1000040B);
1011 mmio_write_32(DBSC_DBPDRGA0, 0x00000023);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1012
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1013 /* Select setting value in bps */
1014 if (ddr_md == 0) /* 1584Mbps */
1015 mmio_write_32(DBSC_DBPDRGD0, 0x2D9C0B66);
1016 else /* 1856Mbps */
1017 mmio_write_32(DBSC_DBPDRGD0, 0x35A00D77);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1018
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1019 mmio_write_32(DBSC_DBPDRGA0, 0x00000024);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1020
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1021 /* Select setting value in bps */
1022 if (ddr_md == 0) /* 1584Mbps */
1023 mmio_write_32(DBSC_DBPDRGD0, 0x2A88B400);
1024 else /* 1856Mbps */
1025 mmio_write_32(DBSC_DBPDRGD0, 0x2A8A2C28);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1026
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1027 mmio_write_32(DBSC_DBPDRGA0, 0x00000025);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1028
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1029 /* Select setting value in bps */
1030 if (ddr_md == 0) /* 1584Mbps */
1031 mmio_write_32(DBSC_DBPDRGD0, 0x30005200);
1032 else /* 1856Mbps */
1033 mmio_write_32(DBSC_DBPDRGD0, 0x30005E00);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1034
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1035 mmio_write_32(DBSC_DBPDRGA0, 0x00000026);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1036
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1037 /* Select setting value in bps */
1038 if (ddr_md == 0) /* 1584Mbps */
1039 mmio_write_32(DBSC_DBPDRGD0, 0x0014A9C9);
1040 else /* 1856Mbps */
1041 mmio_write_32(DBSC_DBPDRGD0, 0x0014CB49);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1042
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1043 mmio_write_32(DBSC_DBPDRGA0, 0x00000027);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1044
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1045 /* Select setting value in bps */
1046 if (ddr_md == 0) /* 1584Mbps */
1047 mmio_write_32(DBSC_DBPDRGD0, 0x00000D70);
1048 else /* 1856Mbps */
1049 mmio_write_32(DBSC_DBPDRGD0, 0x00000F14);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1050
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1051 mmio_write_32(DBSC_DBPDRGA0, 0x00000028);
1052 mmio_write_32(DBSC_DBPDRGD0, 0x00000046);
1053 mmio_write_32(DBSC_DBPDRGA0, 0x00000029);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1054
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1055 /* Select setting value in bps */
1056 if (ddr_md == 0) { /* 1584Mbps */
1057 if (REFRESH_RATE > 3900)
1058 mmio_write_32(DBSC_DBPDRGD0, 0x18); /* [7]SRT=0 */
1059 else
1060 mmio_write_32(DBSC_DBPDRGD0, 0x98); /* [7]SRT=1 */
1061 } else { /* 1856Mbps */
1062 if (REFRESH_RATE > 3900)
1063 mmio_write_32(DBSC_DBPDRGD0, 0x20); /* [7]SRT=0 */
1064 else
1065 mmio_write_32(DBSC_DBPDRGD0, 0xA0); /* [7]SRT=1 */
1066 }
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1067
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1068 mmio_write_32(DBSC_DBPDRGA0, 0x0000002C);
1069 mmio_write_32(DBSC_DBPDRGD0, 0x81003047);
1070 mmio_write_32(DBSC_DBPDRGA0, 0x00000091);
1071 mmio_write_32(DBSC_DBPDRGD0, 0x0007BB6B);
1072 mmio_write_32(DBSC_DBPDRGA0, 0x00000095);
1073 mmio_write_32(DBSC_DBPDRGD0, 0x0007BBAD);
1074 mmio_write_32(DBSC_DBPDRGA0, 0x00000099);
1075 mmio_write_32(DBSC_DBPDRGD0, 0x0007BB6B);
1076 mmio_write_32(DBSC_DBPDRGA0, 0x00000021); /* DDR_DSGCR */
1077 mmio_write_32(DBSC_DBPDRGD0, 0x0024641E);
1078 mmio_write_32(DBSC_DBPDRGA0, 0x00000006); /* DDR_PGSR0 */
1079 while (!(mmio_read_32(DBSC_DBPDRGD0) & BIT(0)))
1080 ;
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1081
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1082 mmio_write_32(DBSC_DBPDRGA0, 0x00000001); /* DDR_PIR */
1083 mmio_write_32(DBSC_DBPDRGD0, 0x40010000);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1084
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1085 mmio_write_32(DBSC_DBPDRGA0, 0x00000006); /* DDR_PGSR0 */
1086 while (!(mmio_read_32(DBSC_DBPDRGD0) & BIT(0)))
1087 ;
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1088
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1089 mmio_write_32(DBSC_DBPDRGA0, 0x00000092); /* DDR_ZQ0DR */
1090 mmio_write_32(DBSC_DBPDRGD0, 0xC2C59AB5);
1091 mmio_write_32(DBSC_DBPDRGA0, 0x00000096); /* DDR_ZQ1DR */
1092 mmio_write_32(DBSC_DBPDRGD0, 0xC4285FBF);
1093 mmio_write_32(DBSC_DBPDRGA0, 0x0000009A); /* DDR_ZQ2DR */
1094 mmio_write_32(DBSC_DBPDRGD0, 0xC2C59AB5);
1095 mmio_write_32(DBSC_DBPDRGA0, 0x00000090); /* DDR_ZQCR */
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1096
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1097 /* Select setting value in bps */
1098 if (ddr_md == 0) /* 1584Mbps */
1099 mmio_write_32(DBSC_DBPDRGD0, 0x0C058900);
1100 else /* 1856Mbps */
1101 mmio_write_32(DBSC_DBPDRGD0, 0x0C058A00);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1102
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1103 mmio_write_32(DBSC_DBPDRGA0, 0x00000090); /* DDR_ZQCR */
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1104
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1105 /* Select setting value in bps */
1106 if (ddr_md == 0) /* 1584Mbps */
1107 mmio_write_32(DBSC_DBPDRGD0, 0x04058900);
1108 else /* 1856Mbps */
1109 mmio_write_32(DBSC_DBPDRGD0, 0x04058A00);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1110
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1111 mmio_write_32(DBSC_DBPDRGA0, 0x00000001); /* DDR_PIR */
1112 mmio_write_32(DBSC_DBPDRGD0, 0x00050001);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1113
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1114 mmio_write_32(DBSC_DBPDRGA0, 0x00000006); /* DDR_PGSR0 */
1115 while (!(mmio_read_32(DBSC_DBPDRGD0) & BIT(0)))
1116 ;
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1117
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1118 /* ddr backupmode end */
1119 if (ddr_backup)
1120 NOTICE("BL2: [WARM_BOOT]\n");
1121 else
1122 NOTICE("BL2: [COLD_BOOT]\n");
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1123
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1124 err = rcar_dram_update_boot_status(ddr_backup);
1125 if (err) {
1126 NOTICE("BL2: [BOOT_STATUS_UPDATE_ERROR]\n");
1127 return INITDRAM_ERR_I;
1128 }
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1129
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1130 mmio_write_32(DBSC_DBPDRGA0, 0x00000092); /* DDR_ZQ0DR */
1131 mmio_write_32(DBSC_DBPDRGD0, 0x02C59AB5);
1132 mmio_write_32(DBSC_DBPDRGA0, 0x00000096); /* DDR_ZQ1DR */
1133 mmio_write_32(DBSC_DBPDRGD0, 0x04285FBF);
1134 mmio_write_32(DBSC_DBPDRGA0, 0x0000009A); /* DDR_ZQ2DR */
1135 mmio_write_32(DBSC_DBPDRGD0, 0x02C59AB5);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1136
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1137 mmio_write_32(DBSC_DBPDRGA0, 0x00000001); /* DDR_PIR */
1138 mmio_write_32(DBSC_DBPDRGD0, 0x08000000);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1139
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1140 mmio_write_32(DBSC_DBPDRGA0, 0x00000001); /* DDR_PIR */
1141 mmio_write_32(DBSC_DBPDRGD0, 0x00000003);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1142
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1143 mmio_write_32(DBSC_DBPDRGA0, 0x00000006); /* DDR_PGSR0 */
1144 while (!(mmio_read_32(DBSC_DBPDRGD0) & BIT(0)))
1145 ;
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1146
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1147 mmio_write_32(DBSC_DBPDRGA0, 0x00000001); /* DDR_PIR */
1148 mmio_write_32(DBSC_DBPDRGD0, 0x80010000);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1149
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1150 mmio_write_32(DBSC_DBPDRGA0, 0x00000006); /* DDR_PGSR0 */
1151 while (!(mmio_read_32(DBSC_DBPDRGD0) & BIT(0)))
1152 ;
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1153
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1154 mmio_write_32(DBSC_DBPDRGA0, 0x00000001); /* DDR_PIR */
1155 mmio_write_32(DBSC_DBPDRGD0, 0x00010073);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1156
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1157 mmio_write_32(DBSC_DBPDRGA0, 0x00000006); /* DDR_PGSR0 */
1158 while (!(mmio_read_32(DBSC_DBPDRGD0) & BIT(0)))
1159 ;
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1160
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1161 mmio_write_32(DBSC_DBPDRGA0, 0x00000090); /* DDR_ZQCR */
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1162
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1163 /* Select setting value in bps */
1164 if (ddr_md == 0) /* 1584Mbps */
1165 mmio_write_32(DBSC_DBPDRGD0, 0x0C058900);
1166 else /* 1856Mbps */
1167 mmio_write_32(DBSC_DBPDRGD0, 0x0C058A00);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1168
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1169 mmio_write_32(DBSC_DBPDRGA0, 0x00000090); /* DDR_ZQCR */
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1170
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1171 /* Select setting value in bps */
1172 if (ddr_md == 0) /* 1584Mbps */
1173 mmio_write_32(DBSC_DBPDRGD0, 0x04058900);
1174 else /* 1856Mbps */
1175 mmio_write_32(DBSC_DBPDRGD0, 0x04058A00);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1176
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1177 mmio_write_32(DBSC_DBPDRGA0, 0x0000000C);
1178 mmio_write_32(DBSC_DBPDRGD0, 0x18000040);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1179
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1180 /*
1181 * recovery_Step2(PHY setting 2)
1182 */
1183 mmio_write_32(DBSC_DBPDRGA0, 0x00000006);
1184 while (!(mmio_read_32(DBSC_DBPDRGD0) & BIT(0)))
1185 ;
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1186
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1187 mmio_write_32(DBSC_DBPDRGA0, 0x000000A7);
1188 mmio_write_32(DBSC_DBPDRGD0, 0x0D0D0D0D);
1189 mmio_write_32(DBSC_DBPDRGA0, 0x000000A8);
1190 mmio_write_32(DBSC_DBPDRGD0, 0x0D0D0D0D);
1191 mmio_write_32(DBSC_DBPDRGA0, 0x000000A9);
1192 mmio_write_32(DBSC_DBPDRGD0, 0x000D0D0D);
1193 mmio_write_32(DBSC_DBPDRGA0, 0x000000C7);
1194 mmio_write_32(DBSC_DBPDRGD0, 0x0D0D0D0D);
1195 mmio_write_32(DBSC_DBPDRGA0, 0x000000C8);
1196 mmio_write_32(DBSC_DBPDRGD0, 0x0D0D0D0D);
1197 mmio_write_32(DBSC_DBPDRGA0, 0x000000C9);
1198 mmio_write_32(DBSC_DBPDRGD0, 0x000D0D0D);
1199 mmio_write_32(DBSC_DBPDRGA0, 0x000000E7);
1200 mmio_write_32(DBSC_DBPDRGD0, 0x0D0D0D0D);
1201 mmio_write_32(DBSC_DBPDRGA0, 0x000000E8);
1202 mmio_write_32(DBSC_DBPDRGD0, 0x0D0D0D0D);
1203 mmio_write_32(DBSC_DBPDRGA0, 0x000000E9);
1204 mmio_write_32(DBSC_DBPDRGD0, 0x000D0D0D);
1205 mmio_write_32(DBSC_DBPDRGA0, 0x00000107);
1206 mmio_write_32(DBSC_DBPDRGD0, 0x0D0D0D0D);
1207 mmio_write_32(DBSC_DBPDRGA0, 0x00000108);
1208 mmio_write_32(DBSC_DBPDRGD0, 0x0D0D0D0D);
1209 mmio_write_32(DBSC_DBPDRGA0, 0x00000109);
1210 mmio_write_32(DBSC_DBPDRGD0, 0x000D0D0D);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1211
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1212 mmio_write_32(DBSC_DBCALCNF, (64000000 / REFRESH_RATE) + 0x01000000);
1213 mmio_write_32(DBSC_DBBUS0CNF1, 0x00000010);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1214
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1215 /* Select setting value in bps */
1216 if (ddr_md == 0) { /* 1584Mbps */
1217 mmio_write_32(DBSC_DBRFCNF1,
1218 (REFRESH_RATE * 99 / 125) + 0x00080000);
1219 } else { /* 1856Mbps */
1220 mmio_write_32(DBSC_DBRFCNF1,
1221 (REFRESH_RATE * 116 / 125) + 0x00080000);
1222 }
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1223
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1224 mmio_write_32(DBSC_DBRFCNF2, 0x00010000);
1225 mmio_write_32(DBSC_DBRFEN, 0x00000001);
1226 mmio_write_32(DBSC_DBCMD, 0x0A840001);
1227 while (mmio_read_32(DBSC_DBWAIT) & BIT(0))
1228 ;
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1229
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1230 mmio_write_32(DBSC_DBCMD, 0x00000000);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1231
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1232 mmio_write_32(DBSC_DBCMD, 0x04840010);
1233 while (mmio_read_32(DBSC_DBWAIT) & BIT(0))
1234 ;
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1235
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1236 mmio_write_32(DBSC_DBPDRGA0, 0x00000006); /* DDR_PGSR0 */
1237 while (!(mmio_read_32(DBSC_DBPDRGD0) & BIT(0)))
1238 ;
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1239
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1240 mmio_write_32(DBSC_DBPDRGA0, 0x00000001); /* DDR_PIR */
1241 mmio_write_32(DBSC_DBPDRGD0, 0x00010701);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1242
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1243 mmio_write_32(DBSC_DBPDRGA0, 0x00000006); /* DDR_PGSR0 */
1244 while (!(mmio_read_32(DBSC_DBPDRGD0) & BIT(0)))
1245 ;
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1246
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1247 for (i = 0; i < 4; i++) {
1248 mmio_write_32(DBSC_DBPDRGA0, 0xB1 + i * 0x20);
1249 r5 = (mmio_read_32(DBSC_DBPDRGD0) & 0xFF00) >> 0x8;
1250 mmio_write_32(DBSC_DBPDRGA0, 0xB4 + i * 0x20);
1251 r6 = mmio_read_32(DBSC_DBPDRGD0) & 0xFF;
1252 mmio_write_32(DBSC_DBPDRGA0, 0xB3 + i * 0x20);
1253 r7 = mmio_read_32(DBSC_DBPDRGD0) & 0x7;
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1254
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1255 if (r6 > 0) {
1256 mmio_write_32(DBSC_DBPDRGA0, 0xB2 + i * 0x20);
1257 r2 = mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFFF8;
1258 mmio_write_32(DBSC_DBPDRGA0, 0xB2 + i * 0x20);
1259 mmio_write_32(DBSC_DBPDRGD0, r2 | ((r7 + 0x1) & 0x7));
1260 mmio_write_32(DBSC_DBPDRGA0, 0xB0 + i * 0x20);
1261 r2 = mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFF00;
1262 mmio_write_32(DBSC_DBPDRGA0, 0xB0 + i * 0x20);
1263 mmio_write_32(DBSC_DBPDRGD0, r2 | r6);
1264 } else {
1265 mmio_write_32(DBSC_DBPDRGA0, 0xB2 + i * 0x20);
1266 r2 = mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFFF8;
1267 mmio_write_32(DBSC_DBPDRGA0, 0xB2 + i * 0x20);
1268 mmio_write_32(DBSC_DBPDRGD0, r2 | r7);
1269 mmio_write_32(DBSC_DBPDRGA0, 0xB0 + i * 0x20);
1270 r2 = mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFF00;
1271 mmio_write_32(DBSC_DBPDRGA0, 0xB0 + i * 0x20);
1272 mmio_write_32(DBSC_DBPDRGD0,
1273 r2 | ((r6 + (r5 << 1)) & 0xFF));
1274 }
1275 }
Marek Vasut432d7672018-12-12 18:06:39 +0100[diff] [blame]1276
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1277 mmio_write_32(DBSC_DBPDRGA0, 0x00000005);
1278 mmio_write_32(DBSC_DBPDRGD0, 0xC1AA00C0);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1279
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1280 if (pdqsr_ctl == 0) {
1281 mmio_write_32(DBSC_DBPDRGA0, 0x000000A0);
1282 mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5);
1283 mmio_write_32(DBSC_DBPDRGA0, 0x000000C0);
1284 mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5);
1285 mmio_write_32(DBSC_DBPDRGA0, 0x000000E0);
1286 mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5);
1287 mmio_write_32(DBSC_DBPDRGA0, 0x00000100);
1288 mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5);
1289 }
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1290
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1291 /* PDR always off */
1292 if (pdr_ctl == 1) {
1293 mmio_write_32(DBSC_DBPDRGA0, 0x000000A3);
1294 mmio_write_32(DBSC_DBPDRGD0, 0x00000008);
1295 mmio_write_32(DBSC_DBPDRGA0, 0x000000C3);
1296 mmio_write_32(DBSC_DBPDRGD0, 0x00000008);
1297 mmio_write_32(DBSC_DBPDRGA0, 0x000000E3);
1298 mmio_write_32(DBSC_DBPDRGD0, 0x00000008);
1299 mmio_write_32(DBSC_DBPDRGA0, 0x00000103);
1300 mmio_write_32(DBSC_DBPDRGD0, 0x00000008);
1301 }
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1302
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1303 mmio_write_32(DBSC_DBPDRGA0, 0x00000001);
1304 mmio_write_32(DBSC_DBPDRGD0, 0x00010801);
1305 mmio_write_32(DBSC_DBPDRGA0, 0x00000006);
1306 while (!(mmio_read_32(DBSC_DBPDRGD0) & BIT(0)))
1307 ;
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1308
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1309 mmio_write_32(DBSC_DBPDRGA0, 0x00000005);
1310 mmio_write_32(DBSC_DBPDRGD0, 0xC1AA00D8);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1311
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1312 mmio_write_32(DBSC_DBPDRGA0, 0x00000001);
1313 mmio_write_32(DBSC_DBPDRGD0, 0x00011001);
1314 mmio_write_32(DBSC_DBPDRGA0, 0x00000006);
1315 while (!(mmio_read_32(DBSC_DBPDRGD0) & BIT(0)))
1316 ;
Marek Vasut432d7672018-12-12 18:06:39 +0100[diff] [blame]1317
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1318 if (pdqsr_ctl == 1) {
1319 mmio_write_32(DBSC_DBPDRGA0, 0x000000A0);
1320 mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5);
1321 mmio_write_32(DBSC_DBPDRGA0, 0x000000C0);
1322 mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5);
1323 mmio_write_32(DBSC_DBPDRGA0, 0x000000E0);
1324 mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5);
1325 mmio_write_32(DBSC_DBPDRGA0, 0x00000100);
1326 mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5);
1327 }
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1328
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1329 /* PDR dynamic */
1330 if (pdr_ctl == 1) {
1331 mmio_write_32(DBSC_DBPDRGA0, 0x000000A3);
1332 mmio_write_32(DBSC_DBPDRGD0, 0x00000000);
1333 mmio_write_32(DBSC_DBPDRGA0, 0x000000C3);
1334 mmio_write_32(DBSC_DBPDRGD0, 0x00000000);
1335 mmio_write_32(DBSC_DBPDRGA0, 0x000000E3);
1336 mmio_write_32(DBSC_DBPDRGD0, 0x00000000);
1337 mmio_write_32(DBSC_DBPDRGA0, 0x00000103);
1338 mmio_write_32(DBSC_DBPDRGD0, 0x00000000);
1339 }
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1340
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1341 mmio_write_32(DBSC_DBPDRGA0, 0x00000001);
1342 mmio_write_32(DBSC_DBPDRGD0, 0x00012001);
1343 mmio_write_32(DBSC_DBPDRGA0, 0x00000006);
1344 while (!(mmio_read_32(DBSC_DBPDRGD0) & BIT(0)))
1345 ;
Marek Vasut432d7672018-12-12 18:06:39 +0100[diff] [blame]1346
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1347 if (pdqsr_ctl == 1) {
1348 mmio_write_32(DBSC_DBPDRGA0, 0x000000A0);
1349 mmio_write_32(DBSC_DBPDRGD0, 0x7C000285);
1350 mmio_write_32(DBSC_DBPDRGA0, 0x000000C0);
1351 mmio_write_32(DBSC_DBPDRGD0, 0x7C000285);
1352 mmio_write_32(DBSC_DBPDRGA0, 0x000000E0);
1353 mmio_write_32(DBSC_DBPDRGD0, 0x7C000285);
1354 mmio_write_32(DBSC_DBPDRGA0, 0x00000100);
1355 mmio_write_32(DBSC_DBPDRGD0, 0x7C000285);
1356 }
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1357
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1358 /* PDR always off */
1359 if (pdr_ctl == 1) {
1360 mmio_write_32(DBSC_DBPDRGA0, 0x000000A3);
1361 mmio_write_32(DBSC_DBPDRGD0, 0x00000008);
1362 mmio_write_32(DBSC_DBPDRGA0, 0x000000C3);
1363 mmio_write_32(DBSC_DBPDRGD0, 0x00000008);
1364 mmio_write_32(DBSC_DBPDRGA0, 0x000000E3);
1365 mmio_write_32(DBSC_DBPDRGD0, 0x00000008);
1366 mmio_write_32(DBSC_DBPDRGA0, 0x00000103);
1367 mmio_write_32(DBSC_DBPDRGD0, 0x00000008);
1368 }
1369
1370 mmio_write_32(DBSC_DBPDRGA0, 0x00000001);
1371 mmio_write_32(DBSC_DBPDRGD0, 0x00014001);
1372 mmio_write_32(DBSC_DBPDRGA0, 0x00000006);
1373 while (!(mmio_read_32(DBSC_DBPDRGD0) & BIT(0)))
1374 ;
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1375
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1376 if (pdqsr_ctl == 1) {
1377 mmio_write_32(DBSC_DBPDRGA0, 0x000000A0);
1378 mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5);
1379 mmio_write_32(DBSC_DBPDRGA0, 0x000000C0);
1380 mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5);
1381 mmio_write_32(DBSC_DBPDRGA0, 0x000000E0);
1382 mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5);
1383 mmio_write_32(DBSC_DBPDRGA0, 0x00000100);
1384 mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5);
1385 }
Marek Vasut432d7672018-12-12 18:06:39 +0100[diff] [blame]1386
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1387 /* PDR dynamic */
1388 if (pdr_ctl == 1) {
1389 mmio_write_32(DBSC_DBPDRGA0, 0x000000A3);
1390 mmio_write_32(DBSC_DBPDRGD0, 0x00000000);
1391 mmio_write_32(DBSC_DBPDRGA0, 0x000000C3);
1392 mmio_write_32(DBSC_DBPDRGD0, 0x00000000);
1393 mmio_write_32(DBSC_DBPDRGA0, 0x000000E3);
1394 mmio_write_32(DBSC_DBPDRGD0, 0x00000000);
1395 mmio_write_32(DBSC_DBPDRGA0, 0x00000103);
1396 mmio_write_32(DBSC_DBPDRGD0, 0x00000000);
1397 }
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1398
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1399 mmio_write_32(DBSC_DBPDRGA0, 0x00000001);
1400 mmio_write_32(DBSC_DBPDRGD0, 0x00018001);
1401 mmio_write_32(DBSC_DBPDRGA0, 0x00000006);
1402 while (!(mmio_read_32(DBSC_DBPDRGD0) & BIT(0)))
1403 ;
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1404
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1405 mmio_write_32(DBSC_DBPDRGA0, 0x000000A0);
1406 mmio_write_32(DBSC_DBPDRGD0, 0x7C000285);
1407 mmio_write_32(DBSC_DBPDRGA0, 0x000000C0);
1408 mmio_write_32(DBSC_DBPDRGD0, 0x7C000285);
1409 mmio_write_32(DBSC_DBPDRGA0, 0x000000E0);
1410 mmio_write_32(DBSC_DBPDRGD0, 0x7C000285);
1411 mmio_write_32(DBSC_DBPDRGA0, 0x00000100);
1412 mmio_write_32(DBSC_DBPDRGD0, 0x7C000285);
1413 mmio_write_32(DBSC_DBPDRGA0, 0x0000002C);
1414 mmio_write_32(DBSC_DBPDRGD0, 0x81003087);
1415 mmio_write_32(DBSC_DBPDRGA0, 0x00000001);
1416 mmio_write_32(DBSC_DBPDRGD0, 0x00010401);
1417 mmio_write_32(DBSC_DBPDRGA0, 0x00000006);
1418 while (!(mmio_read_32(DBSC_DBPDRGD0) & BIT(0)))
1419 ;
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1420
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1421 for (i = 0; i < 4; i++) {
1422 mmio_write_32(DBSC_DBPDRGA0, 0xB1 + i * 0x20);
1423 r5 = ((mmio_read_32(DBSC_DBPDRGD0) & 0xFF00) >> 0x8);
1424 mmio_write_32(DBSC_DBPDRGA0, 0xB4 + i * 0x20);
1425 r6 = mmio_read_32(DBSC_DBPDRGD0) & 0xFF;
1426 mmio_write_32(DBSC_DBPDRGA0, 0xB3 + i * 0x20);
1427 r7 = mmio_read_32(DBSC_DBPDRGD0) & 0x7;
1428 r12 = r5 >> 0x2;
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1429
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1430 if (r12 < r6) {
1431 mmio_write_32(DBSC_DBPDRGA0, 0xB2 + i * 0x20);
1432 r2 = mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFFF8;
1433 mmio_write_32(DBSC_DBPDRGA0, 0xB2 + i * 0x20);
1434 mmio_write_32(DBSC_DBPDRGD0, r2 | ((r7 + 0x1) & 0x7));
1435 mmio_write_32(DBSC_DBPDRGA0, 0xB0 + i * 0x20);
1436 r2 = mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFF00;
1437 mmio_write_32(DBSC_DBPDRGA0, 0xB0 + i * 0x20);
1438 mmio_write_32(DBSC_DBPDRGD0, r2 | ((r6 - r12) & 0xFF));
1439 } else {
1440 mmio_write_32(DBSC_DBPDRGA0, 0xB2 + i * 0x20);
1441 r2 = mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFFF8;
1442 mmio_write_32(DBSC_DBPDRGA0, 0xB2 + i * 0x20);
1443 mmio_write_32(DBSC_DBPDRGD0, r2 | (r7 & 0x7));
1444 mmio_write_32(DBSC_DBPDRGA0, 0xB0 + i * 0x20);
1445 r2 = mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFF00;
1446 mmio_write_32(DBSC_DBPDRGA0, 0xB0 + i * 0x20);
1447 mmio_write_32(DBSC_DBPDRGD0,
1448 r2 |
1449 ((r6 + r5 + (r5 >> 1) + r12) & 0xFF));
1450 }
1451 }
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1452
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1453 if (pdqsr_ctl == 0) {
1454 mmio_write_32(DBSC_DBPDRGA0, 0x000000A0);
1455 mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5);
1456 mmio_write_32(DBSC_DBPDRGA0, 0x000000C0);
1457 mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5);
1458 mmio_write_32(DBSC_DBPDRGA0, 0x000000E0);
1459 mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5);
1460 mmio_write_32(DBSC_DBPDRGA0, 0x00000100);
1461 mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5);
1462 }
Marek Vasut432d7672018-12-12 18:06:39 +0100[diff] [blame]1463
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1464 /* PDR always off */
1465 if (pdr_ctl == 1) {
1466 mmio_write_32(DBSC_DBPDRGA0, 0x000000A3);
1467 mmio_write_32(DBSC_DBPDRGD0, 0x00000008);
1468 mmio_write_32(DBSC_DBPDRGA0, 0x000000C3);
1469 mmio_write_32(DBSC_DBPDRGD0, 0x00000008);
1470 mmio_write_32(DBSC_DBPDRGA0, 0x000000E3);
1471 mmio_write_32(DBSC_DBPDRGD0, 0x00000008);
1472 mmio_write_32(DBSC_DBPDRGA0, 0x00000103);
1473 mmio_write_32(DBSC_DBPDRGD0, 0x00000008);
1474 }
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1475
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1476 mmio_write_32(DBSC_DBPDRGA0, 0x00000001);
1477 mmio_write_32(DBSC_DBPDRGD0, 0x00015001);
1478 mmio_write_32(DBSC_DBPDRGA0, 0x00000006);
1479 while (!(mmio_read_32(DBSC_DBPDRGD0) & BIT(0)))
1480 ;
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1481
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1482 if (lcdl_ctl == 1) {
1483 for (i = 0; i < 4; i++) {
1484 mmio_write_32(DBSC_DBPDRGA0, 0x000000B0 + i * 0x20);
1485 dqsgd_0c = mmio_read_32(DBSC_DBPDRGD0) & 0x000000FF;
1486 mmio_write_32(DBSC_DBPDRGA0, 0x000000B1 + i * 0x20);
1487 bdlcount_0c = (mmio_read_32(DBSC_DBPDRGD0) &
1488 0x0000FF00) >> 8;
1489 bdlcount_0c_div2 = (bdlcount_0c >> 1);
1490 bdlcount_0c_div4 = (bdlcount_0c >> 2);
1491 bdlcount_0c_div8 = (bdlcount_0c >> 3);
1492 bdlcount_0c_div16 = (bdlcount_0c >> 4);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1493
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1494 if (ddr_md == 0) { /* 1584Mbps */
1495 lcdl_judge1 = bdlcount_0c_div2 +
1496 bdlcount_0c_div4 +
1497 bdlcount_0c_div8;
1498 lcdl_judge2 = bdlcount_0c +
1499 bdlcount_0c_div4 +
1500 bdlcount_0c_div16;
1501 } else { /* 1856Mbps */
1502 lcdl_judge1 = bdlcount_0c_div2 +
1503 bdlcount_0c_div4;
1504 lcdl_judge2 = bdlcount_0c +
1505 bdlcount_0c_div4;
1506 }
1507
1508 if (dqsgd_0c <= lcdl_judge1)
1509 continue;
1510
1511 if (dqsgd_0c <= lcdl_judge2) {
1512 mmio_write_32(DBSC_DBPDRGA0, 0xB0 + i * 0x20);
1513 regval = mmio_read_32(DBSC_DBPDRGD0) &
1514 0xFFFFFF00;
1515 mmio_write_32(DBSC_DBPDRGD0,
1516 (dqsgd_0c - bdlcount_0c_div8) |
1517 regval);
1518 } else {
1519 mmio_write_32(DBSC_DBPDRGA0, 0xB0 + i * 0x20);
1520 regval = mmio_read_32(DBSC_DBPDRGD0) &
1521 0xFFFFFF00;
1522 mmio_write_32(DBSC_DBPDRGD0, regval);
1523 mmio_write_32(DBSC_DBPDRGA0, 0xB2 + i * 0x20);
1524 gatesl_0c = mmio_read_32(DBSC_DBPDRGD0) & 0x7;
1525 mmio_write_32(DBSC_DBPDRGA0, 0xB2 + i * 0x20);
1526 regval = mmio_read_32(DBSC_DBPDRGD0) &
1527 0xFFFFFFF8;
1528 mmio_write_32(DBSC_DBPDRGD0,
1529 regval | (gatesl_0c + 1));
1530 mmio_write_32(DBSC_DBPDRGA0, 0xAF + i * 0x20);
1531 regval = mmio_read_32(DBSC_DBPDRGD0);
1532 rdqsd_0c = (regval & 0xFF00) >> 8;
1533 rdqsnd_0c = (regval & 0xFF0000) >> 16;
1534 mmio_write_32(DBSC_DBPDRGA0, 0xAF + i * 0x20);
1535 mmio_write_32(DBSC_DBPDRGD0,
1536 (regval & 0xFF0000FF) |
1537 ((rdqsd_0c +
1538 bdlcount_0c_div4) << 8) |
1539 ((rdqsnd_0c +
1540 bdlcount_0c_div4) << 16));
1541 mmio_write_32(DBSC_DBPDRGA0, 0xAA + i * 0x20);
1542 regval = (mmio_read_32(DBSC_DBPDRGD0));
1543 rbd_0c[0] = (regval) & 0x1f;
1544 rbd_0c[1] = (regval >> 8) & 0x1f;
1545 rbd_0c[2] = (regval >> 16) & 0x1f;
1546 rbd_0c[3] = (regval >> 24) & 0x1f;
1547 mmio_write_32(DBSC_DBPDRGA0, 0xAA + i * 0x20);
1548 regval = mmio_read_32(DBSC_DBPDRGD0) &
1549 0xE0E0E0E0;
1550 for (j = 0; j < 4; j++) {
1551 rbd_0c[j] = rbd_0c[j] +
1552 bdlcount_0c_div4;
1553 if (rbd_0c[j] > 0x1F)
1554 rbd_0c[j] = 0x1F;
1555 regval = regval | (rbd_0c[j] << 8 * j);
1556 }
1557 mmio_write_32(DBSC_DBPDRGD0, regval);
1558 mmio_write_32(DBSC_DBPDRGA0, 0xAB + i * 0x20);
1559 regval = (mmio_read_32(DBSC_DBPDRGD0));
1560 rbd_0c[0] = regval & 0x1f;
1561 rbd_0c[1] = (regval >> 8) & 0x1f;
1562 rbd_0c[2] = (regval >> 16) & 0x1f;
1563 rbd_0c[3] = (regval >> 24) & 0x1f;
1564 mmio_write_32(DBSC_DBPDRGA0, 0xAB + i * 0x20);
1565 regval = mmio_read_32(DBSC_DBPDRGD0) &
1566 0xE0E0E0E0;
1567 for (j = 0; j < 4; j++) {
1568 rbd_0c[j] = rbd_0c[j] +
1569 bdlcount_0c_div4;
1570 if (rbd_0c[j] > 0x1F)
1571 rbd_0c[j] = 0x1F;
1572 regval = regval | (rbd_0c[j] << 8 * j);
1573 }
1574 mmio_write_32(DBSC_DBPDRGD0, regval);
1575 }
Marek Vasut1ddb3bf2018-12-16 19:28:59 +0100[diff] [blame]1576 }
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1577 mmio_write_32(DBSC_DBPDRGA0, 0x00000002);
1578 mmio_write_32(DBSC_DBPDRGD0, 0x07D81E37);
1579 }
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1580
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1581 mmio_write_32(DBSC_DBPDRGA0, 0x00000003);
1582 if (byp_ctl == 1)
1583 mmio_write_32(DBSC_DBPDRGD0, 0x0380C720);
1584 else
1585 mmio_write_32(DBSC_DBPDRGD0, 0x0380C700);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1586
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1587 mmio_write_32(DBSC_DBPDRGA0, 0x00000007);
1588 while (mmio_read_32(DBSC_DBPDRGD0) & BIT(30))
1589 ;
1590 mmio_write_32(DBSC_DBPDRGA0, 0x00000021);
1591 mmio_write_32(DBSC_DBPDRGD0, 0x0024643E);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1592
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1593 /*
1594 * recovery_Step3(DBSC Setting 2)
1595 */
1596 mmio_write_32(DBSC_DBDFICUPDCNF, 0x40100001);
1597 mmio_write_32(DBSC_DBACEN, 0x00000001);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1598
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1599 if (pdqsr_ctl == 1) {
1600 mmio_write_32(0xE67F0018, 0x00000001);
1601 regval = mmio_read_32(0x40000000);
1602 mmio_write_32(DBSC_DBPDRGA0, 0x00000000);
1603 mmio_write_32(DBSC_DBPDRGD0, regval);
1604 mmio_write_32(DBSC_DBPDRGA0, 0x000000A0);
1605 mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5);
1606 mmio_write_32(DBSC_DBPDRGA0, 0x000000C0);
1607 mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5);
1608 mmio_write_32(DBSC_DBPDRGA0, 0x000000E0);
1609 mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5);
1610 mmio_write_32(DBSC_DBPDRGA0, 0x00000100);
1611 mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5);
1612 }
Marek Vasut432d7672018-12-12 18:06:39 +0100[diff] [blame]1613
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1614 /* PDR dynamic */
1615 if (pdr_ctl == 1) {
1616 mmio_write_32(DBSC_DBPDRGA0, 0x000000A3);
1617 mmio_write_32(DBSC_DBPDRGD0, 0x00000000);
1618 mmio_write_32(DBSC_DBPDRGA0, 0x000000C3);
1619 mmio_write_32(DBSC_DBPDRGD0, 0x00000000);
1620 mmio_write_32(DBSC_DBPDRGA0, 0x000000E3);
1621 mmio_write_32(DBSC_DBPDRGD0, 0x00000000);
1622 mmio_write_32(DBSC_DBPDRGA0, 0x00000103);
1623 mmio_write_32(DBSC_DBPDRGD0, 0x00000000);
1624 }
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1625
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1626 mmio_write_32(DBSC_DBPDLK0, 0x00000000);
1627 mmio_write_32(DBSC_DBSYSCNT0, 0x00000000);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1628
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1629#ifdef ddr_qos_init_setting /* only for non qos_init */
1630 mmio_write_32(DBSC_DBSYSCNT0, 0x00001234);
1631 mmio_write_32(DBSC_DBCAM0CNF1, 0x00043218);
1632 mmio_write_32(DBSC_DBCAM0CNF2, 0x000000F4);
1633 mmio_write_32(DBSC_DBSCHCNT0, 0x000f0037);
1634 mmio_write_32(DBSC_DBSCHSZ0, 0x00000001);
1635 mmio_write_32(DBSC_DBSCHRW0, 0x22421111);
1636 mmio_write_32(DBSC_SCFCTST2, 0x012F1123);
1637 mmio_write_32(DBSC_DBSCHQOS00, 0x00000F00);
1638 mmio_write_32(DBSC_DBSCHQOS01, 0x00000B00);
1639 mmio_write_32(DBSC_DBSCHQOS02, 0x00000000);
1640 mmio_write_32(DBSC_DBSCHQOS03, 0x00000000);
1641 mmio_write_32(DBSC_DBSCHQOS40, 0x00000300);
1642 mmio_write_32(DBSC_DBSCHQOS41, 0x000002F0);
1643 mmio_write_32(DBSC_DBSCHQOS42, 0x00000200);
1644 mmio_write_32(DBSC_DBSCHQOS43, 0x00000100);
1645 mmio_write_32(DBSC_DBSCHQOS90, 0x00000100);
1646 mmio_write_32(DBSC_DBSCHQOS91, 0x000000F0);
1647 mmio_write_32(DBSC_DBSCHQOS92, 0x000000A0);
1648 mmio_write_32(DBSC_DBSCHQOS93, 0x00000040);
1649 mmio_write_32(DBSC_DBSCHQOS130, 0x00000100);
1650 mmio_write_32(DBSC_DBSCHQOS131, 0x000000F0);
1651 mmio_write_32(DBSC_DBSCHQOS132, 0x000000A0);
1652 mmio_write_32(DBSC_DBSCHQOS133, 0x00000040);
1653 mmio_write_32(DBSC_DBSCHQOS140, 0x000000C0);
1654 mmio_write_32(DBSC_DBSCHQOS141, 0x000000B0);
1655 mmio_write_32(DBSC_DBSCHQOS142, 0x00000080);
1656 mmio_write_32(DBSC_DBSCHQOS143, 0x00000040);
1657 mmio_write_32(DBSC_DBSCHQOS150, 0x00000040);
1658 mmio_write_32(DBSC_DBSCHQOS151, 0x00000030);
1659 mmio_write_32(DBSC_DBSCHQOS152, 0x00000020);
1660 mmio_write_32(DBSC_DBSCHQOS153, 0x00000010);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1661
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1662 if (pdqsr_ctl == 0)
1663 mmio_write_32(0xE67F0018, 0x00000001);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1664
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1665 mmio_write_32(DBSC_DBSYSCNT0, 0x00000000);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1666#endif
1667
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1668 return 1;
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1669
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1670} /* recovery_from_backup_mode */
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1671
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1672/*
1673 * init_ddr : MD19=0,DDR3L,1584Mbps / MD19=1,DDR3L,1856Mbps
1674 */
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1675
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1676/*
1677 * DDR Initialize entry for IPL
1678 */
ldts0a596b42018-11-06 10:17:12 +0100[diff] [blame]1679int32_t rcar_dram_init(void)
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1680{
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1681 uint32_t dataL;
1682 uint32_t failcount;
1683 uint32_t md = 0;
1684 uint32_t ddr = 0;
1685 uint32_t ddr_backup;
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1686
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1687 md = *((volatile uint32_t*)RST_MODEMR);
1688 ddr = (md & 0x00080000) >> 19;
1689 if (ddr == 0x0)
1690 NOTICE("BL2: DDR1584(%s)\n", RCAR_E3_DDR_VERSION);
1691 else if (ddr == 0x1)
1692 NOTICE("BL2: DDR1856(%s)\n", RCAR_E3_DDR_VERSION);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1693
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1694 rcar_dram_get_boot_status(&ddr_backup);
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1695
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1696 if (ddr_backup == DRAM_BOOT_STATUS_WARM)
1697 dataL = recovery_from_backup_mode(ddr_backup); /* WARM boot */
1698 else
1699 dataL = init_ddr(); /* COLD boot */
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1700
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1701 if (dataL == 1)
1702 failcount = 0;
1703 else
1704 failcount = 1;
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1705
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1706 if (failcount == 0)
1707 return INITDRAM_OK;
1708 else
1709 return INITDRAM_NG;
Jorge Ramirez-Ortiz47503d22018-09-23 09:36:52 +0200[diff] [blame]1710
Marek Vasut845adaa2019-07-14 11:26:03 +0200[diff] [blame]1711}