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git01.mediatek.com / filogic / atf / 6fbe0fce8fc37c87acddbb4198b90451e3bff496 / drivers / staging / renesas / rcar / ddr / ddr_a / ddr_init_e3.c
  1. 845adaa rcar_gen3: drivers: ddr-a: Fix E3 DDR init coding style by Marek Vasut · 5 years ago
  2. bd34213 rcar_gen3: drivers: ddr-a: Pass ddrBackup around by Marek Vasut · 5 years ago
  3. 11d9443 rcar_gen3: drivers: ddr-a: Inline ddr_init_e3.h by Marek Vasut · 5 years ago
  4. b9e78d4 rcar_gen3: drivers: ddr-a: Replace {Read,Write}Reg_32() with mmio_{read,write}_32() by Marek Vasut · 5 years ago
  5. 291bbfe rcar_gen3: drivers: ddr-a: Unify register definitions by Marek Vasut · 5 years ago
  6. a75f826 rcar_gen3: drivers: ddr: Replace BITn with BIT(n) macro by Marek Vasut · 5 years ago
  7. 82e63c8 rcar_gen3: drivers: ddr-a: Update E3 DDR setting by Hiroyuki Nakano · 5 years ago
  8. 5651989 rcar_gen3: drivers: ddr: Clean up printouts by Marek Vasut · 6 years ago
  9. 1ddb3bf rcar_gen3: drivers: ddr-a: Checkpatch cleanup by Marek Vasut · 6 years ago
  10. 432d767 rcar_gen3: drivers: ddr-a: Synchronize tables by Marek Vasut · 6 years ago
  11. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · 6 years ago
  12. 0a596b4 rcar_gen3: E3 target: fix compilation issues by ldts · 6 years ago
  13. 47503d2 rcar_gen3: drivers: staging by Jorge Ramirez-Ortiz · 6 years ago