Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 1 | /* |
Vikram Kanigiri | fbb1301 | 2016-02-15 11:54:14 +0000 | [diff] [blame] | 2 | * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved. |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * Redistributions of source code must retain the above copyright notice, this |
| 8 | * list of conditions and the following disclaimer. |
| 9 | * |
| 10 | * Redistributions in binary form must reproduce the above copyright notice, |
| 11 | * this list of conditions and the following disclaimer in the documentation |
| 12 | * and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * Neither the name of ARM nor the names of its contributors may be used |
| 15 | * to endorse or promote products derived from this software without specific |
| 16 | * prior written permission. |
| 17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 22 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 28 | * POSSIBILITY OF SUCH DAMAGE. |
| 29 | */ |
| 30 | |
Dan Handley | 2b6b574 | 2015-03-19 19:17:53 +0000 | [diff] [blame] | 31 | #include <arm_config.h> |
| 32 | #include <arm_def.h> |
Dan Handley | 714a0d2 | 2014-04-09 13:13:04 +0100 | [diff] [blame] | 33 | #include <debug.h> |
Achin Gupta | 1fa7eb6 | 2015-11-03 14:18:34 +0000 | [diff] [blame] | 34 | #include <gicv2.h> |
Dan Handley | 2bd4ef2 | 2014-04-09 13:14:54 +0100 | [diff] [blame] | 35 | #include <mmio.h> |
Dan Handley | 2b6b574 | 2015-03-19 19:17:53 +0000 | [diff] [blame] | 36 | #include <plat_arm.h> |
| 37 | #include <v2m_def.h> |
Dan Handley | ed6ff95 | 2014-05-14 17:44:19 +0100 | [diff] [blame] | 38 | #include "../fvp_def.h" |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 39 | |
Achin Gupta | 1fa7eb6 | 2015-11-03 14:18:34 +0000 | [diff] [blame] | 40 | /* Defines for GIC Driver build time selection */ |
| 41 | #define FVP_GICV2 1 |
| 42 | #define FVP_GICV3 2 |
| 43 | #define FVP_GICV3_LEGACY 3 |
| 44 | |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 45 | /******************************************************************************* |
Dan Handley | 2b6b574 | 2015-03-19 19:17:53 +0000 | [diff] [blame] | 46 | * arm_config holds the characteristics of the differences between the three FVP |
| 47 | * platforms (Base, A53_A57 & Foundation). It will be populated during cold boot |
Vikram Kanigiri | fbb1301 | 2016-02-15 11:54:14 +0000 | [diff] [blame] | 48 | * at each boot stage by the primary before enabling the MMU (to allow |
| 49 | * interconnect configuration) & used thereafter. Each BL will have its own copy |
| 50 | * to allow independent operation. |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 51 | ******************************************************************************/ |
Dan Handley | 2b6b574 | 2015-03-19 19:17:53 +0000 | [diff] [blame] | 52 | arm_config_t arm_config; |
Soby Mathew | b08bc04 | 2014-09-03 17:48:44 +0100 | [diff] [blame] | 53 | |
| 54 | #define MAP_DEVICE0 MAP_REGION_FLAT(DEVICE0_BASE, \ |
| 55 | DEVICE0_SIZE, \ |
| 56 | MT_DEVICE | MT_RW | MT_SECURE) |
| 57 | |
| 58 | #define MAP_DEVICE1 MAP_REGION_FLAT(DEVICE1_BASE, \ |
| 59 | DEVICE1_SIZE, \ |
| 60 | MT_DEVICE | MT_RW | MT_SECURE) |
| 61 | |
Juan Castillo | 31a68f0 | 2015-04-14 12:49:03 +0100 | [diff] [blame] | 62 | #define MAP_DEVICE2 MAP_REGION_FLAT(DEVICE2_BASE, \ |
| 63 | DEVICE2_SIZE, \ |
| 64 | MT_DEVICE | MT_RO | MT_SECURE) |
| 65 | |
| 66 | |
Jon Medhurst | b1eb093 | 2014-02-26 16:27:53 +0000 | [diff] [blame] | 67 | /* |
Soby Mathew | b08bc04 | 2014-09-03 17:48:44 +0100 | [diff] [blame] | 68 | * Table of regions for various BL stages to map using the MMU. |
Sandrine Bailleux | 74a62b3 | 2014-05-09 11:35:36 +0100 | [diff] [blame] | 69 | * This doesn't include TZRAM as the 'mem_layout' argument passed to |
Dan Handley | 2b6b574 | 2015-03-19 19:17:53 +0000 | [diff] [blame] | 70 | * arm_configure_mmu_elx() will give the available subset of that, |
Jon Medhurst | b1eb093 | 2014-02-26 16:27:53 +0000 | [diff] [blame] | 71 | */ |
Soby Mathew | b08bc04 | 2014-09-03 17:48:44 +0100 | [diff] [blame] | 72 | #if IMAGE_BL1 |
Dan Handley | 2b6b574 | 2015-03-19 19:17:53 +0000 | [diff] [blame] | 73 | const mmap_region_t plat_arm_mmap[] = { |
| 74 | ARM_MAP_SHARED_RAM, |
Juan Castillo | b6132f1 | 2015-10-06 14:01:35 +0100 | [diff] [blame] | 75 | V2M_MAP_FLASH0_RW, |
Dan Handley | 2b6b574 | 2015-03-19 19:17:53 +0000 | [diff] [blame] | 76 | V2M_MAP_IOFPGA, |
Soby Mathew | b08bc04 | 2014-09-03 17:48:44 +0100 | [diff] [blame] | 77 | MAP_DEVICE0, |
| 78 | MAP_DEVICE1, |
Juan Castillo | 31a68f0 | 2015-04-14 12:49:03 +0100 | [diff] [blame] | 79 | MAP_DEVICE2, |
Yatharth Kochar | 736a3bf | 2015-10-11 14:14:55 +0100 | [diff] [blame] | 80 | #if TRUSTED_BOARD_BOOT |
| 81 | ARM_MAP_NS_DRAM1, |
| 82 | #endif |
Soby Mathew | b08bc04 | 2014-09-03 17:48:44 +0100 | [diff] [blame] | 83 | {0} |
| 84 | }; |
| 85 | #endif |
| 86 | #if IMAGE_BL2 |
Dan Handley | 2b6b574 | 2015-03-19 19:17:53 +0000 | [diff] [blame] | 87 | const mmap_region_t plat_arm_mmap[] = { |
| 88 | ARM_MAP_SHARED_RAM, |
Juan Castillo | b6132f1 | 2015-10-06 14:01:35 +0100 | [diff] [blame] | 89 | V2M_MAP_FLASH0_RW, |
Dan Handley | 2b6b574 | 2015-03-19 19:17:53 +0000 | [diff] [blame] | 90 | V2M_MAP_IOFPGA, |
Soby Mathew | b08bc04 | 2014-09-03 17:48:44 +0100 | [diff] [blame] | 91 | MAP_DEVICE0, |
| 92 | MAP_DEVICE1, |
Juan Castillo | 31a68f0 | 2015-04-14 12:49:03 +0100 | [diff] [blame] | 93 | MAP_DEVICE2, |
Dan Handley | 2b6b574 | 2015-03-19 19:17:53 +0000 | [diff] [blame] | 94 | ARM_MAP_NS_DRAM1, |
| 95 | ARM_MAP_TSP_SEC_MEM, |
David Wang | 0ba499f | 2016-03-07 11:02:57 +0800 | [diff] [blame] | 96 | #if ARM_BL31_IN_DRAM |
| 97 | ARM_MAP_BL31_SEC_DRAM, |
| 98 | #endif |
Soby Mathew | b08bc04 | 2014-09-03 17:48:44 +0100 | [diff] [blame] | 99 | {0} |
| 100 | }; |
| 101 | #endif |
Yatharth Kochar | 3a11eda | 2015-10-14 15:28:11 +0100 | [diff] [blame] | 102 | #if IMAGE_BL2U |
| 103 | const mmap_region_t plat_arm_mmap[] = { |
| 104 | MAP_DEVICE0, |
| 105 | V2M_MAP_IOFPGA, |
| 106 | {0} |
| 107 | }; |
| 108 | #endif |
Soby Mathew | b08bc04 | 2014-09-03 17:48:44 +0100 | [diff] [blame] | 109 | #if IMAGE_BL31 |
Dan Handley | 2b6b574 | 2015-03-19 19:17:53 +0000 | [diff] [blame] | 110 | const mmap_region_t plat_arm_mmap[] = { |
| 111 | ARM_MAP_SHARED_RAM, |
| 112 | V2M_MAP_IOFPGA, |
Soby Mathew | b08bc04 | 2014-09-03 17:48:44 +0100 | [diff] [blame] | 113 | MAP_DEVICE0, |
| 114 | MAP_DEVICE1, |
| 115 | {0} |
| 116 | }; |
| 117 | #endif |
| 118 | #if IMAGE_BL32 |
Dan Handley | 2b6b574 | 2015-03-19 19:17:53 +0000 | [diff] [blame] | 119 | const mmap_region_t plat_arm_mmap[] = { |
| 120 | V2M_MAP_IOFPGA, |
Soby Mathew | b08bc04 | 2014-09-03 17:48:44 +0100 | [diff] [blame] | 121 | MAP_DEVICE0, |
| 122 | MAP_DEVICE1, |
Jon Medhurst | b1eb093 | 2014-02-26 16:27:53 +0000 | [diff] [blame] | 123 | {0} |
| 124 | }; |
Soby Mathew | b08bc04 | 2014-09-03 17:48:44 +0100 | [diff] [blame] | 125 | #endif |
Jon Medhurst | b1eb093 | 2014-02-26 16:27:53 +0000 | [diff] [blame] | 126 | |
Dan Handley | 2b6b574 | 2015-03-19 19:17:53 +0000 | [diff] [blame] | 127 | ARM_CASSERT_MMAP |
Soby Mathew | 13ee968 | 2015-01-22 11:22:22 +0000 | [diff] [blame] | 128 | |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 129 | |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 130 | /******************************************************************************* |
| 131 | * A single boot loader stack is expected to work on both the Foundation FVP |
| 132 | * models and the two flavours of the Base FVP models (AEMv8 & Cortex). The |
| 133 | * SYS_ID register provides a mechanism for detecting the differences between |
| 134 | * these platforms. This information is stored in a per-BL array to allow the |
| 135 | * code to take the correct path.Per BL platform configuration. |
| 136 | ******************************************************************************/ |
Dan Handley | 2b6b574 | 2015-03-19 19:17:53 +0000 | [diff] [blame] | 137 | void fvp_config_setup(void) |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 138 | { |
Soby Mathew | 8e2f287 | 2014-08-14 12:49:05 +0100 | [diff] [blame] | 139 | unsigned int rev, hbi, bld, arch, sys_id; |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 140 | |
Dan Handley | 2b6b574 | 2015-03-19 19:17:53 +0000 | [diff] [blame] | 141 | sys_id = mmio_read_32(V2M_SYSREGS_BASE + V2M_SYS_ID); |
| 142 | rev = (sys_id >> V2M_SYS_ID_REV_SHIFT) & V2M_SYS_ID_REV_MASK; |
| 143 | hbi = (sys_id >> V2M_SYS_ID_HBI_SHIFT) & V2M_SYS_ID_HBI_MASK; |
| 144 | bld = (sys_id >> V2M_SYS_ID_BLD_SHIFT) & V2M_SYS_ID_BLD_MASK; |
| 145 | arch = (sys_id >> V2M_SYS_ID_ARCH_SHIFT) & V2M_SYS_ID_ARCH_MASK; |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 146 | |
Andrew Thoelke | 960347d | 2014-06-26 14:27:26 +0100 | [diff] [blame] | 147 | if (arch != ARCH_MODEL) { |
| 148 | ERROR("This firmware is for FVP models\n"); |
James Morrissey | 40a6f64 | 2014-02-10 14:24:36 +0000 | [diff] [blame] | 149 | panic(); |
Andrew Thoelke | 960347d | 2014-06-26 14:27:26 +0100 | [diff] [blame] | 150 | } |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 151 | |
| 152 | /* |
| 153 | * The build field in the SYS_ID tells which variant of the GIC |
| 154 | * memory is implemented by the model. |
| 155 | */ |
| 156 | switch (bld) { |
| 157 | case BLD_GIC_VE_MMAP: |
Soby Mathew | cf022c5 | 2016-01-13 17:06:00 +0000 | [diff] [blame] | 158 | ERROR("Legacy Versatile Express memory map for GIC peripheral" |
| 159 | " is not supported\n"); |
Achin Gupta | 1fa7eb6 | 2015-11-03 14:18:34 +0000 | [diff] [blame] | 160 | panic(); |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 161 | break; |
| 162 | case BLD_GIC_A53A57_MMAP: |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 163 | break; |
| 164 | default: |
Andrew Thoelke | 960347d | 2014-06-26 14:27:26 +0100 | [diff] [blame] | 165 | ERROR("Unsupported board build %x\n", bld); |
| 166 | panic(); |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 167 | } |
| 168 | |
| 169 | /* |
| 170 | * The hbi field in the SYS_ID is 0x020 for the Base FVP & 0x010 |
| 171 | * for the Foundation FVP. |
| 172 | */ |
| 173 | switch (hbi) { |
Dan Handley | 2b6b574 | 2015-03-19 19:17:53 +0000 | [diff] [blame] | 174 | case HBI_FOUNDATION_FVP: |
Dan Handley | 2b6b574 | 2015-03-19 19:17:53 +0000 | [diff] [blame] | 175 | arm_config.flags = 0; |
Andrew Thoelke | 960347d | 2014-06-26 14:27:26 +0100 | [diff] [blame] | 176 | |
| 177 | /* |
| 178 | * Check for supported revisions of Foundation FVP |
| 179 | * Allow future revisions to run but emit warning diagnostic |
| 180 | */ |
| 181 | switch (rev) { |
Dan Handley | 2b6b574 | 2015-03-19 19:17:53 +0000 | [diff] [blame] | 182 | case REV_FOUNDATION_FVP_V2_0: |
| 183 | case REV_FOUNDATION_FVP_V2_1: |
| 184 | case REV_FOUNDATION_FVP_v9_1: |
Andrew Thoelke | 960347d | 2014-06-26 14:27:26 +0100 | [diff] [blame] | 185 | break; |
| 186 | default: |
| 187 | WARN("Unrecognized Foundation FVP revision %x\n", rev); |
| 188 | break; |
| 189 | } |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 190 | break; |
Dan Handley | 2b6b574 | 2015-03-19 19:17:53 +0000 | [diff] [blame] | 191 | case HBI_BASE_FVP: |
Dan Handley | 2b6b574 | 2015-03-19 19:17:53 +0000 | [diff] [blame] | 192 | arm_config.flags |= ARM_CONFIG_BASE_MMAP | |
Vikram Kanigiri | fbb1301 | 2016-02-15 11:54:14 +0000 | [diff] [blame] | 193 | ARM_CONFIG_HAS_INTERCONNECT | ARM_CONFIG_HAS_TZC; |
Andrew Thoelke | 960347d | 2014-06-26 14:27:26 +0100 | [diff] [blame] | 194 | |
| 195 | /* |
| 196 | * Check for supported revisions |
| 197 | * Allow future revisions to run but emit warning diagnostic |
| 198 | */ |
| 199 | switch (rev) { |
Dan Handley | 2b6b574 | 2015-03-19 19:17:53 +0000 | [diff] [blame] | 200 | case REV_BASE_FVP_V0: |
Andrew Thoelke | 960347d | 2014-06-26 14:27:26 +0100 | [diff] [blame] | 201 | break; |
| 202 | default: |
| 203 | WARN("Unrecognized Base FVP revision %x\n", rev); |
| 204 | break; |
| 205 | } |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 206 | break; |
| 207 | default: |
Andrew Thoelke | 960347d | 2014-06-26 14:27:26 +0100 | [diff] [blame] | 208 | ERROR("Unsupported board HBI number 0x%x\n", hbi); |
| 209 | panic(); |
Achin Gupta | 4f6ad66 | 2013-10-25 09:08:21 +0100 | [diff] [blame] | 210 | } |
Sandrine Bailleux | 3fa9847 | 2014-03-31 11:25:18 +0100 | [diff] [blame] | 211 | } |
Vikram Kanigiri | 9637745 | 2014-04-24 11:02:16 +0100 | [diff] [blame] | 212 | |
Vikram Kanigiri | 4e97e54 | 2015-02-26 15:25:58 +0000 | [diff] [blame] | 213 | |
Vikram Kanigiri | fbb1301 | 2016-02-15 11:54:14 +0000 | [diff] [blame] | 214 | void fvp_interconnect_init(void) |
Vikram Kanigiri | 9637745 | 2014-04-24 11:02:16 +0100 | [diff] [blame] | 215 | { |
Vikram Kanigiri | fbb1301 | 2016-02-15 11:54:14 +0000 | [diff] [blame] | 216 | if (arm_config.flags & ARM_CONFIG_HAS_INTERCONNECT) |
| 217 | plat_arm_interconnect_init(); |
Dan Handley | be234f9 | 2014-08-04 16:11:15 +0100 | [diff] [blame] | 218 | } |
| 219 | |
Vikram Kanigiri | fbb1301 | 2016-02-15 11:54:14 +0000 | [diff] [blame] | 220 | void fvp_interconnect_enable(void) |
Dan Handley | be234f9 | 2014-08-04 16:11:15 +0100 | [diff] [blame] | 221 | { |
Vikram Kanigiri | fbb1301 | 2016-02-15 11:54:14 +0000 | [diff] [blame] | 222 | if (arm_config.flags & ARM_CONFIG_HAS_INTERCONNECT) |
| 223 | plat_arm_interconnect_enter_coherency(); |
Vikram Kanigiri | 4e97e54 | 2015-02-26 15:25:58 +0000 | [diff] [blame] | 224 | } |
| 225 | |
Vikram Kanigiri | fbb1301 | 2016-02-15 11:54:14 +0000 | [diff] [blame] | 226 | void fvp_interconnect_disable(void) |
Vikram Kanigiri | 4e97e54 | 2015-02-26 15:25:58 +0000 | [diff] [blame] | 227 | { |
Vikram Kanigiri | fbb1301 | 2016-02-15 11:54:14 +0000 | [diff] [blame] | 228 | if (arm_config.flags & ARM_CONFIG_HAS_INTERCONNECT) |
| 229 | plat_arm_interconnect_exit_coherency(); |
Vikram Kanigiri | 9637745 | 2014-04-24 11:02:16 +0100 | [diff] [blame] | 230 | } |