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Dan Handley9df48042015-03-19 18:58:55 +00001/*
Soby Mathew7d5a2e72018-01-10 15:59:31 +00002 * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
Dan Handley9df48042015-03-19 18:58:55 +00003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Dan Handley9df48042015-03-19 18:58:55 +00005 */
6
Antonio Nino Diaze0f90632018-12-14 00:18:21 +00007#include <assert.h>
8
Dan Handley9df48042015-03-19 18:58:55 +00009#include <arch.h>
10#include <arch_helpers.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000011#include <common/bl_common.h>
12#include <common/debug.h>
13#include <drivers/console.h>
14#include <lib/extensions/ras.h>
15#include <lib/mmio.h>
16#include <lib/utils.h>
17#include <lib/xlat_tables/xlat_tables_compat.h>
Antonio Nino Diazbd7b7402019-01-25 14:30:04 +000018#include <plat/arm/common/plat_arm.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000019#include <plat/common/platform.h>
Antonio Nino Diaza320ecd2019-01-15 14:19:50 +000020#include <platform_def.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000021
Dan Handley9df48042015-03-19 18:58:55 +000022/*
23 * Placeholder variables for copying the arguments that have been passed to
Juan Castillo7d199412015-12-14 09:35:25 +000024 * BL31 from BL2.
Dan Handley9df48042015-03-19 18:58:55 +000025 */
26static entry_point_info_t bl32_image_ep_info;
27static entry_point_info_t bl33_image_ep_info;
28
Soby Mathew7823d9e2018-10-14 08:13:44 +010029#if !RESET_TO_BL31
Soby Mathewaf14b462018-06-01 16:53:38 +010030/*
31 * Check that BL31_BASE is above ARM_TB_FW_CONFIG_LIMIT. The reserved page
32 * is required for SOC_FW_CONFIG/TOS_FW_CONFIG passed from BL2.
33 */
34CASSERT(BL31_BASE >= ARM_TB_FW_CONFIG_LIMIT, assert_bl31_base_overflows);
Soby Mathew7823d9e2018-10-14 08:13:44 +010035#endif
Dan Handley9df48042015-03-19 18:58:55 +000036
37/* Weak definitions may be overridden in specific ARM standard platform */
Soby Mathew7d5a2e72018-01-10 15:59:31 +000038#pragma weak bl31_early_platform_setup2
Dan Handley9df48042015-03-19 18:58:55 +000039#pragma weak bl31_platform_setup
40#pragma weak bl31_plat_arch_setup
41#pragma weak bl31_plat_get_next_image_ep_info
Dan Handley9df48042015-03-19 18:58:55 +000042
Daniel Boulbyb1b058d2018-09-18 11:52:49 +010043#define MAP_BL31_TOTAL MAP_REGION_FLAT( \
Soby Mathew7823d9e2018-10-14 08:13:44 +010044 BL31_START, \
45 BL31_END - BL31_START, \
Daniel Boulby45a2c9e2018-07-06 16:54:44 +010046 MT_MEMORY | MT_RW | MT_SECURE)
Daniel Boulbyb1b058d2018-09-18 11:52:49 +010047#if RECLAIM_INIT_CODE
48IMPORT_SYM(unsigned long, __INIT_CODE_START__, BL_INIT_CODE_BASE);
49IMPORT_SYM(unsigned long, __INIT_CODE_END__, BL_INIT_CODE_END);
50
51#define MAP_BL_INIT_CODE MAP_REGION_FLAT( \
52 BL_INIT_CODE_BASE, \
53 BL_INIT_CODE_END \
54 - BL_INIT_CODE_BASE, \
55 MT_CODE | MT_SECURE)
56#endif
Dan Handley9df48042015-03-19 18:58:55 +000057
58/*******************************************************************************
59 * Return a pointer to the 'entry_point_info' structure of the next image for the
Juan Castillo7d199412015-12-14 09:35:25 +000060 * security state specified. BL33 corresponds to the non-secure image type
61 * while BL32 corresponds to the secure image type. A NULL pointer is returned
Dan Handley9df48042015-03-19 18:58:55 +000062 * if the image does not exist.
63 ******************************************************************************/
Sandrine Bailleuxb3b6e222018-07-11 12:44:22 +020064struct entry_point_info *bl31_plat_get_next_image_ep_info(uint32_t type)
Dan Handley9df48042015-03-19 18:58:55 +000065{
66 entry_point_info_t *next_image_info;
67
68 assert(sec_state_is_valid(type));
69 next_image_info = (type == NON_SECURE)
70 ? &bl33_image_ep_info : &bl32_image_ep_info;
71 /*
72 * None of the images on the ARM development platforms can have 0x0
73 * as the entrypoint
74 */
75 if (next_image_info->pc)
76 return next_image_info;
77 else
78 return NULL;
79}
80
81/*******************************************************************************
Juan Castillo7d199412015-12-14 09:35:25 +000082 * Perform any BL31 early platform setup common to ARM standard platforms.
Dan Handley9df48042015-03-19 18:58:55 +000083 * Here is an opportunity to copy parameters passed by the calling EL (S-EL1
John Tsichritzisd653d332018-09-14 10:34:57 +010084 * in BL2 & EL3 in BL1) before they are lost (potentially). This needs to be
Dan Handley9df48042015-03-19 18:58:55 +000085 * done before the MMU is initialized so that the memory layout can be used
86 * while creating page tables. BL2 has flushed this information to memory, so
87 * we are guaranteed to pick up good data.
88 ******************************************************************************/
Daniel Boulbyf45a4bb2018-09-18 13:26:03 +010089void __init arm_bl31_early_platform_setup(void *from_bl2, uintptr_t soc_fw_config,
Soby Mathew7d5a2e72018-01-10 15:59:31 +000090 uintptr_t hw_config, void *plat_params_from_bl2)
Dan Handley9df48042015-03-19 18:58:55 +000091{
92 /* Initialize the console to provide early debug support */
Antonio Nino Diaz23ede6a2018-06-19 09:29:36 +010093 arm_console_boot_init();
Dan Handley9df48042015-03-19 18:58:55 +000094
95#if RESET_TO_BL31
Juan Castillo7d199412015-12-14 09:35:25 +000096 /* There are no parameters from BL2 if BL31 is a reset vector */
Dan Handley9df48042015-03-19 18:58:55 +000097 assert(from_bl2 == NULL);
98 assert(plat_params_from_bl2 == NULL);
99
Antonio Nino Diazd9166ac2018-05-11 11:15:10 +0100100# ifdef BL32_BASE
Juan Castillo7d199412015-12-14 09:35:25 +0000101 /* Populate entry point information for BL32 */
Dan Handley9df48042015-03-19 18:58:55 +0000102 SET_PARAM_HEAD(&bl32_image_ep_info,
103 PARAM_EP,
104 VERSION_1,
105 0);
106 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE);
107 bl32_image_ep_info.pc = BL32_BASE;
108 bl32_image_ep_info.spsr = arm_get_spsr_for_bl32_entry();
Antonio Nino Diazd9166ac2018-05-11 11:15:10 +0100109# endif /* BL32_BASE */
Dan Handley9df48042015-03-19 18:58:55 +0000110
Juan Castillo7d199412015-12-14 09:35:25 +0000111 /* Populate entry point information for BL33 */
Dan Handley9df48042015-03-19 18:58:55 +0000112 SET_PARAM_HEAD(&bl33_image_ep_info,
113 PARAM_EP,
114 VERSION_1,
115 0);
116 /*
Juan Castillo7d199412015-12-14 09:35:25 +0000117 * Tell BL31 where the non-trusted software image
Dan Handley9df48042015-03-19 18:58:55 +0000118 * is located and the entry state information
119 */
120 bl33_image_ep_info.pc = plat_get_ns_image_entrypoint();
Soby Mathew4876ae32016-05-09 17:20:10 +0100121
Dan Handley9df48042015-03-19 18:58:55 +0000122 bl33_image_ep_info.spsr = arm_get_spsr_for_bl33_entry();
123 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE);
124
Antonio Nino Diazd9166ac2018-05-11 11:15:10 +0100125# if ARM_LINUX_KERNEL_AS_BL33
126 /*
127 * According to the file ``Documentation/arm64/booting.txt`` of the
128 * Linux kernel tree, Linux expects the physical address of the device
129 * tree blob (DTB) in x0, while x1-x3 are reserved for future use and
130 * must be 0.
131 */
132 bl33_image_ep_info.args.arg0 = (u_register_t)ARM_PRELOADED_DTB_BASE;
133 bl33_image_ep_info.args.arg1 = 0U;
134 bl33_image_ep_info.args.arg2 = 0U;
135 bl33_image_ep_info.args.arg3 = 0U;
136# endif
137
Yatharth Kocharf9a0f162016-09-13 17:07:57 +0100138#else /* RESET_TO_BL31 */
139
Dan Handley9df48042015-03-19 18:58:55 +0000140 /*
141 * In debug builds, we pass a special value in 'plat_params_from_bl2'
Juan Castillo7d199412015-12-14 09:35:25 +0000142 * to verify platform parameters from BL2 to BL31.
Dan Handley9df48042015-03-19 18:58:55 +0000143 * In release builds, it's not used.
144 */
145 assert(((unsigned long long)plat_params_from_bl2) ==
146 ARM_BL31_PLAT_PARAM_VAL);
147
Yatharth Kocharf9a0f162016-09-13 17:07:57 +0100148 /*
149 * Check params passed from BL2 should not be NULL,
150 */
151 bl_params_t *params_from_bl2 = (bl_params_t *)from_bl2;
152 assert(params_from_bl2 != NULL);
153 assert(params_from_bl2->h.type == PARAM_BL_PARAMS);
154 assert(params_from_bl2->h.version >= VERSION_2);
155
156 bl_params_node_t *bl_params = params_from_bl2->head;
157
158 /*
159 * Copy BL33 and BL32 (if present), entry point information.
160 * They are stored in Secure RAM, in BL2's address space.
161 */
Antonio Nino Diaze0b757d2018-08-24 16:30:29 +0100162 while (bl_params != NULL) {
Yatharth Kocharf9a0f162016-09-13 17:07:57 +0100163 if (bl_params->image_id == BL32_IMAGE_ID)
164 bl32_image_ep_info = *bl_params->ep_info;
165
166 if (bl_params->image_id == BL33_IMAGE_ID)
167 bl33_image_ep_info = *bl_params->ep_info;
168
169 bl_params = bl_params->next_params_info;
170 }
171
Antonio Nino Diaze0b757d2018-08-24 16:30:29 +0100172 if (bl33_image_ep_info.pc == 0U)
Yatharth Kocharf9a0f162016-09-13 17:07:57 +0100173 panic();
Yatharth Kocharf9a0f162016-09-13 17:07:57 +0100174#endif /* RESET_TO_BL31 */
Dan Handley9df48042015-03-19 18:58:55 +0000175}
176
Soby Mathew7d5a2e72018-01-10 15:59:31 +0000177void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
178 u_register_t arg2, u_register_t arg3)
Dan Handley9df48042015-03-19 18:58:55 +0000179{
Soby Mathew7d5a2e72018-01-10 15:59:31 +0000180 arm_bl31_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3);
Dan Handley9df48042015-03-19 18:58:55 +0000181
182 /*
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000183 * Initialize Interconnect for this cluster during cold boot.
Dan Handley9df48042015-03-19 18:58:55 +0000184 * No need for locks as no other CPU is active.
185 */
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000186 plat_arm_interconnect_init();
Sandrine Bailleuxda797f62015-05-14 14:13:05 +0100187
Dan Handley9df48042015-03-19 18:58:55 +0000188 /*
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000189 * Enable Interconnect coherency for the primary CPU's cluster.
Sandrine Bailleuxda797f62015-05-14 14:13:05 +0100190 * Earlier bootloader stages might already do this (e.g. Trusted
191 * Firmware's BL1 does it) but we can't assume so. There is no harm in
192 * executing this code twice anyway.
Dan Handley9df48042015-03-19 18:58:55 +0000193 * Platform specific PSCI code will enable coherency for other
194 * clusters.
195 */
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000196 plat_arm_interconnect_enter_coherency();
Dan Handley9df48042015-03-19 18:58:55 +0000197}
198
199/*******************************************************************************
Juan Castillo7d199412015-12-14 09:35:25 +0000200 * Perform any BL31 platform setup common to ARM standard platforms
Dan Handley9df48042015-03-19 18:58:55 +0000201 ******************************************************************************/
202void arm_bl31_platform_setup(void)
203{
Achin Gupta1fa7eb62015-11-03 14:18:34 +0000204 /* Initialize the GIC driver, cpu and distributor interfaces */
205 plat_arm_gic_driver_init();
Dan Handley9df48042015-03-19 18:58:55 +0000206 plat_arm_gic_init();
Dan Handley9df48042015-03-19 18:58:55 +0000207
208#if RESET_TO_BL31
209 /*
210 * Do initial security configuration to allow DRAM/device access
211 * (if earlier BL has not already done so).
212 */
213 plat_arm_security_setup();
214
Roberto Vargas550eb082018-01-05 16:00:05 +0000215#if defined(PLAT_ARM_MEM_PROT_ADDR)
216 arm_nor_psci_do_dyn_mem_protect();
217#endif /* PLAT_ARM_MEM_PROT_ADDR */
218
Dan Handley9df48042015-03-19 18:58:55 +0000219#endif /* RESET_TO_BL31 */
220
221 /* Enable and initialize the System level generic timer */
222 mmio_write_32(ARM_SYS_CNTCTL_BASE + CNTCR_OFF,
Antonio Nino Diaze0b757d2018-08-24 16:30:29 +0100223 CNTCR_FCREQ(0U) | CNTCR_EN);
Dan Handley9df48042015-03-19 18:58:55 +0000224
225 /* Allow access to the System counter timer module */
Soby Mathew61e8d0b2015-10-12 17:32:29 +0100226 arm_configure_sys_timer();
Dan Handley9df48042015-03-19 18:58:55 +0000227
228 /* Initialize power controller before setting up topology */
229 plat_arm_pwrc_setup();
Jeenu Viswambharana5b5b8d2018-02-06 12:21:39 +0000230
231#if RAS_EXTENSION
232 ras_init();
233#endif
Dan Handley9df48042015-03-19 18:58:55 +0000234}
235
Soby Mathew2fd66be2015-12-09 11:38:43 +0000236/*******************************************************************************
Juan Castillo7d199412015-12-14 09:35:25 +0000237 * Perform any BL31 platform runtime setup prior to BL31 exit common to ARM
Soby Mathew2fd66be2015-12-09 11:38:43 +0000238 * standard platforms
Antonio Nino Diaz23ede6a2018-06-19 09:29:36 +0100239 * Perform BL31 platform setup
Soby Mathew2fd66be2015-12-09 11:38:43 +0000240 ******************************************************************************/
241void arm_bl31_plat_runtime_setup(void)
242{
Antonio Nino Diaz23ede6a2018-06-19 09:29:36 +0100243 console_switch_state(CONSOLE_FLAG_RUNTIME);
Antonio Nino Diaz23ede6a2018-06-19 09:29:36 +0100244
Soby Mathew2fd66be2015-12-09 11:38:43 +0000245 /* Initialize the runtime console */
Antonio Nino Diaz23ede6a2018-06-19 09:29:36 +0100246 arm_console_runtime_init();
Daniel Boulbyb1b058d2018-09-18 11:52:49 +0100247#if RECLAIM_INIT_CODE
248 arm_free_init_memory();
249#endif
Soby Mathew2fd66be2015-12-09 11:38:43 +0000250}
251
Daniel Boulbyb1b058d2018-09-18 11:52:49 +0100252#if RECLAIM_INIT_CODE
253/*
254 * Zero out and make RW memory used to store image boot time code so it can
255 * be reclaimed during runtime
256 */
257void arm_free_init_memory(void)
258{
259 int ret = xlat_change_mem_attributes(BL_INIT_CODE_BASE,
260 BL_INIT_CODE_END - BL_INIT_CODE_BASE,
261 MT_RW_DATA);
262
263 if (ret != 0) {
264 ERROR("Could not reclaim initialization code");
265 panic();
266 }
267}
268#endif
269
Daniel Boulbyf45a4bb2018-09-18 13:26:03 +0100270void __init bl31_platform_setup(void)
Dan Handley9df48042015-03-19 18:58:55 +0000271{
272 arm_bl31_platform_setup();
273}
274
Soby Mathew2fd66be2015-12-09 11:38:43 +0000275void bl31_plat_runtime_setup(void)
276{
277 arm_bl31_plat_runtime_setup();
278}
279
Dan Handley9df48042015-03-19 18:58:55 +0000280/*******************************************************************************
Sandrine Bailleux4a1267a2016-05-18 16:11:47 +0100281 * Perform the very early platform specific architectural setup shared between
282 * ARM standard platforms. This only does basic initialization. Later
283 * architectural setup (bl31_arch_setup()) does not do anything platform
284 * specific.
Dan Handley9df48042015-03-19 18:58:55 +0000285 ******************************************************************************/
Daniel Boulbyf45a4bb2018-09-18 13:26:03 +0100286void __init arm_bl31_plat_arch_setup(void)
Dan Handley9df48042015-03-19 18:58:55 +0000287{
Daniel Boulby45a2c9e2018-07-06 16:54:44 +0100288 const mmap_region_t bl_regions[] = {
289 MAP_BL31_TOTAL,
Daniel Boulbyb1b058d2018-09-18 11:52:49 +0100290#if RECLAIM_INIT_CODE
291 MAP_BL_INIT_CODE,
292#endif
Daniel Boulby4e97abd2018-07-16 14:09:15 +0100293 ARM_MAP_BL_RO,
Roberto Vargase3adc372018-05-23 09:27:06 +0100294#if USE_ROMLIB
295 ARM_MAP_ROMLIB_CODE,
296 ARM_MAP_ROMLIB_DATA,
297#endif
Dan Handley9df48042015-03-19 18:58:55 +0000298#if USE_COHERENT_MEM
Daniel Boulby45a2c9e2018-07-06 16:54:44 +0100299 ARM_MAP_BL_COHERENT_RAM,
Dan Handley9df48042015-03-19 18:58:55 +0000300#endif
Daniel Boulby45a2c9e2018-07-06 16:54:44 +0100301 {0}
302 };
303
Roberto Vargas344ff022018-10-19 16:44:18 +0100304 setup_page_tables(bl_regions, plat_arm_get_mmap());
Daniel Boulby45a2c9e2018-07-06 16:54:44 +0100305
Sandrine Bailleux4a1267a2016-05-18 16:11:47 +0100306 enable_mmu_el3(0);
Roberto Vargase3adc372018-05-23 09:27:06 +0100307
308 arm_setup_romlib();
Dan Handley9df48042015-03-19 18:58:55 +0000309}
310
Daniel Boulbyf45a4bb2018-09-18 13:26:03 +0100311void __init bl31_plat_arch_setup(void)
Dan Handley9df48042015-03-19 18:58:55 +0000312{
313 arm_bl31_plat_arch_setup();
314}