blob: 68ba1b527e64764d87222b357ea3c0be81564fa4 [file] [log] [blame]
Hari Nagalla3c0ef772022-08-22 14:04:52 -05001#
2# Copyright (c) 2022, ARM Limited and Contributors. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7BL32_BASE ?= 0x9e800000
8$(eval $(call add_define,BL32_BASE))
9
10PRELOADED_BL33_BASE ?= 0x80080000
11$(eval $(call add_define,PRELOADED_BL33_BASE))
12
13K3_HW_CONFIG_BASE ?= 0x82000000
14$(eval $(call add_define,K3_HW_CONFIG_BASE))
15
16# Define sec_proxy usage as the full prioritized communication scheme
17K3_SEC_PROXY_LITE := 0
18$(eval $(call add_define,K3_SEC_PROXY_LITE))
19
Andrew Davise7d7d112023-01-10 13:14:37 -060020# Use a 4 cycle data RAM latency for J784s4
21K3_DATA_RAM_4_LATENCY := 1
22$(eval $(call add_define,K3_DATA_RAM_4_LATENCY))
23
Andrew Davis619d6fb2023-01-12 09:32:33 -060024# Delay snoop exclusive handling for J784s4
25K3_EXCLUSIVE_SNOOP_DELAY := 1
26$(eval $(call add_define,K3_EXCLUSIVE_SNOOP_DELAY))
27
Hari Nagalla3c0ef772022-08-22 14:04:52 -050028# System coherency is managed in hardware
29USE_COHERENT_MEM := 1
30
31PLAT_INCLUDES += \
32 -Iplat/ti/k3/board/j784s4/include \