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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
thagon01-arm6805e8d2023-07-12 10:43:58 -05002 * Copyright (c) 2013-2023, Arm Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Achin Gupta4f6ad662013-10-25 09:08:21 +01005 */
6
Dan Handley2bd4ef22014-04-09 13:14:54 +01007#include <assert.h>
Vikram Kanigiri614f3952014-05-28 13:41:51 +01008#include <string.h>
Achin Gupta7aea9082014-02-01 07:51:28 +00009
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000010#include <arch.h>
Alexei Fedorovf41355c2019-09-13 14:11:59 +010011#include <arch_features.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000012#include <arch_helpers.h>
13#include <bl31/bl31.h>
14#include <bl31/ehf.h>
15#include <common/bl_common.h>
16#include <common/debug.h>
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +000017#include <common/feat_detect.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000018#include <common/runtime_svc.h>
19#include <drivers/console.h>
thagon01-arm6805e8d2023-07-12 10:43:58 -050020#include <lib/bootmarker_capture.h>
Juan Pablo Condeb5ec1382023-11-08 16:14:28 -060021#include <lib/el3_runtime/context_debug.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000022#include <lib/el3_runtime/context_mgmt.h>
23#include <lib/pmf/pmf.h>
24#include <lib/runtime_instr.h>
25#include <plat/common/platform.h>
26#include <services/std_svc.h>
27
dp-arm3cac7862016-09-19 11:18:44 +010028#if ENABLE_RUNTIME_INSTRUMENTATION
thagon01-arm6805e8d2023-07-12 10:43:58 -050029 PMF_REGISTER_SERVICE_SMC(rt_instr_svc, PMF_RT_INSTR_SVC_ID,
30 RT_INSTR_TOTAL_IDS, PMF_STORE_ENABLE)
dp-arm3cac7862016-09-19 11:18:44 +010031#endif
32
thagon01-arm6805e8d2023-07-12 10:43:58 -050033#if ENABLE_RUNTIME_INSTRUMENTATION
34 PMF_REGISTER_SERVICE(bl_svc, PMF_RT_INSTR_SVC_ID,
35 BL_TOTAL_IDS, PMF_DUMP_ENABLE)
36#endif
37
Jeenu Viswambharan7f366602014-02-20 17:11:00 +000038/*******************************************************************************
39 * This function pointer is used to initialise the BL32 image. It's initialized
40 * by SPD calling bl31_register_bl32_init after setting up all things necessary
41 * for SP execution. In cases where both SPD and SP are absent, or when SPD
42 * finds it impossible to execute SP, this pointer is left as NULL
43 ******************************************************************************/
Vikram Kanigirid8c9d262014-05-16 18:48:12 +010044static int32_t (*bl32_init)(void);
Jeenu Viswambharan7f366602014-02-20 17:11:00 +000045
Zelalem Aweke4d37db82021-07-11 18:33:20 -050046/*****************************************************************************
47 * Function used to initialise RMM if RME is enabled
48 *****************************************************************************/
49#if ENABLE_RME
50static int32_t (*rmm_init)(void);
51#endif
52
Achin Gupta7aea9082014-02-01 07:51:28 +000053/*******************************************************************************
Achin Gupta35ca3512014-02-19 17:58:33 +000054 * Variable to indicate whether next image to execute after BL31 is BL33
55 * (non-secure & default) or BL32 (secure).
56 ******************************************************************************/
Vikram Kanigiri4e813412014-07-15 16:49:22 +010057static uint32_t next_image_type = NON_SECURE;
Achin Gupta35ca3512014-02-19 17:58:33 +000058
Javier Almansa Sobrinoe1ecd232020-08-20 18:48:09 +010059#ifdef SUPPORT_UNKNOWN_MPID
60/*
61 * Flag to know whether an unsupported MPID has been detected. To avoid having it
62 * landing on the .bss section, it is initialized to a non-zero value, this way
63 * we avoid potential WAW hazards during system bring up.
64 * */
65volatile uint32_t unsupported_mpid_flag = 1;
66#endif
67
Soby Mathew8da89662016-09-19 17:21:15 +010068/*
69 * Implement the ARM Standard Service function to get arguments for a
70 * particular service.
71 */
72uintptr_t get_arm_std_svc_args(unsigned int svc_mask)
73{
74 /* Setup the arguments for PSCI Library */
75 DEFINE_STATIC_PSCI_LIB_ARGS_V1(psci_args, bl31_warm_entrypoint);
76
77 /* PSCI is the only ARM Standard Service implemented */
78 assert(svc_mask == PSCI_FID_MASK);
79
80 return (uintptr_t)&psci_args;
81}
82
Achin Gupta35ca3512014-02-19 17:58:33 +000083/*******************************************************************************
Achin Gupta7aea9082014-02-01 07:51:28 +000084 * Simple function to initialise all BL31 helper libraries.
85 ******************************************************************************/
Daniel Boulby5753e492018-09-20 14:12:46 +010086void __init bl31_lib_init(void)
Achin Gupta7aea9082014-02-01 07:51:28 +000087{
88 cm_init();
89}
Achin Gupta4f6ad662013-10-25 09:08:21 +010090
Achin Gupta4f6ad662013-10-25 09:08:21 +010091/*******************************************************************************
Antonio Nino Diaz47a90642019-01-31 11:01:26 +000092 * Setup function for BL31.
93 ******************************************************************************/
94void bl31_setup(u_register_t arg0, u_register_t arg1, u_register_t arg2,
95 u_register_t arg3)
96{
97 /* Perform early platform-specific setup */
98 bl31_early_platform_setup2(arg0, arg1, arg2, arg3);
99
Antonio Nino Diaz47a90642019-01-31 11:01:26 +0000100 /* Perform late platform-specific setup */
101 bl31_plat_arch_setup();
Alexei Fedorovf41355c2019-09-13 14:11:59 +0100102
103#if CTX_INCLUDE_PAUTH_REGS
104 /*
105 * Assert that the ARMv8.3-PAuth registers are present or an access
106 * fault will be triggered when they are being saved or restored.
107 */
108 assert(is_armv8_3_pauth_present());
109#endif /* CTX_INCLUDE_PAUTH_REGS */
Juan Pablo Condeb5ec1382023-11-08 16:14:28 -0600110
111 /* Prints context_memory allocated for all the security states */
112 report_ctx_memory_usage();
Antonio Nino Diaz47a90642019-01-31 11:01:26 +0000113}
114
115/*******************************************************************************
Achin Gupta4f6ad662013-10-25 09:08:21 +0100116 * BL31 is responsible for setting up the runtime services for the primary cpu
Achin Gupta35ca3512014-02-19 17:58:33 +0000117 * before passing control to the bootloader or an Operating System. This
118 * function calls runtime_svc_init() which initializes all registered runtime
119 * services. The run time services would setup enough context for the core to
Paul Beesley1fbc97b2019-01-11 18:26:51 +0000120 * switch to the next exception level. When this function returns, the core will
Antonio Nino Diaz56b68ad2019-02-28 13:35:21 +0000121 * switch to the programmed exception level via an ERET.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100122 ******************************************************************************/
123void bl31_main(void)
124{
Boyan Karatotev36cebf92023-03-08 11:56:49 +0000125 /* Init registers that never change for the lifetime of TF-A */
126 cm_manage_extensions_el3();
127
Elizabeth Ho4fc00d22023-07-18 14:10:25 +0100128 /* Init per-world context registers for non-secure world */
129 manage_extensions_nonsecure_per_world();
130
Juan Castillo7d199412015-12-14 09:35:25 +0000131 NOTICE("BL31: %s\n", version_string);
132 NOTICE("BL31: %s\n", build_message);
Dan Handley91b624e2014-07-29 17:14:00 +0100133
Jayanth Dodderi Chidanand9461a892022-01-17 18:57:17 +0000134#if FEATURE_DETECTION
135 /* Detect if features enabled during compilation are supported by PE. */
136 detect_arch_features();
137#endif /* FEATURE_DETECTION */
138
thagon01-arm6805e8d2023-07-12 10:43:58 -0500139#if ENABLE_RUNTIME_INSTRUMENTATION
140 PMF_CAPTURE_TIMESTAMP(bl_svc, BL31_ENTRY, PMF_CACHE_MAINT);
141#endif
142
Javier Almansa Sobrinoe1ecd232020-08-20 18:48:09 +0100143#ifdef SUPPORT_UNKNOWN_MPID
144 if (unsupported_mpid_flag == 0) {
145 NOTICE("Unsupported MPID detected!\n");
146 }
147#endif
148
Soby Mathew1ff495b2015-12-09 11:28:43 +0000149 /* Perform platform setup in BL31 */
Achin Gupta4f6ad662013-10-25 09:08:21 +0100150 bl31_platform_setup();
151
Achin Gupta7aea9082014-02-01 07:51:28 +0000152 /* Initialise helper libraries */
153 bl31_lib_init();
Achin Gupta4f6ad662013-10-25 09:08:21 +0100154
Jeenu Viswambharan10a67272017-09-22 08:32:10 +0100155#if EL3_EXCEPTION_HANDLING
156 INFO("BL31: Initialising Exception Handling Framework\n");
157 ehf_init();
158#endif
159
Soby Mathew8da89662016-09-19 17:21:15 +0100160 /* Initialize the runtime services e.g. psci. */
Juan Castillo7d199412015-12-14 09:35:25 +0000161 INFO("BL31: Initializing runtime services\n");
Achin Gupta7421b462014-02-01 18:53:26 +0000162 runtime_svc_init();
Achin Gupta4f6ad662013-10-25 09:08:21 +0100163
Achin Gupta35ca3512014-02-19 17:58:33 +0000164 /*
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000165 * All the cold boot actions on the primary cpu are done. We now need to
Zelalem Aweke4d37db82021-07-11 18:33:20 -0500166 * decide which is the next image and how to execute it.
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000167 * If the SPD runtime service is present, it would want to pass control
168 * to BL32 first in S-EL1. In that case, SPD would have registered a
Paul Beesley1fbc97b2019-01-11 18:26:51 +0000169 * function to initialize bl32 where it takes responsibility of entering
Zelalem Aweke4d37db82021-07-11 18:33:20 -0500170 * S-EL1 and returning control back to bl31_main. Similarly, if RME is
171 * enabled and a function is registered to initialize RMM, control is
172 * transferred to RMM in R-EL2. After RMM initialization, control is
173 * returned back to bl31_main. Once this is done we can prepare entry
174 * into BL33 as normal.
Achin Gupta35ca3512014-02-19 17:58:33 +0000175 */
176
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000177 /*
Paul Beesley1fbc97b2019-01-11 18:26:51 +0000178 * If SPD had registered an init hook, invoke it.
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000179 */
Antonio Nino Diaze0b757d2018-08-24 16:30:29 +0100180 if (bl32_init != NULL) {
Juan Castillo7d199412015-12-14 09:35:25 +0000181 INFO("BL31: Initializing BL32\n");
Antonio Nino Diaze0b757d2018-08-24 16:30:29 +0100182
Prasad Kummari1f9ecfe2023-08-14 11:55:50 +0530183 console_flush();
Antonio Nino Diaze0b757d2018-08-24 16:30:29 +0100184 int32_t rc = (*bl32_init)();
185
Zelalem Aweke4d37db82021-07-11 18:33:20 -0500186 if (rc == 0) {
Antonio Nino Diazf417a462018-09-18 13:10:47 +0100187 WARN("BL31: BL32 initialization failed\n");
Zelalem Aweke4d37db82021-07-11 18:33:20 -0500188 }
189 }
190
191 /*
192 * If RME is enabled and init hook is registered, initialize RMM
193 * in R-EL2.
194 */
195#if ENABLE_RME
196 if (rmm_init != NULL) {
197 INFO("BL31: Initializing RMM\n");
198
Prasad Kummari1f9ecfe2023-08-14 11:55:50 +0530199 console_flush();
Zelalem Aweke4d37db82021-07-11 18:33:20 -0500200 int32_t rc = (*rmm_init)();
201
202 if (rc == 0) {
203 WARN("BL31: RMM initialization failed\n");
204 }
Dan Handley91b624e2014-07-29 17:14:00 +0100205 }
Zelalem Aweke4d37db82021-07-11 18:33:20 -0500206#endif
207
Achin Gupta35ca3512014-02-19 17:58:33 +0000208 /*
209 * We are ready to enter the next EL. Prepare entry into the image
210 * corresponding to the desired security state after the next ERET.
211 */
212 bl31_prepare_next_image_entry();
Soby Mathew1ff495b2015-12-09 11:28:43 +0000213
Antonio Nino Diaze3962d02017-02-16 16:17:19 +0000214 console_flush();
215
Soby Mathew1ff495b2015-12-09 11:28:43 +0000216 /*
217 * Perform any platform specific runtime setup prior to cold boot exit
218 * from BL31
219 */
220 bl31_plat_runtime_setup();
thagon01-arm6805e8d2023-07-12 10:43:58 -0500221
222#if ENABLE_RUNTIME_INSTRUMENTATION
223 PMF_CAPTURE_TIMESTAMP(bl_svc, BL31_EXIT, PMF_CACHE_MAINT);
224 console_flush();
225#endif
Achin Gupta35ca3512014-02-19 17:58:33 +0000226}
227
228/*******************************************************************************
229 * Accessor functions to help runtime services decide which image should be
230 * executed after BL31. This is BL33 or the non-secure bootloader image by
231 * default but the Secure payload dispatcher could override this by requesting
232 * an entry into BL32 (Secure payload) first. If it does so then it should use
233 * the same API to program an entry into BL33 once BL32 initialisation is
234 * complete.
235 ******************************************************************************/
236void bl31_set_next_image_type(uint32_t security_state)
237{
Juan Castillof558cac2014-06-05 09:45:36 +0100238 assert(sec_state_is_valid(security_state));
Achin Gupta35ca3512014-02-19 17:58:33 +0000239 next_image_type = security_state;
240}
241
242uint32_t bl31_get_next_image_type(void)
243{
244 return next_image_type;
245}
246
247/*******************************************************************************
248 * This function programs EL3 registers and performs other setup to enable entry
249 * into the next image after BL31 at the next ERET.
250 ******************************************************************************/
Daniel Boulby5753e492018-09-20 14:12:46 +0100251void __init bl31_prepare_next_image_entry(void)
Achin Gupta35ca3512014-02-19 17:58:33 +0000252{
Vikram Kanigirida567432014-04-15 18:08:08 +0100253 entry_point_info_t *next_image_info;
Andrew Thoelke4e126072014-06-04 21:10:52 +0100254 uint32_t image_type;
Achin Gupta35ca3512014-02-19 17:58:33 +0000255
Soby Mathewd75d2ba2016-05-17 14:01:32 +0100256#if CTX_INCLUDE_AARCH32_REGS
257 /*
258 * Ensure that the build flag to save AArch32 system registers in CPU
259 * context is not set for AArch64-only platforms.
260 */
Antonio Nino Diaz864ca6f2018-10-31 15:25:35 +0000261 if (el_implemented(1) == EL_IMPL_A64ONLY) {
Soby Mathewd75d2ba2016-05-17 14:01:32 +0100262 ERROR("EL1 supports AArch64-only. Please set build flag "
Antonio Nino Diaz864ca6f2018-10-31 15:25:35 +0000263 "CTX_INCLUDE_AARCH32_REGS = 0\n");
Soby Mathewd75d2ba2016-05-17 14:01:32 +0100264 panic();
265 }
266#endif
267
Achin Gupta35ca3512014-02-19 17:58:33 +0000268 /* Determine which image to execute next */
269 image_type = bl31_get_next_image_type();
270
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000271 /* Program EL3 registers to enable entry into the next EL */
Dan Handley701fea72014-05-27 16:17:21 +0100272 next_image_info = bl31_plat_get_next_image_ep_info(image_type);
Antonio Nino Diaze0b757d2018-08-24 16:30:29 +0100273 assert(next_image_info != NULL);
Vikram Kanigiri614f3952014-05-28 13:41:51 +0100274 assert(image_type == GET_SECURITY_STATE(next_image_info->h.attr));
Achin Gupta35ca3512014-02-19 17:58:33 +0000275
Juan Castillo7d199412015-12-14 09:35:25 +0000276 INFO("BL31: Preparing for EL3 exit to %s world\n",
Dan Handley91b624e2014-07-29 17:14:00 +0100277 (image_type == SECURE) ? "secure" : "normal");
Sandrine Bailleuxb2e224c2015-09-28 17:03:06 +0100278 print_entry_point_info(next_image_info);
Soby Mathew3700a922015-07-13 11:21:11 +0100279 cm_init_my_context(next_image_info);
Zelalem Awekef92c0cb2022-01-31 16:59:42 -0600280
281 /*
282 * If we are entering the Non-secure world, use
283 * 'cm_prepare_el3_exit_ns' to exit.
284 */
285 if (image_type == NON_SECURE) {
286 cm_prepare_el3_exit_ns();
287 } else {
288 cm_prepare_el3_exit(image_type);
289 }
Achin Gupta4f6ad662013-10-25 09:08:21 +0100290}
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000291
292/*******************************************************************************
293 * This function initializes the pointer to BL32 init function. This is expected
294 * to be called by the SPD after it finishes all its initialization
295 ******************************************************************************/
Vikram Kanigirid8c9d262014-05-16 18:48:12 +0100296void bl31_register_bl32_init(int32_t (*func)(void))
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000297{
298 bl32_init = func;
299}
Zelalem Aweke4d37db82021-07-11 18:33:20 -0500300
301#if ENABLE_RME
302/*******************************************************************************
303 * This function initializes the pointer to RMM init function. This is expected
304 * to be called by the RMMD after it finishes all its initialization
305 ******************************************************************************/
306void bl31_register_rmm_init(int32_t (*func)(void))
307{
308 rmm_init = func;
309}
310#endif