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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Dan Handleye83b0ca2014-01-14 18:17:09 +00002 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
Dan Handley2bd4ef22014-04-09 13:14:54 +010031#include <arch.h>
Achin Gupta4f6ad662013-10-25 09:08:21 +010032#include <arch_helpers.h>
Dan Handley2bd4ef22014-04-09 13:14:54 +010033#include <assert.h>
Achin Gupta4f6ad662013-10-25 09:08:21 +010034#include <bl_common.h>
35#include <bl31.h>
Achin Gupta7aea9082014-02-01 07:51:28 +000036#include <context_mgmt.h>
Dan Handley7ce42df2014-05-15 14:11:36 +010037#include <platform.h>
Dan Handley2bd4ef22014-04-09 13:14:54 +010038#include <runtime_svc.h>
39#include <stdio.h>
Vikram Kanigiri614f3952014-05-28 13:41:51 +010040#include <string.h>
Achin Gupta7aea9082014-02-01 07:51:28 +000041
Jeenu Viswambharan7f366602014-02-20 17:11:00 +000042/*******************************************************************************
43 * This function pointer is used to initialise the BL32 image. It's initialized
44 * by SPD calling bl31_register_bl32_init after setting up all things necessary
45 * for SP execution. In cases where both SPD and SP are absent, or when SPD
46 * finds it impossible to execute SP, this pointer is left as NULL
47 ******************************************************************************/
Vikram Kanigirid8c9d262014-05-16 18:48:12 +010048static int32_t (*bl32_init)(void);
Jeenu Viswambharan7f366602014-02-20 17:11:00 +000049
Achin Gupta7aea9082014-02-01 07:51:28 +000050/*******************************************************************************
Achin Gupta35ca3512014-02-19 17:58:33 +000051 * Variable to indicate whether next image to execute after BL31 is BL33
52 * (non-secure & default) or BL32 (secure).
53 ******************************************************************************/
Dan Handleya4cb68e2014-04-23 13:47:06 +010054static uint32_t next_image_type;
Achin Gupta35ca3512014-02-19 17:58:33 +000055
56/*******************************************************************************
Achin Gupta7aea9082014-02-01 07:51:28 +000057 * Simple function to initialise all BL31 helper libraries.
58 ******************************************************************************/
59void bl31_lib_init()
60{
61 cm_init();
62}
Achin Gupta4f6ad662013-10-25 09:08:21 +010063
Achin Gupta4f6ad662013-10-25 09:08:21 +010064/*******************************************************************************
65 * BL31 is responsible for setting up the runtime services for the primary cpu
Achin Gupta35ca3512014-02-19 17:58:33 +000066 * before passing control to the bootloader or an Operating System. This
67 * function calls runtime_svc_init() which initializes all registered runtime
68 * services. The run time services would setup enough context for the core to
69 * swtich to the next exception level. When this function returns, the core will
70 * switch to the programmed exception level via. an ERET.
Achin Gupta4f6ad662013-10-25 09:08:21 +010071 ******************************************************************************/
72void bl31_main(void)
73{
Achin Gupta35ca3512014-02-19 17:58:33 +000074#if DEBUG
75 unsigned long mpidr = read_mpidr();
76#endif
Achin Gupta4f6ad662013-10-25 09:08:21 +010077
78 /* Perform remaining generic architectural setup from EL3 */
79 bl31_arch_setup();
80
81 /* Perform platform setup in BL1 */
82 bl31_platform_setup();
83
Jon Medhurstecf0a712014-02-17 12:18:24 +000084 printf("BL31 %s\n\r", build_message);
85
Achin Gupta7aea9082014-02-01 07:51:28 +000086 /* Initialise helper libraries */
87 bl31_lib_init();
Achin Gupta4f6ad662013-10-25 09:08:21 +010088
89 /* Initialize the runtime services e.g. psci */
Achin Gupta7421b462014-02-01 18:53:26 +000090 runtime_svc_init();
Achin Gupta4f6ad662013-10-25 09:08:21 +010091
92 /* Clean caches before re-entering normal world */
93 dcsw_op_all(DCCSW);
94
Jeenu Viswambharancaa84932014-02-06 10:36:15 +000095 /*
Achin Gupta35ca3512014-02-19 17:58:33 +000096 * Use the more complex exception vectors now that context
97 * management is setup. SP_EL3 should point to a 'cpu_context'
98 * structure which has an exception stack allocated. The PSCI
99 * service should have set the context.
100 */
101 assert(cm_get_context(mpidr, NON_SECURE));
102 cm_set_next_eret_context(NON_SECURE);
Soby Mathew5e5c2072014-04-07 15:28:55 +0100103 cm_init_pcpu_ptr_cache();
Achin Gupta35ca3512014-02-19 17:58:33 +0000104 write_vbar_el3((uint64_t) runtime_exceptions);
Andrew Thoelke42e75a72014-04-28 12:28:39 +0100105 isb();
Dan Handleya4cb68e2014-04-23 13:47:06 +0100106 next_image_type = NON_SECURE;
Achin Gupta35ca3512014-02-19 17:58:33 +0000107
108 /*
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000109 * All the cold boot actions on the primary cpu are done. We now need to
110 * decide which is the next image (BL32 or BL33) and how to execute it.
111 * If the SPD runtime service is present, it would want to pass control
112 * to BL32 first in S-EL1. In that case, SPD would have registered a
113 * function to intialize bl32 where it takes responsibility of entering
114 * S-EL1 and returning control back to bl31_main. Once this is done we
115 * can prepare entry into BL33 as normal.
Achin Gupta35ca3512014-02-19 17:58:33 +0000116 */
117
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000118 /*
Vikram Kanigirid8c9d262014-05-16 18:48:12 +0100119 * If SPD had registerd an init hook, invoke it.
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000120 */
Achin Gupta35ca3512014-02-19 17:58:33 +0000121 if (bl32_init)
Vikram Kanigirid8c9d262014-05-16 18:48:12 +0100122 (*bl32_init)();
Achin Gupta35ca3512014-02-19 17:58:33 +0000123
124 /*
125 * We are ready to enter the next EL. Prepare entry into the image
126 * corresponding to the desired security state after the next ERET.
127 */
128 bl31_prepare_next_image_entry();
129}
130
131/*******************************************************************************
132 * Accessor functions to help runtime services decide which image should be
133 * executed after BL31. This is BL33 or the non-secure bootloader image by
134 * default but the Secure payload dispatcher could override this by requesting
135 * an entry into BL32 (Secure payload) first. If it does so then it should use
136 * the same API to program an entry into BL33 once BL32 initialisation is
137 * complete.
138 ******************************************************************************/
139void bl31_set_next_image_type(uint32_t security_state)
140{
141 assert(security_state == NON_SECURE || security_state == SECURE);
142 next_image_type = security_state;
143}
144
145uint32_t bl31_get_next_image_type(void)
146{
147 return next_image_type;
148}
149
150/*******************************************************************************
151 * This function programs EL3 registers and performs other setup to enable entry
152 * into the next image after BL31 at the next ERET.
153 ******************************************************************************/
154void bl31_prepare_next_image_entry()
155{
Vikram Kanigirida567432014-04-15 18:08:08 +0100156 entry_point_info_t *next_image_info;
Achin Gupta35ca3512014-02-19 17:58:33 +0000157 uint32_t scr, image_type;
Vikram Kanigiri614f3952014-05-28 13:41:51 +0100158 cpu_context_t *ctx;
159 gp_regs_t *gp_regs;
Achin Gupta35ca3512014-02-19 17:58:33 +0000160
161 /* Determine which image to execute next */
162 image_type = bl31_get_next_image_type();
163
164 /*
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000165 * Setup minimal architectural state of the next highest EL to
166 * allow execution in it immediately upon entering it.
167 */
Achin Gupta35ca3512014-02-19 17:58:33 +0000168 bl31_next_el_arch_setup(image_type);
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000169
170 /* Program EL3 registers to enable entry into the next EL */
Dan Handley701fea72014-05-27 16:17:21 +0100171 next_image_info = bl31_plat_get_next_image_ep_info(image_type);
Achin Gupta35ca3512014-02-19 17:58:33 +0000172 assert(next_image_info);
Vikram Kanigiri614f3952014-05-28 13:41:51 +0100173 assert(image_type == GET_SECURITY_STATE(next_image_info->h.attr));
Achin Gupta35ca3512014-02-19 17:58:33 +0000174
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000175 scr = read_scr();
Andrew Thoelke2ecdd8f2014-05-16 15:38:04 +0100176 scr &= ~SCR_NS_BIT;
Achin Gupta35ca3512014-02-19 17:58:33 +0000177 if (image_type == NON_SECURE)
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000178 scr |= SCR_NS_BIT;
179
Andrew Thoelke2ecdd8f2014-05-16 15:38:04 +0100180 scr &= ~SCR_RW_BIT;
181 if ((next_image_info->spsr & (1 << MODE_RW_SHIFT)) ==
182 (MODE_RW_64 << MODE_RW_SHIFT))
183 scr |= SCR_RW_BIT;
184
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000185 /*
186 * Tell the context mgmt. library to ensure that SP_EL3 points to
187 * the right context to exit from EL3 correctly.
188 */
Vikram Kanigiri614f3952014-05-28 13:41:51 +0100189 cm_set_el3_eret_context(image_type,
Vikram Kanigirida567432014-04-15 18:08:08 +0100190 next_image_info->pc,
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000191 next_image_info->spsr,
192 scr);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100193
Vikram Kanigiri614f3952014-05-28 13:41:51 +0100194 /*
195 * Save the args generated in BL2 for the image in the right context
196 * used on its entry
197 */
198 ctx = cm_get_context(read_mpidr(), image_type);
199 gp_regs = get_gpregs_ctx(ctx);
200 memcpy(gp_regs, (void *)&next_image_info->args, sizeof(aapcs64_params_t));
201
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000202 /* Finally set the next context */
Vikram Kanigiri614f3952014-05-28 13:41:51 +0100203 cm_set_next_eret_context(image_type);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100204}
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000205
206/*******************************************************************************
207 * This function initializes the pointer to BL32 init function. This is expected
208 * to be called by the SPD after it finishes all its initialization
209 ******************************************************************************/
Vikram Kanigirid8c9d262014-05-16 18:48:12 +0100210void bl31_register_bl32_init(int32_t (*func)(void))
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000211{
212 bl32_init = func;
213}