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Dan Handley9df48042015-03-19 18:58:55 +00001/*
Jeenu Viswambharan59424d82017-09-19 09:27:18 +01002 * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
Dan Handley9df48042015-03-19 18:58:55 +00003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Dan Handley9df48042015-03-19 18:58:55 +00005 */
6
7#include <arch_helpers.h>
Soby Mathew0d9e8522015-07-15 13:36:24 +01008#include <arm_def.h>
Soby Mathew61e8d0b2015-10-12 17:32:29 +01009#include <arm_gic.h>
Dan Handley9df48042015-03-19 18:58:55 +000010#include <assert.h>
Soby Mathew61e8d0b2015-10-12 17:32:29 +010011#include <console.h>
Dan Handley9df48042015-03-19 18:58:55 +000012#include <errno.h>
Soby Mathew7799cf72015-04-16 14:49:09 +010013#include <plat_arm.h>
Soby Mathew9ca28062017-10-11 16:08:58 +010014#include <platform.h>
Soby Mathewfeac8fc2015-09-29 15:47:16 +010015#include <platform_def.h>
Dan Handley9df48042015-03-19 18:58:55 +000016#include <psci.h>
17
Soby Mathew0b4c5a32016-10-21 17:51:22 +010018/* Allow ARM Standard platforms to override this function */
19#pragma weak plat_arm_psci_override_pm_ops
20
Soby Mathewfeac8fc2015-09-29 15:47:16 +010021/* Standard ARM platforms are expected to export plat_arm_psci_pm_ops */
Soby Mathew0b4c5a32016-10-21 17:51:22 +010022extern plat_psci_ops_t plat_arm_psci_pm_ops;
Soby Mathewfeac8fc2015-09-29 15:47:16 +010023
Soby Mathew7799cf72015-04-16 14:49:09 +010024#if ARM_RECOM_STATE_ID_ENC
25extern unsigned int arm_pm_idle_states[];
26#endif /* __ARM_RECOM_STATE_ID_ENC__ */
27
Soby Mathew7799cf72015-04-16 14:49:09 +010028#if !ARM_RECOM_STATE_ID_ENC
Dan Handley9df48042015-03-19 18:58:55 +000029/*******************************************************************************
Soby Mathewfec4eb72015-07-01 16:16:20 +010030 * ARM standard platform handler called to check the validity of the power state
31 * parameter.
Dan Handley9df48042015-03-19 18:58:55 +000032 ******************************************************************************/
Soby Mathewfec4eb72015-07-01 16:16:20 +010033int arm_validate_power_state(unsigned int power_state,
34 psci_power_state_t *req_state)
Dan Handley9df48042015-03-19 18:58:55 +000035{
Soby Mathewfec4eb72015-07-01 16:16:20 +010036 int pstate = psci_get_pstate_type(power_state);
37 int pwr_lvl = psci_get_pstate_pwrlvl(power_state);
38 int i;
Dan Handley9df48042015-03-19 18:58:55 +000039
Soby Mathewfec4eb72015-07-01 16:16:20 +010040 assert(req_state);
Dan Handley9df48042015-03-19 18:58:55 +000041
Soby Mathewfec4eb72015-07-01 16:16:20 +010042 if (pwr_lvl > PLAT_MAX_PWR_LVL)
43 return PSCI_E_INVALID_PARAMS;
Dan Handley9df48042015-03-19 18:58:55 +000044
Dan Handley9df48042015-03-19 18:58:55 +000045 /* Sanity check the requested state */
Soby Mathewfec4eb72015-07-01 16:16:20 +010046 if (pstate == PSTATE_TYPE_STANDBY) {
Dan Handley9df48042015-03-19 18:58:55 +000047 /*
Soby Mathewfec4eb72015-07-01 16:16:20 +010048 * It's possible to enter standby only on power level 0
49 * Ignore any other power level.
Dan Handley9df48042015-03-19 18:58:55 +000050 */
Soby Mathewfec4eb72015-07-01 16:16:20 +010051 if (pwr_lvl != ARM_PWR_LVL0)
Dan Handley9df48042015-03-19 18:58:55 +000052 return PSCI_E_INVALID_PARAMS;
Soby Mathewfec4eb72015-07-01 16:16:20 +010053
54 req_state->pwr_domain_state[ARM_PWR_LVL0] =
55 ARM_LOCAL_STATE_RET;
56 } else {
57 for (i = ARM_PWR_LVL0; i <= pwr_lvl; i++)
58 req_state->pwr_domain_state[i] =
59 ARM_LOCAL_STATE_OFF;
Dan Handley9df48042015-03-19 18:58:55 +000060 }
61
62 /*
63 * We expect the 'state id' to be zero.
64 */
65 if (psci_get_pstate_id(power_state))
66 return PSCI_E_INVALID_PARAMS;
67
Soby Mathew7799cf72015-04-16 14:49:09 +010068 return PSCI_E_SUCCESS;
69}
70
71#else
72/*******************************************************************************
73 * ARM standard platform handler called to check the validity of the power
74 * state parameter. The power state parameter has to be a composite power
75 * state.
76 ******************************************************************************/
77int arm_validate_power_state(unsigned int power_state,
78 psci_power_state_t *req_state)
79{
80 unsigned int state_id;
81 int i;
82
83 assert(req_state);
84
85 /*
86 * Currently we are using a linear search for finding the matching
87 * entry in the idle power state array. This can be made a binary
88 * search if the number of entries justify the additional complexity.
89 */
90 for (i = 0; !!arm_pm_idle_states[i]; i++) {
91 if (power_state == arm_pm_idle_states[i])
92 break;
93 }
94
95 /* Return error if entry not found in the idle state array */
96 if (!arm_pm_idle_states[i])
97 return PSCI_E_INVALID_PARAMS;
98
99 i = 0;
100 state_id = psci_get_pstate_id(power_state);
101
102 /* Parse the State ID and populate the state info parameter */
103 while (state_id) {
104 req_state->pwr_domain_state[i++] = state_id &
105 ARM_LOCAL_PSTATE_MASK;
106 state_id >>= ARM_LOCAL_PSTATE_WIDTH;
107 }
108
Dan Handley9df48042015-03-19 18:58:55 +0000109 return PSCI_E_SUCCESS;
110}
Soby Mathew7799cf72015-04-16 14:49:09 +0100111#endif /* __ARM_RECOM_STATE_ID_ENC__ */
Soby Mathew0d9e8522015-07-15 13:36:24 +0100112
113/*******************************************************************************
114 * ARM standard platform handler called to check the validity of the non secure
Jeenu Viswambharan59424d82017-09-19 09:27:18 +0100115 * entrypoint. Returns 0 if the entrypoint is valid, or -1 otherwise.
Soby Mathew0d9e8522015-07-15 13:36:24 +0100116 ******************************************************************************/
117int arm_validate_ns_entrypoint(uintptr_t entrypoint)
118{
119 /*
120 * Check if the non secure entrypoint lies within the non
121 * secure DRAM.
122 */
123 if ((entrypoint >= ARM_NS_DRAM1_BASE) && (entrypoint <
Jeenu Viswambharan59424d82017-09-19 09:27:18 +0100124 (ARM_NS_DRAM1_BASE + ARM_NS_DRAM1_SIZE))) {
125 return 0;
126 }
dp-arm84fc2952017-05-03 12:14:10 +0100127#ifndef AARCH32
Soby Mathew0d9e8522015-07-15 13:36:24 +0100128 if ((entrypoint >= ARM_DRAM2_BASE) && (entrypoint <
Jeenu Viswambharan59424d82017-09-19 09:27:18 +0100129 (ARM_DRAM2_BASE + ARM_DRAM2_SIZE))) {
130 return 0;
131 }
dp-arm84fc2952017-05-03 12:14:10 +0100132#endif
Soby Mathew0d9e8522015-07-15 13:36:24 +0100133
Jeenu Viswambharan59424d82017-09-19 09:27:18 +0100134 return -1;
135}
136
137int arm_validate_psci_entrypoint(uintptr_t entrypoint)
138{
139 return arm_validate_ns_entrypoint(entrypoint) == 0 ? PSCI_E_SUCCESS :
140 PSCI_E_INVALID_ADDRESS;
Soby Mathew0d9e8522015-07-15 13:36:24 +0100141}
Soby Mathewfeac8fc2015-09-29 15:47:16 +0100142
Soby Mathew61e8d0b2015-10-12 17:32:29 +0100143/******************************************************************************
Soby Mathew0b4c5a32016-10-21 17:51:22 +0100144 * Default definition on ARM standard platforms to override the plat_psci_ops.
145 *****************************************************************************/
146const plat_psci_ops_t *plat_arm_psci_override_pm_ops(plat_psci_ops_t *ops)
147{
148 return ops;
149}
150
151/******************************************************************************
Soby Mathew9ca28062017-10-11 16:08:58 +0100152 * Helper function to save the platform state before a system suspend. Save the
153 * state of the system components which are not in the Always ON power domain.
154 *****************************************************************************/
155void arm_system_pwr_domain_save(void)
156{
157 /* Assert system power domain is available on the platform */
158 assert(PLAT_MAX_PWR_LVL >= ARM_PWR_LVL2);
159
160 plat_arm_gic_save();
161
162 /*
163 * All the other peripheral which are configured by ARM TF are
164 * re-initialized on resume from system suspend. Hence we
165 * don't save their state here.
166 */
167}
168
169/******************************************************************************
Soby Mathew61e8d0b2015-10-12 17:32:29 +0100170 * Helper function to resume the platform from system suspend. Reinitialize
171 * the system components which are not in the Always ON power domain.
172 * TODO: Unify the platform setup when waking up from cold boot and system
173 * resume in arm_bl31_platform_setup().
174 *****************************************************************************/
175void arm_system_pwr_domain_resume(void)
176{
Soby Mathew2fd66be2015-12-09 11:38:43 +0000177 console_init(PLAT_ARM_BL31_RUN_UART_BASE, PLAT_ARM_BL31_RUN_UART_CLK_IN_HZ,
Soby Mathew61e8d0b2015-10-12 17:32:29 +0100178 ARM_CONSOLE_BAUDRATE);
179
180 /* Assert system power domain is available on the platform */
181 assert(PLAT_MAX_PWR_LVL >= ARM_PWR_LVL2);
182
Soby Mathew9ca28062017-10-11 16:08:58 +0100183 plat_arm_gic_resume();
184
Soby Mathew61e8d0b2015-10-12 17:32:29 +0100185 plat_arm_security_setup();
Soby Mathew61e8d0b2015-10-12 17:32:29 +0100186 arm_configure_sys_timer();
187}
188
Soby Mathewfeac8fc2015-09-29 15:47:16 +0100189/*******************************************************************************
190 * Private function to program the mailbox for a cpu before it is released
191 * from reset. This function assumes that the Trusted mail box base is within
192 * the ARM_SHARED_RAM region
193 ******************************************************************************/
Sandrine Bailleux03897bb2015-11-26 16:31:34 +0000194void arm_program_trusted_mailbox(uintptr_t address)
Soby Mathewfeac8fc2015-09-29 15:47:16 +0100195{
196 uintptr_t *mailbox = (void *) PLAT_ARM_TRUSTED_MAILBOX_BASE;
197
198 *mailbox = address;
199
200 /*
201 * Ensure that the PLAT_ARM_TRUSTED_MAILBOX_BASE is within
202 * ARM_SHARED_RAM region.
203 */
204 assert((PLAT_ARM_TRUSTED_MAILBOX_BASE >= ARM_SHARED_RAM_BASE) &&
205 ((PLAT_ARM_TRUSTED_MAILBOX_BASE + sizeof(*mailbox)) <= \
206 (ARM_SHARED_RAM_BASE + ARM_SHARED_RAM_SIZE)));
Soby Mathewfeac8fc2015-09-29 15:47:16 +0100207}
208
209/*******************************************************************************
210 * The ARM Standard platform definition of platform porting API
211 * `plat_setup_psci_ops`.
212 ******************************************************************************/
213int plat_setup_psci_ops(uintptr_t sec_entrypoint,
214 const plat_psci_ops_t **psci_ops)
215{
Soby Mathew0b4c5a32016-10-21 17:51:22 +0100216 *psci_ops = plat_arm_psci_override_pm_ops(&plat_arm_psci_pm_ops);
Soby Mathewfeac8fc2015-09-29 15:47:16 +0100217
218 /* Setup mailbox with entry point. */
219 arm_program_trusted_mailbox(sec_entrypoint);
220 return 0;
221}