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Achin Gupta375f5382014-02-18 18:12:48 +00001/*
Paul Beesley1fbc97b2019-01-11 18:26:51 +00002 * Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved.
Achin Gupta375f5382014-02-18 18:12:48 +00003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Achin Gupta375f5382014-02-18 18:12:48 +00005 */
6
7
8/*******************************************************************************
9 * This is the Secure Payload Dispatcher (SPD). The dispatcher is meant to be a
10 * plug-in component to the Secure Monitor, registered as a runtime service. The
11 * SPD is expected to be a functional extension of the Secure Payload (SP) that
12 * executes in Secure EL1. The Secure Monitor will delegate all SMCs targeting
13 * the Trusted OS/Applications range to the dispatcher. The SPD will either
14 * handle the request locally or delegate it to the Secure Payload. It is also
15 * responsible for initialising and maintaining communication with the SP.
16 ******************************************************************************/
Dan Handley2bd4ef22014-04-09 13:14:54 +010017#include <assert.h>
Achin Guptaaeaab682014-05-09 13:21:31 +010018#include <errno.h>
Dan Handley2bd4ef22014-04-09 13:14:54 +010019#include <stddef.h>
Soby Mathew47903c02015-01-13 15:48:26 +000020#include <string.h>
Antonio Nino Diaze0f90632018-12-14 00:18:21 +000021
22#include <arch_helpers.h>
23#include <bl31/bl31.h>
24#include <bl31/ehf.h>
25#include <bl32/tsp/tsp.h>
26#include <common/bl_common.h>
27#include <common/debug.h>
28#include <common/runtime_svc.h>
29#include <lib/el3_runtime/context_mgmt.h>
30#include <plat/common/platform.h>
31#include <tools_share/uuid.h>
32
Dan Handley714a0d22014-04-09 13:13:04 +010033#include "tspd_private.h"
Achin Gupta375f5382014-02-18 18:12:48 +000034
35/*******************************************************************************
Andrew Thoelke891c4ca2014-05-20 21:43:27 +010036 * Address of the entrypoint vector table in the Secure Payload. It is
37 * initialised once on the primary core after a cold boot.
Achin Gupta375f5382014-02-18 18:12:48 +000038 ******************************************************************************/
Andrew Thoelke891c4ca2014-05-20 21:43:27 +010039tsp_vectors_t *tsp_vectors;
Achin Gupta375f5382014-02-18 18:12:48 +000040
41/*******************************************************************************
42 * Array to keep track of per-cpu Secure Payload state
43 ******************************************************************************/
Dan Handleye2712bc2014-04-10 15:37:22 +010044tsp_context_t tspd_sp_context[TSPD_CORE_COUNT];
Achin Gupta375f5382014-02-18 18:12:48 +000045
Jeenu Viswambharan7f366602014-02-20 17:11:00 +000046
Jeenu Viswambharandf1ddb52014-02-28 11:23:35 +000047/* TSP UID */
Roberto Vargaseace8f12018-04-26 13:36:53 +010048DEFINE_SVC_UUID2(tsp_uuid,
49 0xa056305b, 0x9132, 0x7b42, 0x98, 0x11,
50 0x71, 0x68, 0xca, 0x50, 0xf3, 0xfa);
Jeenu Viswambharandf1ddb52014-02-28 11:23:35 +000051
Vikram Kanigirid8c9d262014-05-16 18:48:12 +010052int32_t tspd_init(void);
Jeenu Viswambharan7f366602014-02-20 17:11:00 +000053
Soby Mathewbc912822015-09-22 12:01:18 +010054/*
55 * This helper function handles Secure EL1 preemption. The preemption could be
56 * due Non Secure interrupts or EL3 interrupts. In both the cases we context
57 * switch to the normal world and in case of EL3 interrupts, it will again be
58 * routed to EL3 which will get handled at the exception vectors.
59 */
Soby Mathew47903c02015-01-13 15:48:26 +000060uint64_t tspd_handle_sp_preemption(void *handle)
61{
62 cpu_context_t *ns_cpu_context;
Soby Mathewbc912822015-09-22 12:01:18 +010063
Soby Mathew47903c02015-01-13 15:48:26 +000064 assert(handle == cm_get_context(SECURE));
65 cm_el1_sysregs_context_save(SECURE);
66 /* Get a reference to the non-secure context */
67 ns_cpu_context = cm_get_context(NON_SECURE);
68 assert(ns_cpu_context);
69
70 /*
Soby Mathew78664242015-11-13 02:08:43 +000071 * To allow Secure EL1 interrupt handler to re-enter TSP while TSP
72 * is preempted, the secure system register context which will get
73 * overwritten must be additionally saved. This is currently done
74 * by the TSPD S-EL1 interrupt handler.
75 */
76
77 /*
78 * Restore non-secure state.
Soby Mathew47903c02015-01-13 15:48:26 +000079 */
80 cm_el1_sysregs_context_restore(NON_SECURE);
81 cm_set_next_eret_context(NON_SECURE);
82
Soby Mathewbc912822015-09-22 12:01:18 +010083 /*
David Cunado28f69ab2017-04-05 11:34:03 +010084 * The TSP was preempted during execution of a Yielding SMC Call.
Soby Mathew78664242015-11-13 02:08:43 +000085 * Return back to the normal world with SMC_PREEMPTED as error
86 * code in x0.
Soby Mathewbc912822015-09-22 12:01:18 +010087 */
Soby Mathew47903c02015-01-13 15:48:26 +000088 SMC_RET1(ns_cpu_context, SMC_PREEMPTED);
89}
Soby Mathewbc912822015-09-22 12:01:18 +010090
Achin Guptaaeaab682014-05-09 13:21:31 +010091/*******************************************************************************
92 * This function is the handler registered for S-EL1 interrupts by the TSPD. It
93 * validates the interrupt and upon success arranges entry into the TSP at
Soby Mathewbec98512015-09-03 18:29:38 +010094 * 'tsp_sel1_intr_entry()' for handling the interrupt.
Achin Guptaaeaab682014-05-09 13:21:31 +010095 ******************************************************************************/
96static uint64_t tspd_sel1_interrupt_handler(uint32_t id,
97 uint32_t flags,
98 void *handle,
99 void *cookie)
100{
101 uint32_t linear_id;
Achin Guptaaeaab682014-05-09 13:21:31 +0100102 tsp_context_t *tsp_ctx;
103
104 /* Check the security state when the exception was generated */
105 assert(get_interrupt_src_ss(flags) == NON_SECURE);
106
Achin Guptaaeaab682014-05-09 13:21:31 +0100107 /* Sanity check the pointer to this cpu's context */
Andrew Thoelkea2f65532014-05-14 17:09:32 +0100108 assert(handle == cm_get_context(NON_SECURE));
Achin Guptaaeaab682014-05-09 13:21:31 +0100109
110 /* Save the non-secure context before entering the TSP */
111 cm_el1_sysregs_context_save(NON_SECURE);
112
113 /* Get a reference to this cpu's TSP context */
Soby Mathewda43b662015-07-08 21:45:46 +0100114 linear_id = plat_my_core_pos();
Achin Guptaaeaab682014-05-09 13:21:31 +0100115 tsp_ctx = &tspd_sp_context[linear_id];
Andrew Thoelkea2f65532014-05-14 17:09:32 +0100116 assert(&tsp_ctx->cpu_ctx == cm_get_context(SECURE));
Achin Guptaaeaab682014-05-09 13:21:31 +0100117
118 /*
119 * Determine if the TSP was previously preempted. Its last known
120 * context has to be preserved in this case.
121 * The TSP should return control to the TSPD after handling this
Soby Mathewbec98512015-09-03 18:29:38 +0100122 * S-EL1 interrupt. Preserve essential EL3 context to allow entry into
123 * the TSP at the S-EL1 interrupt entry point using the 'cpu_context'
124 * structure. There is no need to save the secure system register
125 * context since the TSP is supposed to preserve it during S-EL1
126 * interrupt handling.
Achin Guptaaeaab682014-05-09 13:21:31 +0100127 */
David Cunado28f69ab2017-04-05 11:34:03 +0100128 if (get_yield_smc_active_flag(tsp_ctx->state)) {
Achin Guptaaeaab682014-05-09 13:21:31 +0100129 tsp_ctx->saved_spsr_el3 = SMC_GET_EL3(&tsp_ctx->cpu_ctx,
130 CTX_SPSR_EL3);
131 tsp_ctx->saved_elr_el3 = SMC_GET_EL3(&tsp_ctx->cpu_ctx,
132 CTX_ELR_EL3);
Soby Mathewbec98512015-09-03 18:29:38 +0100133#if TSP_NS_INTR_ASYNC_PREEMPT
Soby Mathew47903c02015-01-13 15:48:26 +0000134 /*Need to save the previously interrupted secure context */
135 memcpy(&tsp_ctx->sp_ctx, &tsp_ctx->cpu_ctx, TSPD_SP_CTX_SIZE);
136#endif
Achin Guptaaeaab682014-05-09 13:21:31 +0100137 }
138
Achin Guptaaeaab682014-05-09 13:21:31 +0100139 cm_el1_sysregs_context_restore(SECURE);
Soby Mathewbec98512015-09-03 18:29:38 +0100140 cm_set_elr_spsr_el3(SECURE, (uint64_t) &tsp_vectors->sel1_intr_entry,
Andrew Thoelke4e126072014-06-04 21:10:52 +0100141 SPSR_64(MODE_EL1, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS));
Soby Mathew47903c02015-01-13 15:48:26 +0000142
Achin Guptaaeaab682014-05-09 13:21:31 +0100143 cm_set_next_eret_context(SECURE);
144
145 /*
Soby Mathewbec98512015-09-03 18:29:38 +0100146 * Tell the TSP that it has to handle a S-EL1 interrupt synchronously.
147 * Also the instruction in normal world where the interrupt was
148 * generated is passed for debugging purposes. It is safe to retrieve
149 * this address from ELR_EL3 as the secure context will not take effect
150 * until el3_exit().
Achin Guptaaeaab682014-05-09 13:21:31 +0100151 */
Soby Mathewbec98512015-09-03 18:29:38 +0100152 SMC_RET2(&tsp_ctx->cpu_ctx, TSP_HANDLE_SEL1_INTR_AND_RETURN, read_elr_el3());
Achin Guptaaeaab682014-05-09 13:21:31 +0100153}
Soby Mathew47903c02015-01-13 15:48:26 +0000154
Soby Mathewbec98512015-09-03 18:29:38 +0100155#if TSP_NS_INTR_ASYNC_PREEMPT
Soby Mathew47903c02015-01-13 15:48:26 +0000156/*******************************************************************************
Soby Mathewbec98512015-09-03 18:29:38 +0100157 * This function is the handler registered for Non secure interrupts by the
158 * TSPD. It validates the interrupt and upon success arranges entry into the
159 * normal world for handling the interrupt.
Soby Mathew47903c02015-01-13 15:48:26 +0000160 ******************************************************************************/
161static uint64_t tspd_ns_interrupt_handler(uint32_t id,
162 uint32_t flags,
163 void *handle,
164 void *cookie)
165{
166 /* Check the security state when the exception was generated */
167 assert(get_interrupt_src_ss(flags) == SECURE);
168
Soby Mathew47903c02015-01-13 15:48:26 +0000169 /*
170 * Disable the routing of NS interrupts from secure world to EL3 while
171 * interrupted on this core.
172 */
173 disable_intr_rm_local(INTR_TYPE_NS, SECURE);
174
175 return tspd_handle_sp_preemption(handle);
176}
177#endif
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000178
Achin Gupta375f5382014-02-18 18:12:48 +0000179/*******************************************************************************
180 * Secure Payload Dispatcher setup. The SPD finds out the SP entrypoint and type
181 * (aarch32/aarch64) if not already known and initialises the context for entry
182 * into the SP for its initialisation.
183 ******************************************************************************/
Masahiro Yamada56212752018-04-19 01:14:42 +0900184static int32_t tspd_setup(void)
Achin Gupta375f5382014-02-18 18:12:48 +0000185{
Vikram Kanigiri9d70f0f2014-07-15 16:46:43 +0100186 entry_point_info_t *tsp_ep_info;
Achin Gupta375f5382014-02-18 18:12:48 +0000187 uint32_t linear_id;
188
Soby Mathewda43b662015-07-08 21:45:46 +0100189 linear_id = plat_my_core_pos();
Achin Gupta375f5382014-02-18 18:12:48 +0000190
191 /*
192 * Get information about the Secure Payload (BL32) image. Its
193 * absence is a critical failure. TODO: Add support to
194 * conditionally include the SPD service
195 */
Vikram Kanigiri9d70f0f2014-07-15 16:46:43 +0100196 tsp_ep_info = bl31_plat_get_next_image_ep_info(SECURE);
197 if (!tsp_ep_info) {
198 WARN("No TSP provided by BL2 boot loader, Booting device"
199 " without TSP initialization. SMC`s destined for TSP"
200 " will return SMC_UNK\n");
201 return 1;
202 }
Achin Gupta375f5382014-02-18 18:12:48 +0000203
204 /*
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000205 * If there's no valid entry point for SP, we return a non-zero value
206 * signalling failure initializing the service. We bail out without
207 * registering any handlers
208 */
Vikram Kanigiri9d70f0f2014-07-15 16:46:43 +0100209 if (!tsp_ep_info->pc)
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000210 return 1;
211
212 /*
Sandrine Bailleuxf4119ec2015-12-17 13:58:58 +0000213 * We could inspect the SP image and determine its execution
Achin Gupta375f5382014-02-18 18:12:48 +0000214 * state i.e whether AArch32 or AArch64. Assuming it's AArch64
215 * for the time being.
216 */
Vikram Kanigiri9d70f0f2014-07-15 16:46:43 +0100217 tspd_init_tsp_ep_state(tsp_ep_info,
218 TSP_AARCH64,
219 tsp_ep_info->pc,
220 &tspd_sp_context[linear_id]);
Achin Gupta375f5382014-02-18 18:12:48 +0000221
Vikram Kanigiri4e813412014-07-15 16:49:22 +0100222#if TSP_INIT_ASYNC
223 bl31_set_next_image_type(SECURE);
224#else
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000225 /*
226 * All TSPD initialization done. Now register our init function with
227 * BL31 for deferred invocation
228 */
229 bl31_register_bl32_init(&tspd_init);
Vikram Kanigiri4e813412014-07-15 16:49:22 +0100230#endif
Vikram Kanigiri9d70f0f2014-07-15 16:46:43 +0100231 return 0;
Achin Gupta375f5382014-02-18 18:12:48 +0000232}
233
234/*******************************************************************************
235 * This function passes control to the Secure Payload image (BL32) for the first
236 * time on the primary cpu after a cold boot. It assumes that a valid secure
237 * context has already been created by tspd_setup() which can be directly used.
238 * It also assumes that a valid non-secure context has been initialised by PSCI
239 * so it does not need to save and restore any non-secure state. This function
240 * performs a synchronous entry into the Secure payload. The SP passes control
Vikram Kanigirid8c9d262014-05-16 18:48:12 +0100241 * back to this routine through a SMC.
Achin Gupta375f5382014-02-18 18:12:48 +0000242 ******************************************************************************/
Vikram Kanigirid8c9d262014-05-16 18:48:12 +0100243int32_t tspd_init(void)
Achin Gupta375f5382014-02-18 18:12:48 +0000244{
Soby Mathewda43b662015-07-08 21:45:46 +0100245 uint32_t linear_id = plat_my_core_pos();
Dan Handleye2712bc2014-04-10 15:37:22 +0100246 tsp_context_t *tsp_ctx = &tspd_sp_context[linear_id];
Vikram Kanigiri9d70f0f2014-07-15 16:46:43 +0100247 entry_point_info_t *tsp_entry_point;
Vikram Kanigiri4e813412014-07-15 16:49:22 +0100248 uint64_t rc;
Vikram Kanigiri9d70f0f2014-07-15 16:46:43 +0100249
250 /*
251 * Get information about the Secure Payload (BL32) image. Its
252 * absence is a critical failure.
253 */
254 tsp_entry_point = bl31_plat_get_next_image_ep_info(SECURE);
255 assert(tsp_entry_point);
256
Soby Mathewda43b662015-07-08 21:45:46 +0100257 cm_init_my_context(tsp_entry_point);
Achin Gupta375f5382014-02-18 18:12:48 +0000258
259 /*
Vikram Kanigiri4e813412014-07-15 16:49:22 +0100260 * Arrange for an entry into the test secure payload. It will be
261 * returned via TSP_ENTRY_DONE case
Achin Gupta607084e2014-02-09 18:24:19 +0000262 */
Achin Gupta375f5382014-02-18 18:12:48 +0000263 rc = tspd_synchronous_sp_entry(tsp_ctx);
264 assert(rc != 0);
Achin Guptaaeaab682014-05-09 13:21:31 +0100265
Achin Gupta375f5382014-02-18 18:12:48 +0000266 return rc;
267}
268
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000269
Achin Gupta375f5382014-02-18 18:12:48 +0000270/*******************************************************************************
271 * This function is responsible for handling all SMCs in the Trusted OS/App
272 * range from the non-secure state as defined in the SMC Calling Convention
273 * Document. It is also responsible for communicating with the Secure payload
274 * to delegate work and return results back to the non-secure state. Lastly it
275 * will also return any information that the secure payload needs to do the
276 * work assigned to it.
277 ******************************************************************************/
Masahiro Yamada5ac9d962018-04-19 01:18:48 +0900278static uintptr_t tspd_smc_handler(uint32_t smc_fid,
279 u_register_t x1,
280 u_register_t x2,
281 u_register_t x3,
282 u_register_t x4,
Achin Gupta375f5382014-02-18 18:12:48 +0000283 void *cookie,
284 void *handle,
Masahiro Yamada5ac9d962018-04-19 01:18:48 +0900285 u_register_t flags)
Achin Gupta375f5382014-02-18 18:12:48 +0000286{
Dan Handleye2712bc2014-04-10 15:37:22 +0100287 cpu_context_t *ns_cpu_context;
Soby Mathewda43b662015-07-08 21:45:46 +0100288 uint32_t linear_id = plat_my_core_pos(), ns;
Dan Handleye2712bc2014-04-10 15:37:22 +0100289 tsp_context_t *tsp_ctx = &tspd_sp_context[linear_id];
Vikram Kanigiri4e813412014-07-15 16:49:22 +0100290 uint64_t rc;
291#if TSP_INIT_ASYNC
292 entry_point_info_t *next_image_info;
293#endif
Achin Gupta375f5382014-02-18 18:12:48 +0000294
295 /* Determine which security state this SMC originated from */
296 ns = is_caller_non_secure(flags);
297
298 switch (smc_fid) {
299
300 /*
Soby Mathew9f71f702014-05-09 20:49:17 +0100301 * This function ID is used by TSP to indicate that it was
302 * preempted by a normal world IRQ.
303 *
304 */
305 case TSP_PREEMPTED:
306 if (ns)
307 SMC_RET1(handle, SMC_UNK);
308
Soby Mathew47903c02015-01-13 15:48:26 +0000309 return tspd_handle_sp_preemption(handle);
Soby Mathew9f71f702014-05-09 20:49:17 +0100310
311 /*
Achin Guptaaeaab682014-05-09 13:21:31 +0100312 * This function ID is used only by the TSP to indicate that it has
Soby Mathew78664242015-11-13 02:08:43 +0000313 * finished handling a S-EL1 interrupt or was preempted by a higher
314 * priority pending EL3 interrupt. Execution should resume
Achin Guptaaeaab682014-05-09 13:21:31 +0100315 * in the normal world.
316 */
Soby Mathewbec98512015-09-03 18:29:38 +0100317 case TSP_HANDLED_S_EL1_INTR:
Achin Guptaaeaab682014-05-09 13:21:31 +0100318 if (ns)
319 SMC_RET1(handle, SMC_UNK);
320
Andrew Thoelkea2f65532014-05-14 17:09:32 +0100321 assert(handle == cm_get_context(SECURE));
Achin Guptaaeaab682014-05-09 13:21:31 +0100322
323 /*
324 * Restore the relevant EL3 state which saved to service
325 * this SMC.
326 */
David Cunado28f69ab2017-04-05 11:34:03 +0100327 if (get_yield_smc_active_flag(tsp_ctx->state)) {
Achin Guptaaeaab682014-05-09 13:21:31 +0100328 SMC_SET_EL3(&tsp_ctx->cpu_ctx,
329 CTX_SPSR_EL3,
330 tsp_ctx->saved_spsr_el3);
331 SMC_SET_EL3(&tsp_ctx->cpu_ctx,
332 CTX_ELR_EL3,
333 tsp_ctx->saved_elr_el3);
Soby Mathewbec98512015-09-03 18:29:38 +0100334#if TSP_NS_INTR_ASYNC_PREEMPT
Soby Mathew47903c02015-01-13 15:48:26 +0000335 /*
336 * Need to restore the previously interrupted
337 * secure context.
338 */
339 memcpy(&tsp_ctx->cpu_ctx, &tsp_ctx->sp_ctx,
340 TSPD_SP_CTX_SIZE);
341#endif
Achin Guptaaeaab682014-05-09 13:21:31 +0100342 }
343
344 /* Get a reference to the non-secure context */
Andrew Thoelkea2f65532014-05-14 17:09:32 +0100345 ns_cpu_context = cm_get_context(NON_SECURE);
Achin Guptaaeaab682014-05-09 13:21:31 +0100346 assert(ns_cpu_context);
347
348 /*
349 * Restore non-secure state. There is no need to save the
350 * secure system register context since the TSP was supposed
351 * to preserve it during S-EL1 interrupt handling.
352 */
353 cm_el1_sysregs_context_restore(NON_SECURE);
354 cm_set_next_eret_context(NON_SECURE);
355
356 SMC_RET0((uint64_t) ns_cpu_context);
357
Achin Guptaaeaab682014-05-09 13:21:31 +0100358 /*
Achin Gupta375f5382014-02-18 18:12:48 +0000359 * This function ID is used only by the SP to indicate it has
360 * finished initialising itself after a cold boot
361 */
362 case TSP_ENTRY_DONE:
363 if (ns)
364 SMC_RET1(handle, SMC_UNK);
365
366 /*
367 * Stash the SP entry points information. This is done
368 * only once on the primary cpu
369 */
Andrew Thoelke891c4ca2014-05-20 21:43:27 +0100370 assert(tsp_vectors == NULL);
371 tsp_vectors = (tsp_vectors_t *) x1;
Achin Gupta375f5382014-02-18 18:12:48 +0000372
Vikram Kanigiri4e813412014-07-15 16:49:22 +0100373 if (tsp_vectors) {
374 set_tsp_pstate(tsp_ctx->state, TSP_PSTATE_ON);
375
376 /*
377 * TSP has been successfully initialized. Register power
Paul Beesley1fbc97b2019-01-11 18:26:51 +0000378 * management hooks with PSCI
Vikram Kanigiri4e813412014-07-15 16:49:22 +0100379 */
380 psci_register_spd_pm_hook(&tspd_pm);
381
382 /*
383 * Register an interrupt handler for S-EL1 interrupts
384 * when generated during code executing in the
385 * non-secure state.
386 */
387 flags = 0;
388 set_interrupt_rm_flag(flags, NON_SECURE);
389 rc = register_interrupt_type_handler(INTR_TYPE_S_EL1,
390 tspd_sel1_interrupt_handler,
391 flags);
392 if (rc)
393 panic();
Soby Mathew47903c02015-01-13 15:48:26 +0000394
Soby Mathewbec98512015-09-03 18:29:38 +0100395#if TSP_NS_INTR_ASYNC_PREEMPT
Soby Mathew47903c02015-01-13 15:48:26 +0000396 /*
397 * Register an interrupt handler for NS interrupts when
398 * generated during code executing in secure state are
399 * routed to EL3.
400 */
401 flags = 0;
402 set_interrupt_rm_flag(flags, SECURE);
403
404 rc = register_interrupt_type_handler(INTR_TYPE_NS,
405 tspd_ns_interrupt_handler,
406 flags);
407 if (rc)
408 panic();
409
410 /*
Soby Mathewbc912822015-09-22 12:01:18 +0100411 * Disable the NS interrupt locally.
Soby Mathew47903c02015-01-13 15:48:26 +0000412 */
413 disable_intr_rm_local(INTR_TYPE_NS, SECURE);
414#endif
Vikram Kanigiri4e813412014-07-15 16:49:22 +0100415 }
416
417
418#if TSP_INIT_ASYNC
419 /* Save the Secure EL1 system register context */
420 assert(cm_get_context(SECURE) == &tsp_ctx->cpu_ctx);
421 cm_el1_sysregs_context_save(SECURE);
422
423 /* Program EL3 registers to enable entry into the next EL */
424 next_image_info = bl31_plat_get_next_image_ep_info(NON_SECURE);
425 assert(next_image_info);
426 assert(NON_SECURE ==
427 GET_SECURITY_STATE(next_image_info->h.attr));
428
Soby Mathewda43b662015-07-08 21:45:46 +0100429 cm_init_my_context(next_image_info);
Vikram Kanigiri4e813412014-07-15 16:49:22 +0100430 cm_prepare_el3_exit(NON_SECURE);
431 SMC_RET0(cm_get_context(NON_SECURE));
432#else
Achin Gupta375f5382014-02-18 18:12:48 +0000433 /*
434 * SP reports completion. The SPD must have initiated
435 * the original request through a synchronous entry
436 * into the SP. Jump back to the original C runtime
437 * context.
438 */
Achin Gupta916a2c12014-02-09 23:11:46 +0000439 tspd_synchronous_sp_exit(tsp_ctx, x1);
Jonathan Wright75a5d8b2018-03-14 15:56:21 +0000440 break;
Vikram Kanigiri4e813412014-07-15 16:49:22 +0100441#endif
Douglas Raillardf2129652016-11-24 15:43:19 +0000442 /*
443 * This function ID is used only by the SP to indicate it has finished
David Cunado28f69ab2017-04-05 11:34:03 +0100444 * aborting a preempted Yielding SMC Call.
Douglas Raillardf2129652016-11-24 15:43:19 +0000445 */
446 case TSP_ABORT_DONE:
Achin Gupta375f5382014-02-18 18:12:48 +0000447
Achin Gupta607084e2014-02-09 18:24:19 +0000448 /*
Sandrine Bailleuxf4119ec2015-12-17 13:58:58 +0000449 * These function IDs are used only by the SP to indicate it has
Achin Gupta607084e2014-02-09 18:24:19 +0000450 * finished:
451 * 1. turning itself on in response to an earlier psci
452 * cpu_on request
453 * 2. resuming itself after an earlier psci cpu_suspend
454 * request.
455 */
456 case TSP_ON_DONE:
457 case TSP_RESUME_DONE:
458
459 /*
Sandrine Bailleuxf4119ec2015-12-17 13:58:58 +0000460 * These function IDs are used only by the SP to indicate it has
Achin Gupta607084e2014-02-09 18:24:19 +0000461 * finished:
462 * 1. suspending itself after an earlier psci cpu_suspend
463 * request.
464 * 2. turning itself off in response to an earlier psci
465 * cpu_off request.
466 */
467 case TSP_OFF_DONE:
468 case TSP_SUSPEND_DONE:
Juan Castillo4dc4a472014-08-12 11:17:06 +0100469 case TSP_SYSTEM_OFF_DONE:
470 case TSP_SYSTEM_RESET_DONE:
Achin Gupta607084e2014-02-09 18:24:19 +0000471 if (ns)
472 SMC_RET1(handle, SMC_UNK);
473
474 /*
475 * SP reports completion. The SPD must have initiated the
476 * original request through a synchronous entry into the SP.
477 * Jump back to the original C runtime context, and pass x1 as
478 * return value to the caller
479 */
Achin Gupta916a2c12014-02-09 23:11:46 +0000480 tspd_synchronous_sp_exit(tsp_ctx, x1);
Jonathan Wright75a5d8b2018-03-14 15:56:21 +0000481 break;
Achin Gupta607084e2014-02-09 18:24:19 +0000482
Achin Gupta916a2c12014-02-09 23:11:46 +0000483 /*
484 * Request from non-secure client to perform an
485 * arithmetic operation or response from secure
486 * payload to an earlier request.
487 */
Soby Mathew9f71f702014-05-09 20:49:17 +0100488 case TSP_FAST_FID(TSP_ADD):
489 case TSP_FAST_FID(TSP_SUB):
490 case TSP_FAST_FID(TSP_MUL):
491 case TSP_FAST_FID(TSP_DIV):
492
David Cunado28f69ab2017-04-05 11:34:03 +0100493 case TSP_YIELD_FID(TSP_ADD):
494 case TSP_YIELD_FID(TSP_SUB):
495 case TSP_YIELD_FID(TSP_MUL):
496 case TSP_YIELD_FID(TSP_DIV):
Achin Gupta916a2c12014-02-09 23:11:46 +0000497 if (ns) {
498 /*
499 * This is a fresh request from the non-secure client.
500 * The parameters are in x1 and x2. Figure out which
501 * registers need to be preserved, save the non-secure
502 * state and send the request to the secure payload.
503 */
Andrew Thoelkea2f65532014-05-14 17:09:32 +0100504 assert(handle == cm_get_context(NON_SECURE));
Soby Mathew9f71f702014-05-09 20:49:17 +0100505
506 /* Check if we are already preempted */
David Cunado28f69ab2017-04-05 11:34:03 +0100507 if (get_yield_smc_active_flag(tsp_ctx->state))
Soby Mathew9f71f702014-05-09 20:49:17 +0100508 SMC_RET1(handle, SMC_UNK);
509
Achin Gupta916a2c12014-02-09 23:11:46 +0000510 cm_el1_sysregs_context_save(NON_SECURE);
511
512 /* Save x1 and x2 for use by TSP_GET_ARGS call below */
Soby Mathew9f71f702014-05-09 20:49:17 +0100513 store_tsp_args(tsp_ctx, x1, x2);
Achin Gupta916a2c12014-02-09 23:11:46 +0000514
515 /*
516 * We are done stashing the non-secure context. Ask the
517 * secure payload to do the work now.
518 */
519
520 /*
521 * Verify if there is a valid context to use, copy the
522 * operation type and parameters to the secure context
523 * and jump to the fast smc entry point in the secure
524 * payload. Entry into S-EL1 will take place upon exit
525 * from this function.
526 */
Andrew Thoelkea2f65532014-05-14 17:09:32 +0100527 assert(&tsp_ctx->cpu_ctx == cm_get_context(SECURE));
Soby Mathew9f71f702014-05-09 20:49:17 +0100528
529 /* Set appropriate entry for SMC.
530 * We expect the TSP to manage the PSTATE.I and PSTATE.F
531 * flags as appropriate.
532 */
533 if (GET_SMC_TYPE(smc_fid) == SMC_TYPE_FAST) {
534 cm_set_elr_el3(SECURE, (uint64_t)
Andrew Thoelke891c4ca2014-05-20 21:43:27 +0100535 &tsp_vectors->fast_smc_entry);
Soby Mathew9f71f702014-05-09 20:49:17 +0100536 } else {
David Cunado28f69ab2017-04-05 11:34:03 +0100537 set_yield_smc_active_flag(tsp_ctx->state);
Soby Mathew9f71f702014-05-09 20:49:17 +0100538 cm_set_elr_el3(SECURE, (uint64_t)
David Cunado28f69ab2017-04-05 11:34:03 +0100539 &tsp_vectors->yield_smc_entry);
Soby Mathewbec98512015-09-03 18:29:38 +0100540#if TSP_NS_INTR_ASYNC_PREEMPT
Soby Mathew47903c02015-01-13 15:48:26 +0000541 /*
542 * Enable the routing of NS interrupts to EL3
David Cunado28f69ab2017-04-05 11:34:03 +0100543 * during processing of a Yielding SMC Call on
544 * this core.
Soby Mathew47903c02015-01-13 15:48:26 +0000545 */
546 enable_intr_rm_local(INTR_TYPE_NS, SECURE);
547#endif
Jeenu Viswambharan339580c2018-01-10 15:22:49 +0000548
549#if EL3_EXCEPTION_HANDLING
550 /*
551 * With EL3 exception handling, while an SMC is
552 * being processed, Non-secure interrupts can't
553 * preempt Secure execution. However, for
554 * yielding SMCs, we want preemption to happen;
555 * so explicitly allow NS preemption in this
Jeenu Viswambharanabf5b062018-01-22 12:42:54 +0000556 * case, and supply the preemption return code
557 * for TSP.
Jeenu Viswambharan339580c2018-01-10 15:22:49 +0000558 */
Jeenu Viswambharanabf5b062018-01-22 12:42:54 +0000559 ehf_allow_ns_preemption(TSP_PREEMPTED);
Jeenu Viswambharan339580c2018-01-10 15:22:49 +0000560#endif
Soby Mathew9f71f702014-05-09 20:49:17 +0100561 }
562
Achin Gupta916a2c12014-02-09 23:11:46 +0000563 cm_el1_sysregs_context_restore(SECURE);
564 cm_set_next_eret_context(SECURE);
Soby Mathew9f71f702014-05-09 20:49:17 +0100565 SMC_RET3(&tsp_ctx->cpu_ctx, smc_fid, x1, x2);
Achin Gupta916a2c12014-02-09 23:11:46 +0000566 } else {
567 /*
568 * This is the result from the secure client of an
Soby Mathew9f71f702014-05-09 20:49:17 +0100569 * earlier request. The results are in x1-x3. Copy it
Achin Gupta916a2c12014-02-09 23:11:46 +0000570 * into the non-secure context, save the secure state
571 * and return to the non-secure state.
572 */
Andrew Thoelkea2f65532014-05-14 17:09:32 +0100573 assert(handle == cm_get_context(SECURE));
Achin Gupta916a2c12014-02-09 23:11:46 +0000574 cm_el1_sysregs_context_save(SECURE);
575
576 /* Get a reference to the non-secure context */
Andrew Thoelkea2f65532014-05-14 17:09:32 +0100577 ns_cpu_context = cm_get_context(NON_SECURE);
Achin Gupta916a2c12014-02-09 23:11:46 +0000578 assert(ns_cpu_context);
Achin Gupta916a2c12014-02-09 23:11:46 +0000579
580 /* Restore non-secure state */
581 cm_el1_sysregs_context_restore(NON_SECURE);
582 cm_set_next_eret_context(NON_SECURE);
David Cunado28f69ab2017-04-05 11:34:03 +0100583 if (GET_SMC_TYPE(smc_fid) == SMC_TYPE_YIELD) {
584 clr_yield_smc_active_flag(tsp_ctx->state);
Soby Mathewbec98512015-09-03 18:29:38 +0100585#if TSP_NS_INTR_ASYNC_PREEMPT
Soby Mathew47903c02015-01-13 15:48:26 +0000586 /*
587 * Disable the routing of NS interrupts to EL3
David Cunado28f69ab2017-04-05 11:34:03 +0100588 * after processing of a Yielding SMC Call on
589 * this core is finished.
Soby Mathew47903c02015-01-13 15:48:26 +0000590 */
591 disable_intr_rm_local(INTR_TYPE_NS, SECURE);
592#endif
593 }
594
Soby Mathew9f71f702014-05-09 20:49:17 +0100595 SMC_RET3(ns_cpu_context, x1, x2, x3);
Achin Gupta916a2c12014-02-09 23:11:46 +0000596 }
Daniel Boulby8942a1b2018-06-22 14:16:03 +0100597 assert(0); /* Unreachable */
Achin Gupta916a2c12014-02-09 23:11:46 +0000598
Douglas Raillardf2129652016-11-24 15:43:19 +0000599 /*
David Cunado28f69ab2017-04-05 11:34:03 +0100600 * Request from the non-secure world to abort a preempted Yielding SMC
601 * Call.
Douglas Raillardf2129652016-11-24 15:43:19 +0000602 */
603 case TSP_FID_ABORT:
604 /* ABORT should only be invoked by normal world */
605 if (!ns) {
606 assert(0);
607 break;
608 }
609
Douglas Raillardbcc3dd32017-02-03 18:01:51 +0000610 assert(handle == cm_get_context(NON_SECURE));
611 cm_el1_sysregs_context_save(NON_SECURE);
612
Douglas Raillardf2129652016-11-24 15:43:19 +0000613 /* Abort the preempted SMC request */
Douglas Raillardbcc3dd32017-02-03 18:01:51 +0000614 if (!tspd_abort_preempted_smc(tsp_ctx)) {
Douglas Raillardf2129652016-11-24 15:43:19 +0000615 /*
616 * If there was no preempted SMC to abort, return
617 * SMC_UNK.
Douglas Raillardbcc3dd32017-02-03 18:01:51 +0000618 *
619 * Restoring the NON_SECURE context is not necessary as
620 * the synchronous entry did not take place if the
621 * return code of tspd_abort_preempted_smc is zero.
Douglas Raillardf2129652016-11-24 15:43:19 +0000622 */
Douglas Raillardbcc3dd32017-02-03 18:01:51 +0000623 cm_set_next_eret_context(NON_SECURE);
624 break;
625 }
Douglas Raillardf2129652016-11-24 15:43:19 +0000626
Douglas Raillardbcc3dd32017-02-03 18:01:51 +0000627 cm_el1_sysregs_context_restore(NON_SECURE);
628 cm_set_next_eret_context(NON_SECURE);
Antonio Nino Diazacb29142017-04-04 17:08:32 +0100629 SMC_RET1(handle, SMC_OK);
Achin Gupta916a2c12014-02-09 23:11:46 +0000630
631 /*
Soby Mathew9f71f702014-05-09 20:49:17 +0100632 * Request from non secure world to resume the preempted
David Cunado28f69ab2017-04-05 11:34:03 +0100633 * Yielding SMC Call.
Soby Mathew9f71f702014-05-09 20:49:17 +0100634 */
635 case TSP_FID_RESUME:
Soby Mathew3d578512014-05-27 10:20:01 +0100636 /* RESUME should be invoked only by normal world */
637 if (!ns) {
638 assert(0);
639 break;
640 }
Soby Mathew9f71f702014-05-09 20:49:17 +0100641
Soby Mathew3d578512014-05-27 10:20:01 +0100642 /*
643 * This is a resume request from the non-secure client.
644 * save the non-secure state and send the request to
645 * the secure payload.
646 */
Andrew Thoelkea2f65532014-05-14 17:09:32 +0100647 assert(handle == cm_get_context(NON_SECURE));
Soby Mathew9f71f702014-05-09 20:49:17 +0100648
Soby Mathew3d578512014-05-27 10:20:01 +0100649 /* Check if we are already preempted before resume */
David Cunado28f69ab2017-04-05 11:34:03 +0100650 if (!get_yield_smc_active_flag(tsp_ctx->state))
Soby Mathew3d578512014-05-27 10:20:01 +0100651 SMC_RET1(handle, SMC_UNK);
Soby Mathew9f71f702014-05-09 20:49:17 +0100652
Soby Mathew3d578512014-05-27 10:20:01 +0100653 cm_el1_sysregs_context_save(NON_SECURE);
Soby Mathew9f71f702014-05-09 20:49:17 +0100654
Soby Mathew3d578512014-05-27 10:20:01 +0100655 /*
656 * We are done stashing the non-secure context. Ask the
657 * secure payload to do the work now.
658 */
Soby Mathewbec98512015-09-03 18:29:38 +0100659#if TSP_NS_INTR_ASYNC_PREEMPT
Soby Mathew47903c02015-01-13 15:48:26 +0000660 /*
661 * Enable the routing of NS interrupts to EL3 during resumption
David Cunado28f69ab2017-04-05 11:34:03 +0100662 * of a Yielding SMC Call on this core.
Soby Mathew47903c02015-01-13 15:48:26 +0000663 */
664 enable_intr_rm_local(INTR_TYPE_NS, SECURE);
665#endif
666
Jeenu Viswambharan339580c2018-01-10 15:22:49 +0000667#if EL3_EXCEPTION_HANDLING
668 /*
669 * Allow the resumed yielding SMC processing to be preempted by
Jeenu Viswambharanabf5b062018-01-22 12:42:54 +0000670 * Non-secure interrupts. Also, supply the preemption return
671 * code for TSP.
Jeenu Viswambharan339580c2018-01-10 15:22:49 +0000672 */
Jeenu Viswambharanabf5b062018-01-22 12:42:54 +0000673 ehf_allow_ns_preemption(TSP_PREEMPTED);
Jeenu Viswambharan339580c2018-01-10 15:22:49 +0000674#endif
Soby Mathew9f71f702014-05-09 20:49:17 +0100675
Soby Mathew3d578512014-05-27 10:20:01 +0100676 /* We just need to return to the preempted point in
677 * TSP and the execution will resume as normal.
678 */
679 cm_el1_sysregs_context_restore(SECURE);
680 cm_set_next_eret_context(SECURE);
681 SMC_RET0(&tsp_ctx->cpu_ctx);
Soby Mathew9f71f702014-05-09 20:49:17 +0100682
683 /*
Achin Gupta916a2c12014-02-09 23:11:46 +0000684 * This is a request from the secure payload for more arguments
685 * for an ongoing arithmetic operation requested by the
686 * non-secure world. Simply return the arguments from the non-
687 * secure client in the original call.
688 */
689 case TSP_GET_ARGS:
690 if (ns)
691 SMC_RET1(handle, SMC_UNK);
692
Soby Mathew9f71f702014-05-09 20:49:17 +0100693 get_tsp_args(tsp_ctx, x1, x2);
694 SMC_RET2(handle, x1, x2);
Achin Gupta916a2c12014-02-09 23:11:46 +0000695
Jeenu Viswambharandf1ddb52014-02-28 11:23:35 +0000696 case TOS_CALL_COUNT:
697 /*
698 * Return the number of service function IDs implemented to
699 * provide service to non-secure
700 */
701 SMC_RET1(handle, TSP_NUM_FID);
702
703 case TOS_UID:
704 /* Return TSP UID to the caller */
705 SMC_UUID_RET(handle, tsp_uuid);
706
707 case TOS_CALL_VERSION:
708 /* Return the version of current implementation */
709 SMC_RET2(handle, TSP_VERSION_MAJOR, TSP_VERSION_MINOR);
710
Achin Gupta375f5382014-02-18 18:12:48 +0000711 default:
Achin Gupta607084e2014-02-09 18:24:19 +0000712 break;
Achin Gupta375f5382014-02-18 18:12:48 +0000713 }
714
Achin Gupta607084e2014-02-09 18:24:19 +0000715 SMC_RET1(handle, SMC_UNK);
Achin Gupta375f5382014-02-18 18:12:48 +0000716}
717
Soby Mathew9f71f702014-05-09 20:49:17 +0100718/* Define a SPD runtime service descriptor for fast SMC calls */
Achin Gupta375f5382014-02-18 18:12:48 +0000719DECLARE_RT_SVC(
Soby Mathew9f71f702014-05-09 20:49:17 +0100720 tspd_fast,
Achin Gupta375f5382014-02-18 18:12:48 +0000721
722 OEN_TOS_START,
723 OEN_TOS_END,
724 SMC_TYPE_FAST,
725 tspd_setup,
726 tspd_smc_handler
727);
Soby Mathew9f71f702014-05-09 20:49:17 +0100728
David Cunado28f69ab2017-04-05 11:34:03 +0100729/* Define a SPD runtime service descriptor for Yielding SMC Calls */
Soby Mathew9f71f702014-05-09 20:49:17 +0100730DECLARE_RT_SVC(
731 tspd_std,
732
733 OEN_TOS_START,
734 OEN_TOS_END,
David Cunado28f69ab2017-04-05 11:34:03 +0100735 SMC_TYPE_YIELD,
Soby Mathew9f71f702014-05-09 20:49:17 +0100736 NULL,
737 tspd_smc_handler
738);