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Achin Gupta375f5382014-02-18 18:12:48 +00001/*
2 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31
32/*******************************************************************************
33 * This is the Secure Payload Dispatcher (SPD). The dispatcher is meant to be a
34 * plug-in component to the Secure Monitor, registered as a runtime service. The
35 * SPD is expected to be a functional extension of the Secure Payload (SP) that
36 * executes in Secure EL1. The Secure Monitor will delegate all SMCs targeting
37 * the Trusted OS/Applications range to the dispatcher. The SPD will either
38 * handle the request locally or delegate it to the Secure Payload. It is also
39 * responsible for initialising and maintaining communication with the SP.
40 ******************************************************************************/
Achin Gupta375f5382014-02-18 18:12:48 +000041#include <arch_helpers.h>
Dan Handley2bd4ef22014-04-09 13:14:54 +010042#include <assert.h>
43#include <bl_common.h>
44#include <bl31.h>
Achin Gupta375f5382014-02-18 18:12:48 +000045#include <context_mgmt.h>
Achin Guptaaeaab682014-05-09 13:21:31 +010046#include <debug.h>
47#include <errno.h>
48#include <platform.h>
Achin Gupta375f5382014-02-18 18:12:48 +000049#include <runtime_svc.h>
Dan Handley2bd4ef22014-04-09 13:14:54 +010050#include <stddef.h>
Achin Gupta375f5382014-02-18 18:12:48 +000051#include <tsp.h>
Jeenu Viswambharandf1ddb52014-02-28 11:23:35 +000052#include <uuid.h>
Dan Handley714a0d22014-04-09 13:13:04 +010053#include "tspd_private.h"
Achin Gupta375f5382014-02-18 18:12:48 +000054
55/*******************************************************************************
Andrew Thoelke891c4ca2014-05-20 21:43:27 +010056 * Address of the entrypoint vector table in the Secure Payload. It is
57 * initialised once on the primary core after a cold boot.
Achin Gupta375f5382014-02-18 18:12:48 +000058 ******************************************************************************/
Andrew Thoelke891c4ca2014-05-20 21:43:27 +010059tsp_vectors_t *tsp_vectors;
Achin Gupta375f5382014-02-18 18:12:48 +000060
61/*******************************************************************************
62 * Array to keep track of per-cpu Secure Payload state
63 ******************************************************************************/
Dan Handleye2712bc2014-04-10 15:37:22 +010064tsp_context_t tspd_sp_context[TSPD_CORE_COUNT];
Achin Gupta375f5382014-02-18 18:12:48 +000065
Jeenu Viswambharan7f366602014-02-20 17:11:00 +000066
Jeenu Viswambharandf1ddb52014-02-28 11:23:35 +000067/* TSP UID */
68DEFINE_SVC_UUID(tsp_uuid,
69 0x5b3056a0, 0x3291, 0x427b, 0x98, 0x11,
70 0x71, 0x68, 0xca, 0x50, 0xf3, 0xfa);
71
Vikram Kanigirid8c9d262014-05-16 18:48:12 +010072int32_t tspd_init(void);
Jeenu Viswambharan7f366602014-02-20 17:11:00 +000073
Achin Guptaaeaab682014-05-09 13:21:31 +010074/*******************************************************************************
75 * This function is the handler registered for S-EL1 interrupts by the TSPD. It
76 * validates the interrupt and upon success arranges entry into the TSP at
77 * 'tsp_fiq_entry()' for handling the interrupt.
78 ******************************************************************************/
79static uint64_t tspd_sel1_interrupt_handler(uint32_t id,
80 uint32_t flags,
81 void *handle,
82 void *cookie)
83{
84 uint32_t linear_id;
85 uint64_t mpidr;
86 tsp_context_t *tsp_ctx;
87
88 /* Check the security state when the exception was generated */
89 assert(get_interrupt_src_ss(flags) == NON_SECURE);
90
91#if IMF_READ_INTERRUPT_ID
92 /* Check the security status of the interrupt */
Soby Mathew93c89ec2014-05-28 17:14:36 +010093 assert(plat_ic_get_interrupt_type(id) == INTR_TYPE_S_EL1);
Achin Guptaaeaab682014-05-09 13:21:31 +010094#endif
95
96 /* Sanity check the pointer to this cpu's context */
97 mpidr = read_mpidr();
Andrew Thoelkea2f65532014-05-14 17:09:32 +010098 assert(handle == cm_get_context(NON_SECURE));
Achin Guptaaeaab682014-05-09 13:21:31 +010099
100 /* Save the non-secure context before entering the TSP */
101 cm_el1_sysregs_context_save(NON_SECURE);
102
103 /* Get a reference to this cpu's TSP context */
104 linear_id = platform_get_core_pos(mpidr);
105 tsp_ctx = &tspd_sp_context[linear_id];
Andrew Thoelkea2f65532014-05-14 17:09:32 +0100106 assert(&tsp_ctx->cpu_ctx == cm_get_context(SECURE));
Achin Guptaaeaab682014-05-09 13:21:31 +0100107
108 /*
109 * Determine if the TSP was previously preempted. Its last known
110 * context has to be preserved in this case.
111 * The TSP should return control to the TSPD after handling this
112 * FIQ. Preserve essential EL3 context to allow entry into the
113 * TSP at the FIQ entry point using the 'cpu_context' structure.
114 * There is no need to save the secure system register context
115 * since the TSP is supposed to preserve it during S-EL1 interrupt
116 * handling.
117 */
118 if (get_std_smc_active_flag(tsp_ctx->state)) {
119 tsp_ctx->saved_spsr_el3 = SMC_GET_EL3(&tsp_ctx->cpu_ctx,
120 CTX_SPSR_EL3);
121 tsp_ctx->saved_elr_el3 = SMC_GET_EL3(&tsp_ctx->cpu_ctx,
122 CTX_ELR_EL3);
123 }
124
Achin Guptaaeaab682014-05-09 13:21:31 +0100125 cm_el1_sysregs_context_restore(SECURE);
Andrew Thoelke4e126072014-06-04 21:10:52 +0100126 cm_set_elr_spsr_el3(SECURE, (uint64_t) &tsp_vectors->fiq_entry,
127 SPSR_64(MODE_EL1, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS));
Achin Guptaaeaab682014-05-09 13:21:31 +0100128 cm_set_next_eret_context(SECURE);
129
130 /*
131 * Tell the TSP that it has to handle an FIQ synchronously. Also the
132 * instruction in normal world where the interrupt was generated is
133 * passed for debugging purposes. It is safe to retrieve this address
134 * from ELR_EL3 as the secure context will not take effect until
135 * el3_exit().
136 */
137 SMC_RET2(&tsp_ctx->cpu_ctx, TSP_HANDLE_FIQ_AND_RETURN, read_elr_el3());
138}
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000139
Achin Gupta375f5382014-02-18 18:12:48 +0000140/*******************************************************************************
141 * Secure Payload Dispatcher setup. The SPD finds out the SP entrypoint and type
142 * (aarch32/aarch64) if not already known and initialises the context for entry
143 * into the SP for its initialisation.
144 ******************************************************************************/
145int32_t tspd_setup(void)
146{
Vikram Kanigiri9d70f0f2014-07-15 16:46:43 +0100147 entry_point_info_t *tsp_ep_info;
Achin Gupta375f5382014-02-18 18:12:48 +0000148 uint64_t mpidr = read_mpidr();
149 uint32_t linear_id;
150
151 linear_id = platform_get_core_pos(mpidr);
152
153 /*
154 * Get information about the Secure Payload (BL32) image. Its
155 * absence is a critical failure. TODO: Add support to
156 * conditionally include the SPD service
157 */
Vikram Kanigiri9d70f0f2014-07-15 16:46:43 +0100158 tsp_ep_info = bl31_plat_get_next_image_ep_info(SECURE);
159 if (!tsp_ep_info) {
160 WARN("No TSP provided by BL2 boot loader, Booting device"
161 " without TSP initialization. SMC`s destined for TSP"
162 " will return SMC_UNK\n");
163 return 1;
164 }
Achin Gupta375f5382014-02-18 18:12:48 +0000165
166 /*
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000167 * If there's no valid entry point for SP, we return a non-zero value
168 * signalling failure initializing the service. We bail out without
169 * registering any handlers
170 */
Vikram Kanigiri9d70f0f2014-07-15 16:46:43 +0100171 if (!tsp_ep_info->pc)
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000172 return 1;
173
174 /*
Achin Gupta375f5382014-02-18 18:12:48 +0000175 * We could inspect the SP image and determine it's execution
176 * state i.e whether AArch32 or AArch64. Assuming it's AArch64
177 * for the time being.
178 */
Vikram Kanigiri9d70f0f2014-07-15 16:46:43 +0100179 tspd_init_tsp_ep_state(tsp_ep_info,
180 TSP_AARCH64,
181 tsp_ep_info->pc,
182 &tspd_sp_context[linear_id]);
Achin Gupta375f5382014-02-18 18:12:48 +0000183
Vikram Kanigiri4e813412014-07-15 16:49:22 +0100184#if TSP_INIT_ASYNC
185 bl31_set_next_image_type(SECURE);
186#else
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000187 /*
188 * All TSPD initialization done. Now register our init function with
189 * BL31 for deferred invocation
190 */
191 bl31_register_bl32_init(&tspd_init);
Vikram Kanigiri4e813412014-07-15 16:49:22 +0100192#endif
Vikram Kanigiri9d70f0f2014-07-15 16:46:43 +0100193 return 0;
Achin Gupta375f5382014-02-18 18:12:48 +0000194}
195
196/*******************************************************************************
197 * This function passes control to the Secure Payload image (BL32) for the first
198 * time on the primary cpu after a cold boot. It assumes that a valid secure
199 * context has already been created by tspd_setup() which can be directly used.
200 * It also assumes that a valid non-secure context has been initialised by PSCI
201 * so it does not need to save and restore any non-secure state. This function
202 * performs a synchronous entry into the Secure payload. The SP passes control
Vikram Kanigirid8c9d262014-05-16 18:48:12 +0100203 * back to this routine through a SMC.
Achin Gupta375f5382014-02-18 18:12:48 +0000204 ******************************************************************************/
Vikram Kanigirid8c9d262014-05-16 18:48:12 +0100205int32_t tspd_init(void)
Achin Gupta375f5382014-02-18 18:12:48 +0000206{
207 uint64_t mpidr = read_mpidr();
Vikram Kanigiri4e813412014-07-15 16:49:22 +0100208 uint32_t linear_id = platform_get_core_pos(mpidr);
Dan Handleye2712bc2014-04-10 15:37:22 +0100209 tsp_context_t *tsp_ctx = &tspd_sp_context[linear_id];
Vikram Kanigiri9d70f0f2014-07-15 16:46:43 +0100210 entry_point_info_t *tsp_entry_point;
Vikram Kanigiri4e813412014-07-15 16:49:22 +0100211 uint64_t rc;
Vikram Kanigiri9d70f0f2014-07-15 16:46:43 +0100212
213 /*
214 * Get information about the Secure Payload (BL32) image. Its
215 * absence is a critical failure.
216 */
217 tsp_entry_point = bl31_plat_get_next_image_ep_info(SECURE);
218 assert(tsp_entry_point);
219
220 cm_init_context(mpidr, tsp_entry_point);
Achin Gupta375f5382014-02-18 18:12:48 +0000221
222 /*
Vikram Kanigiri4e813412014-07-15 16:49:22 +0100223 * Arrange for an entry into the test secure payload. It will be
224 * returned via TSP_ENTRY_DONE case
Achin Gupta607084e2014-02-09 18:24:19 +0000225 */
Achin Gupta375f5382014-02-18 18:12:48 +0000226 rc = tspd_synchronous_sp_entry(tsp_ctx);
227 assert(rc != 0);
Achin Guptaaeaab682014-05-09 13:21:31 +0100228
Achin Gupta375f5382014-02-18 18:12:48 +0000229 return rc;
230}
231
Jeenu Viswambharan7f366602014-02-20 17:11:00 +0000232
Achin Gupta375f5382014-02-18 18:12:48 +0000233/*******************************************************************************
234 * This function is responsible for handling all SMCs in the Trusted OS/App
235 * range from the non-secure state as defined in the SMC Calling Convention
236 * Document. It is also responsible for communicating with the Secure payload
237 * to delegate work and return results back to the non-secure state. Lastly it
238 * will also return any information that the secure payload needs to do the
239 * work assigned to it.
240 ******************************************************************************/
241uint64_t tspd_smc_handler(uint32_t smc_fid,
242 uint64_t x1,
243 uint64_t x2,
244 uint64_t x3,
245 uint64_t x4,
246 void *cookie,
247 void *handle,
248 uint64_t flags)
249{
Dan Handleye2712bc2014-04-10 15:37:22 +0100250 cpu_context_t *ns_cpu_context;
Achin Gupta375f5382014-02-18 18:12:48 +0000251 unsigned long mpidr = read_mpidr();
252 uint32_t linear_id = platform_get_core_pos(mpidr), ns;
Dan Handleye2712bc2014-04-10 15:37:22 +0100253 tsp_context_t *tsp_ctx = &tspd_sp_context[linear_id];
Vikram Kanigiri4e813412014-07-15 16:49:22 +0100254 uint64_t rc;
255#if TSP_INIT_ASYNC
256 entry_point_info_t *next_image_info;
257#endif
Achin Gupta375f5382014-02-18 18:12:48 +0000258
259 /* Determine which security state this SMC originated from */
260 ns = is_caller_non_secure(flags);
261
262 switch (smc_fid) {
263
264 /*
Soby Mathew9f71f702014-05-09 20:49:17 +0100265 * This function ID is used by TSP to indicate that it was
266 * preempted by a normal world IRQ.
267 *
268 */
269 case TSP_PREEMPTED:
270 if (ns)
271 SMC_RET1(handle, SMC_UNK);
272
Andrew Thoelkea2f65532014-05-14 17:09:32 +0100273 assert(handle == cm_get_context(SECURE));
Soby Mathew9f71f702014-05-09 20:49:17 +0100274 cm_el1_sysregs_context_save(SECURE);
275 /* Get a reference to the non-secure context */
Andrew Thoelkea2f65532014-05-14 17:09:32 +0100276 ns_cpu_context = cm_get_context(NON_SECURE);
Soby Mathew9f71f702014-05-09 20:49:17 +0100277 assert(ns_cpu_context);
278
279 /*
280 * Restore non-secure state. There is no need to save the
281 * secure system register context since the TSP was supposed
282 * to preserve it during S-EL1 interrupt handling.
283 */
284 cm_el1_sysregs_context_restore(NON_SECURE);
285 cm_set_next_eret_context(NON_SECURE);
286
287 SMC_RET1(ns_cpu_context, SMC_PREEMPTED);
288
289 /*
Achin Guptaaeaab682014-05-09 13:21:31 +0100290 * This function ID is used only by the TSP to indicate that it has
291 * finished handling a S-EL1 FIQ interrupt. Execution should resume
292 * in the normal world.
293 */
294 case TSP_HANDLED_S_EL1_FIQ:
295 if (ns)
296 SMC_RET1(handle, SMC_UNK);
297
Andrew Thoelkea2f65532014-05-14 17:09:32 +0100298 assert(handle == cm_get_context(SECURE));
Achin Guptaaeaab682014-05-09 13:21:31 +0100299
300 /*
301 * Restore the relevant EL3 state which saved to service
302 * this SMC.
303 */
304 if (get_std_smc_active_flag(tsp_ctx->state)) {
305 SMC_SET_EL3(&tsp_ctx->cpu_ctx,
306 CTX_SPSR_EL3,
307 tsp_ctx->saved_spsr_el3);
308 SMC_SET_EL3(&tsp_ctx->cpu_ctx,
309 CTX_ELR_EL3,
310 tsp_ctx->saved_elr_el3);
311 }
312
313 /* Get a reference to the non-secure context */
Andrew Thoelkea2f65532014-05-14 17:09:32 +0100314 ns_cpu_context = cm_get_context(NON_SECURE);
Achin Guptaaeaab682014-05-09 13:21:31 +0100315 assert(ns_cpu_context);
316
317 /*
318 * Restore non-secure state. There is no need to save the
319 * secure system register context since the TSP was supposed
320 * to preserve it during S-EL1 interrupt handling.
321 */
322 cm_el1_sysregs_context_restore(NON_SECURE);
323 cm_set_next_eret_context(NON_SECURE);
324
325 SMC_RET0((uint64_t) ns_cpu_context);
326
327
328 /*
329 * This function ID is used only by the TSP to indicate that it was
330 * interrupted due to a EL3 FIQ interrupt. Execution should resume
331 * in the normal world.
332 */
333 case TSP_EL3_FIQ:
334 if (ns)
335 SMC_RET1(handle, SMC_UNK);
336
Andrew Thoelkea2f65532014-05-14 17:09:32 +0100337 assert(handle == cm_get_context(SECURE));
Achin Guptaaeaab682014-05-09 13:21:31 +0100338
339 /* Assert that standard SMC execution has been preempted */
340 assert(get_std_smc_active_flag(tsp_ctx->state));
341
342 /* Save the secure system register state */
343 cm_el1_sysregs_context_save(SECURE);
344
345 /* Get a reference to the non-secure context */
Andrew Thoelkea2f65532014-05-14 17:09:32 +0100346 ns_cpu_context = cm_get_context(NON_SECURE);
Achin Guptaaeaab682014-05-09 13:21:31 +0100347 assert(ns_cpu_context);
348
349 /* Restore non-secure state */
350 cm_el1_sysregs_context_restore(NON_SECURE);
351 cm_set_next_eret_context(NON_SECURE);
352
353 SMC_RET1(ns_cpu_context, TSP_EL3_FIQ);
354
355
356 /*
Achin Gupta375f5382014-02-18 18:12:48 +0000357 * This function ID is used only by the SP to indicate it has
358 * finished initialising itself after a cold boot
359 */
360 case TSP_ENTRY_DONE:
361 if (ns)
362 SMC_RET1(handle, SMC_UNK);
363
364 /*
365 * Stash the SP entry points information. This is done
366 * only once on the primary cpu
367 */
Andrew Thoelke891c4ca2014-05-20 21:43:27 +0100368 assert(tsp_vectors == NULL);
369 tsp_vectors = (tsp_vectors_t *) x1;
Achin Gupta375f5382014-02-18 18:12:48 +0000370
Vikram Kanigiri4e813412014-07-15 16:49:22 +0100371 if (tsp_vectors) {
372 set_tsp_pstate(tsp_ctx->state, TSP_PSTATE_ON);
373
374 /*
375 * TSP has been successfully initialized. Register power
376 * managemnt hooks with PSCI
377 */
378 psci_register_spd_pm_hook(&tspd_pm);
379
380 /*
381 * Register an interrupt handler for S-EL1 interrupts
382 * when generated during code executing in the
383 * non-secure state.
384 */
385 flags = 0;
386 set_interrupt_rm_flag(flags, NON_SECURE);
387 rc = register_interrupt_type_handler(INTR_TYPE_S_EL1,
388 tspd_sel1_interrupt_handler,
389 flags);
390 if (rc)
391 panic();
392 }
393
394
395#if TSP_INIT_ASYNC
396 /* Save the Secure EL1 system register context */
397 assert(cm_get_context(SECURE) == &tsp_ctx->cpu_ctx);
398 cm_el1_sysregs_context_save(SECURE);
399
400 /* Program EL3 registers to enable entry into the next EL */
401 next_image_info = bl31_plat_get_next_image_ep_info(NON_SECURE);
402 assert(next_image_info);
403 assert(NON_SECURE ==
404 GET_SECURITY_STATE(next_image_info->h.attr));
405
406 cm_init_context(read_mpidr_el1(), next_image_info);
407 cm_prepare_el3_exit(NON_SECURE);
408 SMC_RET0(cm_get_context(NON_SECURE));
409#else
Achin Gupta375f5382014-02-18 18:12:48 +0000410 /*
411 * SP reports completion. The SPD must have initiated
412 * the original request through a synchronous entry
413 * into the SP. Jump back to the original C runtime
414 * context.
415 */
Achin Gupta916a2c12014-02-09 23:11:46 +0000416 tspd_synchronous_sp_exit(tsp_ctx, x1);
Vikram Kanigiri4e813412014-07-15 16:49:22 +0100417#endif
Achin Gupta375f5382014-02-18 18:12:48 +0000418
Achin Gupta607084e2014-02-09 18:24:19 +0000419 /*
420 * These function IDs is used only by the SP to indicate it has
421 * finished:
422 * 1. turning itself on in response to an earlier psci
423 * cpu_on request
424 * 2. resuming itself after an earlier psci cpu_suspend
425 * request.
426 */
427 case TSP_ON_DONE:
428 case TSP_RESUME_DONE:
429
430 /*
431 * These function IDs is used only by the SP to indicate it has
432 * finished:
433 * 1. suspending itself after an earlier psci cpu_suspend
434 * request.
435 * 2. turning itself off in response to an earlier psci
436 * cpu_off request.
437 */
438 case TSP_OFF_DONE:
439 case TSP_SUSPEND_DONE:
440 if (ns)
441 SMC_RET1(handle, SMC_UNK);
442
443 /*
444 * SP reports completion. The SPD must have initiated the
445 * original request through a synchronous entry into the SP.
446 * Jump back to the original C runtime context, and pass x1 as
447 * return value to the caller
448 */
Achin Gupta916a2c12014-02-09 23:11:46 +0000449 tspd_synchronous_sp_exit(tsp_ctx, x1);
Achin Gupta607084e2014-02-09 18:24:19 +0000450
Achin Gupta916a2c12014-02-09 23:11:46 +0000451 /*
452 * Request from non-secure client to perform an
453 * arithmetic operation or response from secure
454 * payload to an earlier request.
455 */
Soby Mathew9f71f702014-05-09 20:49:17 +0100456 case TSP_FAST_FID(TSP_ADD):
457 case TSP_FAST_FID(TSP_SUB):
458 case TSP_FAST_FID(TSP_MUL):
459 case TSP_FAST_FID(TSP_DIV):
460
461 case TSP_STD_FID(TSP_ADD):
462 case TSP_STD_FID(TSP_SUB):
463 case TSP_STD_FID(TSP_MUL):
464 case TSP_STD_FID(TSP_DIV):
Achin Gupta916a2c12014-02-09 23:11:46 +0000465 if (ns) {
466 /*
467 * This is a fresh request from the non-secure client.
468 * The parameters are in x1 and x2. Figure out which
469 * registers need to be preserved, save the non-secure
470 * state and send the request to the secure payload.
471 */
Andrew Thoelkea2f65532014-05-14 17:09:32 +0100472 assert(handle == cm_get_context(NON_SECURE));
Soby Mathew9f71f702014-05-09 20:49:17 +0100473
474 /* Check if we are already preempted */
475 if (get_std_smc_active_flag(tsp_ctx->state))
476 SMC_RET1(handle, SMC_UNK);
477
Achin Gupta916a2c12014-02-09 23:11:46 +0000478 cm_el1_sysregs_context_save(NON_SECURE);
479
480 /* Save x1 and x2 for use by TSP_GET_ARGS call below */
Soby Mathew9f71f702014-05-09 20:49:17 +0100481 store_tsp_args(tsp_ctx, x1, x2);
Achin Gupta916a2c12014-02-09 23:11:46 +0000482
483 /*
484 * We are done stashing the non-secure context. Ask the
485 * secure payload to do the work now.
486 */
487
488 /*
489 * Verify if there is a valid context to use, copy the
490 * operation type and parameters to the secure context
491 * and jump to the fast smc entry point in the secure
492 * payload. Entry into S-EL1 will take place upon exit
493 * from this function.
494 */
Andrew Thoelkea2f65532014-05-14 17:09:32 +0100495 assert(&tsp_ctx->cpu_ctx == cm_get_context(SECURE));
Soby Mathew9f71f702014-05-09 20:49:17 +0100496
497 /* Set appropriate entry for SMC.
498 * We expect the TSP to manage the PSTATE.I and PSTATE.F
499 * flags as appropriate.
500 */
501 if (GET_SMC_TYPE(smc_fid) == SMC_TYPE_FAST) {
502 cm_set_elr_el3(SECURE, (uint64_t)
Andrew Thoelke891c4ca2014-05-20 21:43:27 +0100503 &tsp_vectors->fast_smc_entry);
Soby Mathew9f71f702014-05-09 20:49:17 +0100504 } else {
505 set_std_smc_active_flag(tsp_ctx->state);
506 cm_set_elr_el3(SECURE, (uint64_t)
Andrew Thoelke891c4ca2014-05-20 21:43:27 +0100507 &tsp_vectors->std_smc_entry);
Soby Mathew9f71f702014-05-09 20:49:17 +0100508 }
509
Achin Gupta916a2c12014-02-09 23:11:46 +0000510 cm_el1_sysregs_context_restore(SECURE);
511 cm_set_next_eret_context(SECURE);
Soby Mathew9f71f702014-05-09 20:49:17 +0100512 SMC_RET3(&tsp_ctx->cpu_ctx, smc_fid, x1, x2);
Achin Gupta916a2c12014-02-09 23:11:46 +0000513 } else {
514 /*
515 * This is the result from the secure client of an
Soby Mathew9f71f702014-05-09 20:49:17 +0100516 * earlier request. The results are in x1-x3. Copy it
Achin Gupta916a2c12014-02-09 23:11:46 +0000517 * into the non-secure context, save the secure state
518 * and return to the non-secure state.
519 */
Andrew Thoelkea2f65532014-05-14 17:09:32 +0100520 assert(handle == cm_get_context(SECURE));
Achin Gupta916a2c12014-02-09 23:11:46 +0000521 cm_el1_sysregs_context_save(SECURE);
522
523 /* Get a reference to the non-secure context */
Andrew Thoelkea2f65532014-05-14 17:09:32 +0100524 ns_cpu_context = cm_get_context(NON_SECURE);
Achin Gupta916a2c12014-02-09 23:11:46 +0000525 assert(ns_cpu_context);
Achin Gupta916a2c12014-02-09 23:11:46 +0000526
527 /* Restore non-secure state */
528 cm_el1_sysregs_context_restore(NON_SECURE);
529 cm_set_next_eret_context(NON_SECURE);
Soby Mathew9f71f702014-05-09 20:49:17 +0100530 if (GET_SMC_TYPE(smc_fid) == SMC_TYPE_STD)
531 clr_std_smc_active_flag(tsp_ctx->state);
532 SMC_RET3(ns_cpu_context, x1, x2, x3);
Achin Gupta916a2c12014-02-09 23:11:46 +0000533 }
534
535 break;
536
537 /*
Soby Mathew9f71f702014-05-09 20:49:17 +0100538 * Request from non secure world to resume the preempted
539 * Standard SMC call.
540 */
541 case TSP_FID_RESUME:
Soby Mathew3d578512014-05-27 10:20:01 +0100542 /* RESUME should be invoked only by normal world */
543 if (!ns) {
544 assert(0);
545 break;
546 }
Soby Mathew9f71f702014-05-09 20:49:17 +0100547
Soby Mathew3d578512014-05-27 10:20:01 +0100548 /*
549 * This is a resume request from the non-secure client.
550 * save the non-secure state and send the request to
551 * the secure payload.
552 */
Andrew Thoelkea2f65532014-05-14 17:09:32 +0100553 assert(handle == cm_get_context(NON_SECURE));
Soby Mathew9f71f702014-05-09 20:49:17 +0100554
Soby Mathew3d578512014-05-27 10:20:01 +0100555 /* Check if we are already preempted before resume */
556 if (!get_std_smc_active_flag(tsp_ctx->state))
557 SMC_RET1(handle, SMC_UNK);
Soby Mathew9f71f702014-05-09 20:49:17 +0100558
Soby Mathew3d578512014-05-27 10:20:01 +0100559 cm_el1_sysregs_context_save(NON_SECURE);
Soby Mathew9f71f702014-05-09 20:49:17 +0100560
Soby Mathew3d578512014-05-27 10:20:01 +0100561 /*
562 * We are done stashing the non-secure context. Ask the
563 * secure payload to do the work now.
564 */
Soby Mathew9f71f702014-05-09 20:49:17 +0100565
Soby Mathew3d578512014-05-27 10:20:01 +0100566 /* We just need to return to the preempted point in
567 * TSP and the execution will resume as normal.
568 */
569 cm_el1_sysregs_context_restore(SECURE);
570 cm_set_next_eret_context(SECURE);
571 SMC_RET0(&tsp_ctx->cpu_ctx);
Soby Mathew9f71f702014-05-09 20:49:17 +0100572
573 /*
Achin Gupta916a2c12014-02-09 23:11:46 +0000574 * This is a request from the secure payload for more arguments
575 * for an ongoing arithmetic operation requested by the
576 * non-secure world. Simply return the arguments from the non-
577 * secure client in the original call.
578 */
579 case TSP_GET_ARGS:
580 if (ns)
581 SMC_RET1(handle, SMC_UNK);
582
Soby Mathew9f71f702014-05-09 20:49:17 +0100583 get_tsp_args(tsp_ctx, x1, x2);
584 SMC_RET2(handle, x1, x2);
Achin Gupta916a2c12014-02-09 23:11:46 +0000585
Jeenu Viswambharandf1ddb52014-02-28 11:23:35 +0000586 case TOS_CALL_COUNT:
587 /*
588 * Return the number of service function IDs implemented to
589 * provide service to non-secure
590 */
591 SMC_RET1(handle, TSP_NUM_FID);
592
593 case TOS_UID:
594 /* Return TSP UID to the caller */
595 SMC_UUID_RET(handle, tsp_uuid);
596
597 case TOS_CALL_VERSION:
598 /* Return the version of current implementation */
599 SMC_RET2(handle, TSP_VERSION_MAJOR, TSP_VERSION_MINOR);
600
Achin Gupta375f5382014-02-18 18:12:48 +0000601 default:
Achin Gupta607084e2014-02-09 18:24:19 +0000602 break;
Achin Gupta375f5382014-02-18 18:12:48 +0000603 }
604
Achin Gupta607084e2014-02-09 18:24:19 +0000605 SMC_RET1(handle, SMC_UNK);
Achin Gupta375f5382014-02-18 18:12:48 +0000606}
607
Soby Mathew9f71f702014-05-09 20:49:17 +0100608/* Define a SPD runtime service descriptor for fast SMC calls */
Achin Gupta375f5382014-02-18 18:12:48 +0000609DECLARE_RT_SVC(
Soby Mathew9f71f702014-05-09 20:49:17 +0100610 tspd_fast,
Achin Gupta375f5382014-02-18 18:12:48 +0000611
612 OEN_TOS_START,
613 OEN_TOS_END,
614 SMC_TYPE_FAST,
615 tspd_setup,
616 tspd_smc_handler
617);
Soby Mathew9f71f702014-05-09 20:49:17 +0100618
619/* Define a SPD runtime service descriptor for standard SMC calls */
620DECLARE_RT_SVC(
621 tspd_std,
622
623 OEN_TOS_START,
624 OEN_TOS_END,
625 SMC_TYPE_STD,
626 NULL,
627 tspd_smc_handler
628);