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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Dan Handleye83b0ca2014-01-14 18:17:09 +00002 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include <stdio.h>
32#include <string.h>
33#include <assert.h>
34#include <arch_helpers.h>
35#include <console.h>
36#include <platform.h>
37#include <psci_private.h>
Jeenu Viswambharancaa84932014-02-06 10:36:15 +000038#include <runtime_svc.h>
39#include <debug.h>
40#include <context_mgmt.h>
Achin Gupta4f6ad662013-10-25 09:08:21 +010041
42/*******************************************************************************
43 * PSCI frontend api for servicing SMCs. Described in the PSCI spec.
44 ******************************************************************************/
45int psci_cpu_on(unsigned long target_cpu,
46 unsigned long entrypoint,
47 unsigned long context_id)
48
49{
50 int rc;
Achin Gupta0959db52013-12-02 17:33:04 +000051 unsigned int start_afflvl, end_afflvl;
Achin Gupta4f6ad662013-10-25 09:08:21 +010052
53 /* Determine if the cpu exists of not */
54 rc = psci_validate_mpidr(target_cpu, MPIDR_AFFLVL0);
55 if (rc != PSCI_E_SUCCESS) {
56 goto exit;
57 }
58
Achin Gupta0959db52013-12-02 17:33:04 +000059 /*
60 * To turn this cpu on, specify which affinity
61 * levels need to be turned on
62 */
63 start_afflvl = MPIDR_AFFLVL0;
64 end_afflvl = get_max_afflvl();
Achin Gupta4f6ad662013-10-25 09:08:21 +010065 rc = psci_afflvl_on(target_cpu,
66 entrypoint,
67 context_id,
68 start_afflvl,
Achin Gupta0959db52013-12-02 17:33:04 +000069 end_afflvl);
Achin Gupta4f6ad662013-10-25 09:08:21 +010070
71exit:
72 return rc;
73}
74
75unsigned int psci_version(void)
76{
77 return PSCI_MAJOR_VER | PSCI_MINOR_VER;
78}
79
80int psci_cpu_suspend(unsigned int power_state,
81 unsigned long entrypoint,
82 unsigned long context_id)
83{
84 int rc;
85 unsigned long mpidr;
Achin Gupta0959db52013-12-02 17:33:04 +000086 unsigned int target_afflvl, pstate_type;
Achin Gupta4f6ad662013-10-25 09:08:21 +010087
Vikram Kanigirif100f412014-04-01 19:26:26 +010088 /* Check SBZ bits in power state are zero */
89 if (psci_validate_power_state(power_state))
90 return PSCI_E_INVALID_PARAMS;
91
Achin Gupta4f6ad662013-10-25 09:08:21 +010092 /* Sanity check the requested state */
Achin Gupta0959db52013-12-02 17:33:04 +000093 target_afflvl = psci_get_pstate_afflvl(power_state);
Vikram Kanigiri3b7c59b2014-03-21 11:57:10 +000094 if (target_afflvl > MPIDR_MAX_AFFLVL)
95 return PSCI_E_INVALID_PARAMS;
Achin Gupta4f6ad662013-10-25 09:08:21 +010096
Vikram Kanigiri3b7c59b2014-03-21 11:57:10 +000097 pstate_type = psci_get_pstate_type(power_state);
98 if (pstate_type == PSTATE_TYPE_STANDBY) {
99 if (psci_plat_pm_ops->affinst_standby)
100 rc = psci_plat_pm_ops->affinst_standby(power_state);
101 else
102 return PSCI_E_INVALID_PARAMS;
103 } else {
104 mpidr = read_mpidr();
105 rc = psci_afflvl_suspend(mpidr,
106 entrypoint,
107 context_id,
108 power_state,
109 MPIDR_AFFLVL0,
110 target_afflvl);
111 }
Achin Gupta4f6ad662013-10-25 09:08:21 +0100112
Vikram Kanigiri3b7c59b2014-03-21 11:57:10 +0000113 assert(rc == PSCI_E_INVALID_PARAMS || rc == PSCI_E_SUCCESS);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100114 return rc;
115}
116
117int psci_cpu_off(void)
118{
119 int rc;
120 unsigned long mpidr;
121 int target_afflvl = get_max_afflvl();
122
123 mpidr = read_mpidr();
124
125 /*
126 * Traverse from the highest to the lowest affinity level. When the
127 * lowest affinity level is hit, all the locks are acquired. State
128 * management is done immediately followed by cpu, cluster ...
129 * ..target_afflvl specific actions as this function unwinds back.
130 */
Achin Gupta0959db52013-12-02 17:33:04 +0000131 rc = psci_afflvl_off(mpidr, MPIDR_AFFLVL0, target_afflvl);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100132
Achin Gupta3140a9e2013-12-02 16:23:12 +0000133 /*
134 * The only error cpu_off can return is E_DENIED. So check if that's
135 * indeed the case.
136 */
137 assert (rc == PSCI_E_SUCCESS || rc == PSCI_E_DENIED);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100138
139 return rc;
140}
141
142int psci_affinity_info(unsigned long target_affinity,
143 unsigned int lowest_affinity_level)
144{
145 int rc = PSCI_E_INVALID_PARAMS;
146 unsigned int aff_state;
147 aff_map_node *node;
148
Achin Gupta75f73672013-12-05 16:33:10 +0000149 if (lowest_affinity_level > get_max_afflvl())
150 return rc;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100151
152 node = psci_get_aff_map_node(target_affinity, lowest_affinity_level);
153 if (node && (node->state & PSCI_AFF_PRESENT)) {
Achin Gupta75f73672013-12-05 16:33:10 +0000154
155 /*
156 * TODO: For affinity levels higher than 0 i.e. cpu, the
157 * state will always be either ON or OFF. Need to investigate
158 * how critical is it to support ON_PENDING here.
159 */
160 aff_state = psci_get_state(node);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100161
162 /* A suspended cpu is available & on for the OS */
163 if (aff_state == PSCI_STATE_SUSPEND) {
164 aff_state = PSCI_STATE_ON;
165 }
166
167 rc = aff_state;
168 }
Achin Gupta75f73672013-12-05 16:33:10 +0000169
Achin Gupta4f6ad662013-10-25 09:08:21 +0100170 return rc;
171}
172
173/* Unimplemented */
174int psci_migrate(unsigned int target_cpu)
175{
176 return PSCI_E_NOT_SUPPORTED;
177}
178
179/* Unimplemented */
180unsigned int psci_migrate_info_type(void)
181{
Achin Gupta607084e2014-02-09 18:24:19 +0000182 return PSCI_TOS_NOT_PRESENT_MP;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100183}
184
185unsigned long psci_migrate_info_up_cpu(void)
186{
187 /*
188 * Return value of this currently unsupported call depends upon
189 * what psci_migrate_info_type() returns.
190 */
191 return PSCI_E_SUCCESS;
192}
193
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000194/*******************************************************************************
195 * PSCI top level handler for servicing SMCs.
196 ******************************************************************************/
197uint64_t psci_smc_handler(uint32_t smc_fid,
198 uint64_t x1,
199 uint64_t x2,
200 uint64_t x3,
201 uint64_t x4,
202 void *cookie,
203 void *handle,
204 uint64_t flags)
205{
206 uint64_t rc;
207
208 switch (smc_fid) {
209 case PSCI_VERSION:
210 rc = psci_version();
211 break;
212
213 case PSCI_CPU_OFF:
214 rc = __psci_cpu_off();
215 break;
216
217 case PSCI_CPU_SUSPEND_AARCH64:
218 case PSCI_CPU_SUSPEND_AARCH32:
219 rc = __psci_cpu_suspend(x1, x2, x3);
220 break;
221
222 case PSCI_CPU_ON_AARCH64:
223 case PSCI_CPU_ON_AARCH32:
224 rc = psci_cpu_on(x1, x2, x3);
225 break;
226
227 case PSCI_AFFINITY_INFO_AARCH32:
228 case PSCI_AFFINITY_INFO_AARCH64:
229 rc = psci_affinity_info(x1, x2);
230 break;
231
232 case PSCI_MIG_AARCH32:
233 case PSCI_MIG_AARCH64:
234 rc = psci_migrate(x1);
235 break;
236
237 case PSCI_MIG_INFO_TYPE:
238 rc = psci_migrate_info_type();
239 break;
240
241 case PSCI_MIG_INFO_UP_CPU_AARCH32:
242 case PSCI_MIG_INFO_UP_CPU_AARCH64:
243 rc = psci_migrate_info_up_cpu();
244 break;
245
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000246 default:
247 rc = SMC_UNK;
Jeenu Viswambharan1814a3e2014-02-28 10:08:33 +0000248 WARN("Unimplemented PSCI Call: 0x%x \n", smc_fid);
Jeenu Viswambharancaa84932014-02-06 10:36:15 +0000249 }
250
251 SMC_RET1(handle, rc);
252}