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Yann Gautier4b0c72a2018-07-16 10:54:09 +02001#
Yann Gautier4a0011c2022-06-30 14:40:06 +02002# Copyright (c) 2015-2024, Arm Limited and Contributors. All rights reserved.
Yann Gautier4b0c72a2018-07-16 10:54:09 +02003#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
Yann Gautier605facb2023-01-05 14:34:37 +01007# Extra partitions used to find FIP, contains:
8# metadata (2) and the FIP partitions (default is 2).
9STM32_EXTRA_PARTS := 4
10
Yann Gautierdbe63ac2022-03-16 19:03:20 +010011include plat/st/common/common.mk
12
Yann Gautier4b0c72a2018-07-16 10:54:09 +020013ARM_CORTEX_A7 := yes
14ARM_WITH_NEON := yes
Yann Gautier4b0c72a2018-07-16 10:54:09 +020015USE_COHERENT_MEM := 0
16
Yann Gautier0c0e1032021-04-01 19:31:46 +020017# Default Device tree
18DTB_FILE_NAME ?= stm32mp157c-ev1.dtb
19
20STM32MP13 ?= 0
21STM32MP15 ?= 0
22
Sebastien Pasdeloup94389ef2020-12-18 11:50:40 +010023ifeq ($(STM32MP13),1)
Yann Gautier0c0e1032021-04-01 19:31:46 +020024ifeq ($(STM32MP15),1)
25$(error Cannot enable both flags STM32MP13 and STM32MP15)
26endif
Sebastien Pasdeloup94389ef2020-12-18 11:50:40 +010027STM32MP13 := 1
28STM32MP15 := 0
Yann Gautier0c0e1032021-04-01 19:31:46 +020029else ifeq ($(STM32MP15),1)
30STM32MP13 := 0
31STM32MP15 := 1
32else ifneq ($(findstring stm32mp13,$(DTB_FILE_NAME)),)
33STM32MP13 := 1
34STM32MP15 := 0
35else ifneq ($(findstring stm32mp15,$(DTB_FILE_NAME)),)
36STM32MP13 := 0
37STM32MP15 := 1
38endif
Sebastien Pasdeloup94389ef2020-12-18 11:50:40 +010039
Yann Gautier0c0e1032021-04-01 19:31:46 +020040ifeq ($(STM32MP13),1)
Lionel Debieve13a668d2022-10-05 16:47:03 +020041# Will use SRAM2 as mbedtls heap
42STM32MP_USE_EXTERNAL_HEAP := 1
43
Sebastien Pasdeloup94389ef2020-12-18 11:50:40 +010044# DDR controller with single AXI port and 16-bit interface
45STM32MP_DDR_DUAL_AXI_PORT:= 0
46STM32MP_DDR_32BIT_INTERFACE:= 0
47
Lionel Debieve13a668d2022-10-05 16:47:03 +020048ifeq (${TRUSTED_BOARD_BOOT},1)
49# PKA algo to include
50PKA_USE_NIST_P256 := 1
51PKA_USE_BRAINPOOL_P256T1:= 1
52endif
53
Sebastien Pasdeloup94389ef2020-12-18 11:50:40 +010054# STM32 image header version v2.0
55STM32_HEADER_VERSION_MAJOR:= 2
56STM32_HEADER_VERSION_MINOR:= 0
Yann Gautier0c0e1032021-04-01 19:31:46 +020057endif
Sebastien Pasdeloup94389ef2020-12-18 11:50:40 +010058
Yann Gautier0c0e1032021-04-01 19:31:46 +020059ifeq ($(STM32MP15),1)
Yann Gautier6d8c2442020-09-17 12:42:46 +020060# DDR controller with dual AXI port and 32-bit interface
61STM32MP_DDR_DUAL_AXI_PORT:= 1
62STM32MP_DDR_32BIT_INTERFACE:= 1
63
Nicolas Le Bayondfa46cc2019-11-18 17:13:42 +010064# STM32 image header version v1.0
65STM32_HEADER_VERSION_MAJOR:= 1
66STM32_HEADER_VERSION_MINOR:= 0
Lionel Debievefd02b802022-10-05 16:16:50 +020067STM32MP_CRYPTO_ROM_LIB := 1
Lionel Debieve5adcd502022-10-05 16:51:12 +020068
69# Decryption support
70ifneq ($(DECRYPTION_SUPPORT),none)
71$(error "DECRYPTION_SUPPORT not supported on STM32MP15")
72endif
Sebastien Pasdeloup94389ef2020-12-18 11:50:40 +010073endif
Nicolas Le Bayondfa46cc2019-11-18 17:13:42 +010074
Yann Gautier7cb1c292023-04-24 11:44:51 +020075PKA_USE_NIST_P256 ?= 0
76PKA_USE_BRAINPOOL_P256T1 ?= 0
77
Etienne Carriereca651fb2020-04-10 18:51:54 +020078ifeq ($(AARCH32_SP),sp_min)
79# Disable Neon support: sp_min runtime may conflict with non-secure world
Yann Gautier46f8e672020-09-18 10:32:37 +020080TF_CFLAGS += -mfloat-abi=soft
Etienne Carriereca651fb2020-04-10 18:51:54 +020081endif
82
Yann Gautier4b0c72a2018-07-16 10:54:09 +020083# Not needed for Cortex-A7
84WORKAROUND_CVE_2017_5715:= 0
Bipin Ravicaa2e052022-02-23 23:45:50 -060085WORKAROUND_CVE_2022_23960:= 0
Yann Gautier4b0c72a2018-07-16 10:54:09 +020086
Nicolas Toromanoff5d3ade02020-12-22 13:54:51 +010087ifeq ($(STM32MP13),1)
88STM32_HASH_VER := 4
Nicolas Le Bayon5c66fab2020-12-02 16:23:49 +010089STM32_RNG_VER := 4
Nicolas Toromanoff5d3ade02020-12-22 13:54:51 +010090else # Assuming STM32MP15
91STM32_HASH_VER := 2
Nicolas Le Bayon5c66fab2020-12-02 16:23:49 +010092STM32_RNG_VER := 2
Nicolas Toromanoff5d3ade02020-12-22 13:54:51 +010093endif
94
Patrick Delaunay4c66e0a2022-03-15 11:20:56 +010095# Download load address for serial boot devices
96DWL_BUFFER_BASE ?= 0xC7000000
97
Yann Gautier5f400632020-02-12 09:30:49 +010098# Device tree
Yann Gautierf03dee52020-02-25 17:08:10 +010099ifeq ($(STM32MP13),1)
Yann Gautierf03dee52020-02-25 17:08:10 +0100100BL2_DTSI := stm32mp13-bl2.dtsi
101FDT_SOURCES := $(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl2.dts,$(DTB_FILE_NAME)))
102else
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200103BL2_DTSI := stm32mp15-bl2.dtsi
104FDT_SOURCES := $(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl2.dts,$(DTB_FILE_NAME)))
105ifeq ($(AARCH32_SP),sp_min)
106BL32_DTSI := stm32mp15-bl32.dtsi
107FDT_SOURCES += $(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl32.dts,$(DTB_FILE_NAME)))
108endif
Yann Gautierd82fca42021-03-09 10:42:02 +0100109endif
Yann Gautier5f400632020-02-12 09:30:49 +0100110
111# Macros and rules to build TF binary
Yann Gautier5f400632020-02-12 09:30:49 +0100112STM32_TF_STM32 := $(addprefix ${BUILD_PLAT}/tf-a-, $(patsubst %.dtb,%.stm32,$(DTB_FILE_NAME)))
Yann Gautierdbe63ac2022-03-16 19:03:20 +0100113STM32_LD_FILE := plat/st/stm32mp1/stm32mp1.ld.S
114STM32_BINARY_MAPPING := plat/st/stm32mp1/stm32mp1.S
Yann Gautier5f400632020-02-12 09:30:49 +0100115
Yann Gautier5f400632020-02-12 09:30:49 +0100116ifeq ($(AARCH32_SP),sp_min)
117# BL32 is built only if using SP_MIN
118BL32_DEP := bl32
119ASFLAGS += -DBL32_BIN_PATH=\"${BUILD_PLAT}/bl32.bin\"
120endif
121
Yann Gautier658775c2021-07-06 10:00:44 +0200122STM32MP_FW_CONFIG_NAME := $(patsubst %.dtb,%-fw-config.dtb,$(DTB_FILE_NAME))
123STM32MP_FW_CONFIG := ${BUILD_PLAT}/fdts/$(STM32MP_FW_CONFIG_NAME)
124ifneq (${AARCH32_SP},none)
125FDT_SOURCES += $(addprefix fdts/, $(patsubst %.dtb,%.dts,$(STM32MP_FW_CONFIG_NAME)))
126endif
127# Add the FW_CONFIG to FIP and specify the same to certtool
128$(eval $(call TOOL_ADD_PAYLOAD,${STM32MP_FW_CONFIG},--fw-config))
Lionel Debieve13a668d2022-10-05 16:47:03 +0200129ifeq ($(GENERATE_COT),1)
130STM32MP_CFG_CERT := $(BUILD_PLAT)/stm32mp_cfg_cert.crt
131# Add the STM32MP_CFG_CERT to FIP and specify the same to certtool
132$(eval $(call TOOL_ADD_PAYLOAD,${STM32MP_CFG_CERT},--stm32mp-cfg-cert))
133endif
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200134ifeq ($(AARCH32_SP),sp_min)
135STM32MP_TOS_FW_CONFIG := $(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl32.dtb,$(DTB_FILE_NAME)))
136$(eval $(call TOOL_ADD_PAYLOAD,${STM32MP_TOS_FW_CONFIG},--tos-fw-config))
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200137endif
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200138
Yann Gautier5f400632020-02-12 09:30:49 +0100139# Enable flags for C files
Leonardo Sandoval65fca7c2020-09-10 12:18:27 -0500140$(eval $(call assert_booleans,\
Yann Gautier5f400632020-02-12 09:30:49 +0100141 $(sort \
Lionel Debieve13a668d2022-10-05 16:47:03 +0200142 PKA_USE_BRAINPOOL_P256T1 \
143 PKA_USE_NIST_P256 \
Lionel Debievefd02b802022-10-05 16:16:50 +0200144 STM32MP_CRYPTO_ROM_LIB \
Yann Gautier6d8c2442020-09-17 12:42:46 +0200145 STM32MP_DDR_32BIT_INTERFACE \
146 STM32MP_DDR_DUAL_AXI_PORT \
Lionel Debieve13a668d2022-10-05 16:47:03 +0200147 STM32MP_USE_EXTERNAL_HEAP \
Sebastien Pasdeloup94389ef2020-12-18 11:50:40 +0100148 STM32MP13 \
149 STM32MP15 \
Yann Gautier5f400632020-02-12 09:30:49 +0100150)))
151
152$(eval $(call assert_numerics,\
153 $(sort \
Yann Gautier5f400632020-02-12 09:30:49 +0100154 PLAT_PARTITION_MAX_ENTRIES \
Nicolas Toromanoff5d3ade02020-12-22 13:54:51 +0100155 STM32_HASH_VER \
Lionel Debieve13a668d2022-10-05 16:47:03 +0200156 STM32_HEADER_VERSION_MAJOR \
Nicolas Le Bayon5c66fab2020-12-02 16:23:49 +0100157 STM32_RNG_VER \
Yann Gautier27f589d2021-10-15 17:59:38 +0200158 STM32_TF_A_COPIES \
Leonardo Sandoval65fca7c2020-09-10 12:18:27 -0500159)))
160
161$(eval $(call add_defines,\
Yann Gautier5f400632020-02-12 09:30:49 +0100162 $(sort \
Patrick Delaunay4c66e0a2022-03-15 11:20:56 +0100163 DWL_BUFFER_BASE \
Lionel Debieve13a668d2022-10-05 16:47:03 +0200164 PKA_USE_BRAINPOOL_P256T1 \
165 PKA_USE_NIST_P256 \
Yann Gautier27f589d2021-10-15 17:59:38 +0200166 PLAT_PARTITION_MAX_ENTRIES \
Lionel Debieve13a668d2022-10-05 16:47:03 +0200167 PLAT_TBBR_IMG_DEF \
Nicolas Toromanoff5d3ade02020-12-22 13:54:51 +0100168 STM32_HASH_VER \
Lionel Debieve13a668d2022-10-05 16:47:03 +0200169 STM32_HEADER_VERSION_MAJOR \
Nicolas Le Bayon5c66fab2020-12-02 16:23:49 +0100170 STM32_RNG_VER \
Yann Gautier27f589d2021-10-15 17:59:38 +0200171 STM32_TF_A_COPIES \
Lionel Debievefd02b802022-10-05 16:16:50 +0200172 STM32MP_CRYPTO_ROM_LIB \
Yann Gautier6d8c2442020-09-17 12:42:46 +0200173 STM32MP_DDR_32BIT_INTERFACE \
174 STM32MP_DDR_DUAL_AXI_PORT \
Lionel Debieve13a668d2022-10-05 16:47:03 +0200175 STM32MP_USE_EXTERNAL_HEAP \
Sebastien Pasdeloup94389ef2020-12-18 11:50:40 +0100176 STM32MP13 \
177 STM32MP15 \
Leonardo Sandoval65fca7c2020-09-10 12:18:27 -0500178)))
Nicolas Le Bayon3f42cad2019-09-03 09:52:05 +0200179
Yann Gautier5f400632020-02-12 09:30:49 +0100180# Include paths and source files
Yann Gautieree8f5422019-02-14 11:13:25 +0100181PLAT_INCLUDES += -Iplat/st/stm32mp1/include/
Yann Gautier4b0c72a2018-07-16 10:54:09 +0200182
Yann Gautierdbe63ac2022-03-16 19:03:20 +0100183PLAT_BL_COMMON_SOURCES += plat/st/stm32mp1/stm32mp1_private.c
Yann Gautier4b0c72a2018-07-16 10:54:09 +0200184
Julius Werner6b88b652018-11-27 17:50:28 -0800185PLAT_BL_COMMON_SOURCES += drivers/st/uart/aarch32/stm32_console.S
Yann Gautier4b0c72a2018-07-16 10:54:09 +0200186
187ifneq (${ENABLE_STACK_PROTECTOR},0)
188PLAT_BL_COMMON_SOURCES += plat/st/stm32mp1/stm32mp1_stack_protector.c
189endif
190
Yann Gautier4b0c72a2018-07-16 10:54:09 +0200191PLAT_BL_COMMON_SOURCES += lib/cpus/aarch32/cortex_a7.S
192
Yann Gautier2c1fa282019-05-09 11:56:30 +0200193PLAT_BL_COMMON_SOURCES += drivers/arm/tzc/tzc400.c \
Nicolas Le Bayon97287cd2019-05-20 18:35:02 +0200194 drivers/st/bsec/bsec2.c \
Yann Gautiercaf575b2018-07-24 17:18:19 +0200195 drivers/st/ddr/stm32mp1_ddr_helpers.c \
Yann Gautier113f31e2019-01-17 09:34:18 +0100196 drivers/st/i2c/stm32_i2c.c \
Yann Gautier091eab52019-06-04 18:06:34 +0200197 drivers/st/iwdg/stm32_iwdg.c \
Yann Gautiera45433b2019-01-16 18:31:00 +0100198 drivers/st/pmic/stm32mp_pmic.c \
199 drivers/st/pmic/stpmic1.c \
Yann Gautier9aea69e2018-07-24 17:13:36 +0200200 drivers/st/reset/stm32mp1_reset.c \
Yann Gautier091eab52019-06-04 18:06:34 +0200201 plat/st/stm32mp1/stm32mp1_dbgmcu.c \
Yann Gautiercaf575b2018-07-24 17:18:19 +0200202 plat/st/stm32mp1/stm32mp1_helper.S \
Yann Gautier3edc7c32019-05-20 19:17:08 +0200203 plat/st/stm32mp1/stm32mp1_syscfg.c
Yann Gautier4b0c72a2018-07-16 10:54:09 +0200204
Gabriel Fernandez1308d752020-03-11 11:30:34 +0100205ifeq ($(STM32MP13),1)
206PLAT_BL_COMMON_SOURCES += drivers/st/clk/clk-stm32-core.c \
Nicolas Le Bayon5c66fab2020-12-02 16:23:49 +0100207 drivers/st/clk/clk-stm32mp13.c \
208 drivers/st/crypto/stm32_rng.c
Gabriel Fernandez1308d752020-03-11 11:30:34 +0100209else
210PLAT_BL_COMMON_SOURCES += drivers/st/clk/stm32mp1_clk.c
211endif
212
Yann Gautierdbe63ac2022-03-16 19:03:20 +0100213BL2_SOURCES += plat/st/stm32mp1/plat_bl2_mem_params_desc.c \
Lionel Debieve1dc5e2e2020-09-27 21:13:53 +0200214 plat/st/stm32mp1/stm32mp1_fconf_firewall.c
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200215
Yann Gautierdbe63ac2022-03-16 19:03:20 +0100216BL2_SOURCES += drivers/st/crypto/stm32_hash.c \
Yann Gautier4b0c72a2018-07-16 10:54:09 +0200217 plat/st/stm32mp1/bl2_plat_setup.c
218
Lionel Debieve13a668d2022-10-05 16:47:03 +0200219ifeq (${TRUSTED_BOARD_BOOT},1)
Lionel Debieve13a668d2022-10-05 16:47:03 +0200220ifeq ($(STM32MP13),1)
Yann Gautierdbe63ac2022-03-16 19:03:20 +0100221BL2_SOURCES += drivers/st/crypto/stm32_pka.c
222BL2_SOURCES += drivers/st/crypto/stm32_saes.c
Lionel Debieve13a668d2022-10-05 16:47:03 +0200223endif
Lionel Debieve13a668d2022-10-05 16:47:03 +0200224endif
225
Nicolas Le Bayon3f42cad2019-09-03 09:52:05 +0200226ifneq ($(filter 1,${STM32MP_EMMC} ${STM32MP_SDMMC}),)
Yann Gautierdbe63ac2022-03-16 19:03:20 +0100227BL2_SOURCES += drivers/st/mmc/stm32_sdmmc2.c
Nicolas Le Bayon3f42cad2019-09-03 09:52:05 +0200228endif
Yann Gautier8244e1d2018-10-15 09:36:58 +0200229
Lionel Debieve402a46b2019-11-04 12:28:15 +0100230ifeq (${STM32MP_RAW_NAND},1)
Yann Gautierdbe63ac2022-03-16 19:03:20 +0100231BL2_SOURCES += drivers/st/fmc/stm32_fmc2_nand.c
Lionel Debieve186b0462019-09-24 18:30:12 +0200232endif
233
Lionel Debievecb0dbc42019-09-25 09:11:31 +0200234ifneq ($(filter 1,${STM32MP_SPI_NAND} ${STM32MP_SPI_NOR}),)
Yann Gautierdbe63ac2022-03-16 19:03:20 +0100235BL2_SOURCES += drivers/st/spi/stm32_qspi.c
Lionel Debievecb0dbc42019-09-25 09:11:31 +0200236endif
237
238ifneq ($(filter 1,${STM32MP_RAW_NAND} ${STM32MP_SPI_NAND} ${STM32MP_SPI_NOR}),)
239BL2_SOURCES += plat/st/stm32mp1/stm32mp1_boot_device.c
Lionel Debieve402a46b2019-11-04 12:28:15 +0100240endif
241
Patrick Delaunaye50571b2021-10-28 13:48:52 +0200242ifeq (${STM32MP_UART_PROGRAMMER},1)
Yann Gautierdbe63ac2022-03-16 19:03:20 +0100243BL2_SOURCES += drivers/st/uart/stm32_uart.c
Patrick Delaunaye50571b2021-10-28 13:48:52 +0200244endif
245
Patrick Delaunay9c5ee782021-07-06 14:07:56 +0200246ifeq (${STM32MP_USB_PROGRAMMER},1)
247#The DFU stack uses only one end point, reduce the USB stack footprint
248$(eval $(call add_define_val,CONFIG_USBD_EP_NB,1U))
Patrick Delaunaye50571b2021-10-28 13:48:52 +0200249BL2_SOURCES += drivers/st/usb/stm32mp1_usb.c \
Patrick Delaunay9c5ee782021-07-06 14:07:56 +0200250 plat/st/stm32mp1/stm32mp1_usb_dfu.c
251endif
252
Yann Gautierdbe63ac2022-03-16 19:03:20 +0100253BL2_SOURCES += drivers/st/ddr/stm32mp1_ddr.c \
Yann Gautiercaf575b2018-07-24 17:18:19 +0200254 drivers/st/ddr/stm32mp1_ram.c
255
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200256ifeq ($(AARCH32_SP),sp_min)
257# Create DTB file for BL32
258${BUILD_PLAT}/fdts/%-bl32.dts: fdts/%.dts fdts/${BL32_DTSI} | ${BUILD_PLAT} fdt_dirs
Chris Kay1870c722024-05-02 17:52:37 +0000259 $(q)echo '#include "$(patsubst fdts/%,%,$<)"' > $@
260 $(q)echo '#include "${BL32_DTSI}"' >> $@
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200261
262${BUILD_PLAT}/fdts/%-bl32.dtb: ${BUILD_PLAT}/fdts/%-bl32.dts
263endif
264
Yann Gautierdbe63ac2022-03-16 19:03:20 +0100265include plat/st/common/common_rules.mk