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Yann Gautier4b0c72a2018-07-16 10:54:09 +02001#
Yann Gautiera02a3ba2023-04-24 11:35:40 +02002# Copyright (c) 2015-2023, Arm Limited and Contributors. All rights reserved.
Yann Gautier4b0c72a2018-07-16 10:54:09 +02003#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
Yann Gautierdbe63ac2022-03-16 19:03:20 +01007include plat/st/common/common.mk
8
Yann Gautier4b0c72a2018-07-16 10:54:09 +02009ARM_CORTEX_A7 := yes
10ARM_WITH_NEON := yes
Yann Gautier4b0c72a2018-07-16 10:54:09 +020011USE_COHERENT_MEM := 0
12
Yann Gautier0c0e1032021-04-01 19:31:46 +020013# Default Device tree
14DTB_FILE_NAME ?= stm32mp157c-ev1.dtb
15
16STM32MP13 ?= 0
17STM32MP15 ?= 0
18
Sebastien Pasdeloup94389ef2020-12-18 11:50:40 +010019ifeq ($(STM32MP13),1)
Yann Gautier0c0e1032021-04-01 19:31:46 +020020ifeq ($(STM32MP15),1)
21$(error Cannot enable both flags STM32MP13 and STM32MP15)
22endif
Sebastien Pasdeloup94389ef2020-12-18 11:50:40 +010023STM32MP13 := 1
24STM32MP15 := 0
Yann Gautier0c0e1032021-04-01 19:31:46 +020025else ifeq ($(STM32MP15),1)
26STM32MP13 := 0
27STM32MP15 := 1
28else ifneq ($(findstring stm32mp13,$(DTB_FILE_NAME)),)
29STM32MP13 := 1
30STM32MP15 := 0
31else ifneq ($(findstring stm32mp15,$(DTB_FILE_NAME)),)
32STM32MP13 := 0
33STM32MP15 := 1
34endif
Sebastien Pasdeloup94389ef2020-12-18 11:50:40 +010035
Yann Gautier0c0e1032021-04-01 19:31:46 +020036ifeq ($(STM32MP13),1)
Lionel Debieve13a668d2022-10-05 16:47:03 +020037# Will use SRAM2 as mbedtls heap
38STM32MP_USE_EXTERNAL_HEAP := 1
39
Sebastien Pasdeloup94389ef2020-12-18 11:50:40 +010040# DDR controller with single AXI port and 16-bit interface
41STM32MP_DDR_DUAL_AXI_PORT:= 0
42STM32MP_DDR_32BIT_INTERFACE:= 0
43
Lionel Debieve13a668d2022-10-05 16:47:03 +020044ifeq (${TRUSTED_BOARD_BOOT},1)
45# PKA algo to include
46PKA_USE_NIST_P256 := 1
47PKA_USE_BRAINPOOL_P256T1:= 1
48endif
49
Sebastien Pasdeloup94389ef2020-12-18 11:50:40 +010050# STM32 image header version v2.0
51STM32_HEADER_VERSION_MAJOR:= 2
52STM32_HEADER_VERSION_MINOR:= 0
Yann Gautier0c0e1032021-04-01 19:31:46 +020053endif
Sebastien Pasdeloup94389ef2020-12-18 11:50:40 +010054
Yann Gautier0c0e1032021-04-01 19:31:46 +020055ifeq ($(STM32MP15),1)
Yann Gautier6d8c2442020-09-17 12:42:46 +020056# DDR controller with dual AXI port and 32-bit interface
57STM32MP_DDR_DUAL_AXI_PORT:= 1
58STM32MP_DDR_32BIT_INTERFACE:= 1
59
Nicolas Le Bayondfa46cc2019-11-18 17:13:42 +010060# STM32 image header version v1.0
61STM32_HEADER_VERSION_MAJOR:= 1
62STM32_HEADER_VERSION_MINOR:= 0
Yann Gautierbc9f0fd2022-06-30 11:33:27 +020063
64# Add OP-TEE reserved shared memory area in mapping
65STM32MP15_OPTEE_RSV_SHM := 1
66$(eval $(call add_defines,STM32MP15_OPTEE_RSV_SHM))
Lionel Debievefd02b802022-10-05 16:16:50 +020067
68STM32MP_CRYPTO_ROM_LIB := 1
Lionel Debieve5adcd502022-10-05 16:51:12 +020069
70# Decryption support
71ifneq ($(DECRYPTION_SUPPORT),none)
72$(error "DECRYPTION_SUPPORT not supported on STM32MP15")
73endif
Sebastien Pasdeloup94389ef2020-12-18 11:50:40 +010074endif
Nicolas Le Bayondfa46cc2019-11-18 17:13:42 +010075
Yann Gautier7cb1c292023-04-24 11:44:51 +020076PKA_USE_NIST_P256 ?= 0
77PKA_USE_BRAINPOOL_P256T1 ?= 0
78
Etienne Carriereca651fb2020-04-10 18:51:54 +020079ifeq ($(AARCH32_SP),sp_min)
80# Disable Neon support: sp_min runtime may conflict with non-secure world
Yann Gautier46f8e672020-09-18 10:32:37 +020081TF_CFLAGS += -mfloat-abi=soft
Etienne Carriereca651fb2020-04-10 18:51:54 +020082endif
83
Yann Gautier4b0c72a2018-07-16 10:54:09 +020084# Not needed for Cortex-A7
85WORKAROUND_CVE_2017_5715:= 0
Bipin Ravicaa2e052022-02-23 23:45:50 -060086WORKAROUND_CVE_2022_23960:= 0
Yann Gautier4b0c72a2018-07-16 10:54:09 +020087
Yann Gautierc7465912022-06-30 15:21:19 +020088# Number of TF-A copies in the device
89STM32_TF_A_COPIES := 2
90
91# PLAT_PARTITION_MAX_ENTRIES must take care of STM32_TF-A_COPIES and other partitions
92# such as metadata (2) to find all the FIP partitions (default is 2).
93PLAT_PARTITION_MAX_ENTRIES := $(shell echo $$(($(STM32_TF_A_COPIES) + 4)))
94
Sughosh Ganua1976842021-11-10 17:47:16 +053095ifeq (${PSA_FWU_SUPPORT},1)
Sughosh Ganua1976842021-11-10 17:47:16 +053096# Number of banks of updatable firmware
97NR_OF_FW_BANKS := 2
98NR_OF_IMAGES_IN_FW_BANK := 1
99
Yann Gautierc7465912022-06-30 15:21:19 +0200100FWU_MAX_PART = $(shell echo $$(($(STM32_TF_A_COPIES) + 2 + $(NR_OF_FW_BANKS))))
101ifeq ($(shell test $(FWU_MAX_PART) -gt $(PLAT_PARTITION_MAX_ENTRIES); echo $$?),0)
102$(error "Required partition number is $(FWU_MAX_PART) where PLAT_PARTITION_MAX_ENTRIES is only \
103$(PLAT_PARTITION_MAX_ENTRIES)")
Sughosh Ganua1976842021-11-10 17:47:16 +0530104endif
Sughosh Ganua1976842021-11-10 17:47:16 +0530105endif
Yann Gautier8244e1d2018-10-15 09:36:58 +0200106
Nicolas Toromanoff5d3ade02020-12-22 13:54:51 +0100107ifeq ($(STM32MP13),1)
108STM32_HASH_VER := 4
Nicolas Le Bayon5c66fab2020-12-02 16:23:49 +0100109STM32_RNG_VER := 4
Nicolas Toromanoff5d3ade02020-12-22 13:54:51 +0100110else # Assuming STM32MP15
111STM32_HASH_VER := 2
Nicolas Le Bayon5c66fab2020-12-02 16:23:49 +0100112STM32_RNG_VER := 2
Nicolas Toromanoff5d3ade02020-12-22 13:54:51 +0100113endif
114
Patrick Delaunay4c66e0a2022-03-15 11:20:56 +0100115# Download load address for serial boot devices
116DWL_BUFFER_BASE ?= 0xC7000000
117
Yann Gautier5f400632020-02-12 09:30:49 +0100118# Device tree
Yann Gautierf03dee52020-02-25 17:08:10 +0100119ifeq ($(STM32MP13),1)
Yann Gautierf03dee52020-02-25 17:08:10 +0100120BL2_DTSI := stm32mp13-bl2.dtsi
121FDT_SOURCES := $(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl2.dts,$(DTB_FILE_NAME)))
122else
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200123BL2_DTSI := stm32mp15-bl2.dtsi
124FDT_SOURCES := $(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl2.dts,$(DTB_FILE_NAME)))
125ifeq ($(AARCH32_SP),sp_min)
126BL32_DTSI := stm32mp15-bl32.dtsi
127FDT_SOURCES += $(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl32.dts,$(DTB_FILE_NAME)))
128endif
Yann Gautierd82fca42021-03-09 10:42:02 +0100129endif
Yann Gautier5f400632020-02-12 09:30:49 +0100130
131# Macros and rules to build TF binary
Yann Gautier5f400632020-02-12 09:30:49 +0100132STM32_TF_STM32 := $(addprefix ${BUILD_PLAT}/tf-a-, $(patsubst %.dtb,%.stm32,$(DTB_FILE_NAME)))
Yann Gautierdbe63ac2022-03-16 19:03:20 +0100133STM32_LD_FILE := plat/st/stm32mp1/stm32mp1.ld.S
134STM32_BINARY_MAPPING := plat/st/stm32mp1/stm32mp1.S
Yann Gautier5f400632020-02-12 09:30:49 +0100135
Yann Gautier5f400632020-02-12 09:30:49 +0100136ifeq ($(AARCH32_SP),sp_min)
137# BL32 is built only if using SP_MIN
138BL32_DEP := bl32
139ASFLAGS += -DBL32_BIN_PATH=\"${BUILD_PLAT}/bl32.bin\"
140endif
141
Yann Gautier658775c2021-07-06 10:00:44 +0200142STM32MP_FW_CONFIG_NAME := $(patsubst %.dtb,%-fw-config.dtb,$(DTB_FILE_NAME))
143STM32MP_FW_CONFIG := ${BUILD_PLAT}/fdts/$(STM32MP_FW_CONFIG_NAME)
144ifneq (${AARCH32_SP},none)
145FDT_SOURCES += $(addprefix fdts/, $(patsubst %.dtb,%.dts,$(STM32MP_FW_CONFIG_NAME)))
146endif
147# Add the FW_CONFIG to FIP and specify the same to certtool
148$(eval $(call TOOL_ADD_PAYLOAD,${STM32MP_FW_CONFIG},--fw-config))
Lionel Debieve13a668d2022-10-05 16:47:03 +0200149ifeq ($(GENERATE_COT),1)
150STM32MP_CFG_CERT := $(BUILD_PLAT)/stm32mp_cfg_cert.crt
151# Add the STM32MP_CFG_CERT to FIP and specify the same to certtool
152$(eval $(call TOOL_ADD_PAYLOAD,${STM32MP_CFG_CERT},--stm32mp-cfg-cert))
153endif
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200154ifeq ($(AARCH32_SP),sp_min)
155STM32MP_TOS_FW_CONFIG := $(addprefix ${BUILD_PLAT}/fdts/, $(patsubst %.dtb,%-bl32.dtb,$(DTB_FILE_NAME)))
156$(eval $(call TOOL_ADD_PAYLOAD,${STM32MP_TOS_FW_CONFIG},--tos-fw-config))
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200157endif
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200158
Yann Gautier5f400632020-02-12 09:30:49 +0100159# Enable flags for C files
Leonardo Sandoval65fca7c2020-09-10 12:18:27 -0500160$(eval $(call assert_booleans,\
Yann Gautier5f400632020-02-12 09:30:49 +0100161 $(sort \
Lionel Debieve13a668d2022-10-05 16:47:03 +0200162 PKA_USE_BRAINPOOL_P256T1 \
163 PKA_USE_NIST_P256 \
Lionel Debievefd02b802022-10-05 16:16:50 +0200164 STM32MP_CRYPTO_ROM_LIB \
Yann Gautier6d8c2442020-09-17 12:42:46 +0200165 STM32MP_DDR_32BIT_INTERFACE \
166 STM32MP_DDR_DUAL_AXI_PORT \
Lionel Debieve13a668d2022-10-05 16:47:03 +0200167 STM32MP_USE_EXTERNAL_HEAP \
Sebastien Pasdeloup94389ef2020-12-18 11:50:40 +0100168 STM32MP13 \
169 STM32MP15 \
Yann Gautier5f400632020-02-12 09:30:49 +0100170)))
171
172$(eval $(call assert_numerics,\
173 $(sort \
Yann Gautier5f400632020-02-12 09:30:49 +0100174 PLAT_PARTITION_MAX_ENTRIES \
Nicolas Toromanoff5d3ade02020-12-22 13:54:51 +0100175 STM32_HASH_VER \
Lionel Debieve13a668d2022-10-05 16:47:03 +0200176 STM32_HEADER_VERSION_MAJOR \
Nicolas Le Bayon5c66fab2020-12-02 16:23:49 +0100177 STM32_RNG_VER \
Yann Gautier27f589d2021-10-15 17:59:38 +0200178 STM32_TF_A_COPIES \
Leonardo Sandoval65fca7c2020-09-10 12:18:27 -0500179)))
180
181$(eval $(call add_defines,\
Yann Gautier5f400632020-02-12 09:30:49 +0100182 $(sort \
Patrick Delaunay4c66e0a2022-03-15 11:20:56 +0100183 DWL_BUFFER_BASE \
Lionel Debieve13a668d2022-10-05 16:47:03 +0200184 PKA_USE_BRAINPOOL_P256T1 \
185 PKA_USE_NIST_P256 \
Yann Gautier27f589d2021-10-15 17:59:38 +0200186 PLAT_PARTITION_MAX_ENTRIES \
Lionel Debieve13a668d2022-10-05 16:47:03 +0200187 PLAT_TBBR_IMG_DEF \
Nicolas Toromanoff5d3ade02020-12-22 13:54:51 +0100188 STM32_HASH_VER \
Lionel Debieve13a668d2022-10-05 16:47:03 +0200189 STM32_HEADER_VERSION_MAJOR \
Nicolas Le Bayon5c66fab2020-12-02 16:23:49 +0100190 STM32_RNG_VER \
Yann Gautier27f589d2021-10-15 17:59:38 +0200191 STM32_TF_A_COPIES \
Lionel Debievefd02b802022-10-05 16:16:50 +0200192 STM32MP_CRYPTO_ROM_LIB \
Yann Gautier6d8c2442020-09-17 12:42:46 +0200193 STM32MP_DDR_32BIT_INTERFACE \
194 STM32MP_DDR_DUAL_AXI_PORT \
Lionel Debieve13a668d2022-10-05 16:47:03 +0200195 STM32MP_USE_EXTERNAL_HEAP \
Sebastien Pasdeloup94389ef2020-12-18 11:50:40 +0100196 STM32MP13 \
197 STM32MP15 \
Leonardo Sandoval65fca7c2020-09-10 12:18:27 -0500198)))
Nicolas Le Bayon3f42cad2019-09-03 09:52:05 +0200199
Yann Gautier5f400632020-02-12 09:30:49 +0100200# Include paths and source files
Yann Gautieree8f5422019-02-14 11:13:25 +0100201PLAT_INCLUDES += -Iplat/st/stm32mp1/include/
Yann Gautier4b0c72a2018-07-16 10:54:09 +0200202
Yann Gautierdbe63ac2022-03-16 19:03:20 +0100203PLAT_BL_COMMON_SOURCES += plat/st/stm32mp1/stm32mp1_private.c
Yann Gautier4b0c72a2018-07-16 10:54:09 +0200204
Julius Werner6b88b652018-11-27 17:50:28 -0800205PLAT_BL_COMMON_SOURCES += drivers/st/uart/aarch32/stm32_console.S
Yann Gautier4b0c72a2018-07-16 10:54:09 +0200206
207ifneq (${ENABLE_STACK_PROTECTOR},0)
208PLAT_BL_COMMON_SOURCES += plat/st/stm32mp1/stm32mp1_stack_protector.c
209endif
210
Yann Gautier4b0c72a2018-07-16 10:54:09 +0200211PLAT_BL_COMMON_SOURCES += lib/cpus/aarch32/cortex_a7.S
212
Yann Gautier2c1fa282019-05-09 11:56:30 +0200213PLAT_BL_COMMON_SOURCES += drivers/arm/tzc/tzc400.c \
Nicolas Le Bayon97287cd2019-05-20 18:35:02 +0200214 drivers/st/bsec/bsec2.c \
Yann Gautiercaf575b2018-07-24 17:18:19 +0200215 drivers/st/ddr/stm32mp1_ddr_helpers.c \
Yann Gautier113f31e2019-01-17 09:34:18 +0100216 drivers/st/i2c/stm32_i2c.c \
Yann Gautier091eab52019-06-04 18:06:34 +0200217 drivers/st/iwdg/stm32_iwdg.c \
Yann Gautiera45433b2019-01-16 18:31:00 +0100218 drivers/st/pmic/stm32mp_pmic.c \
219 drivers/st/pmic/stpmic1.c \
Yann Gautier9aea69e2018-07-24 17:13:36 +0200220 drivers/st/reset/stm32mp1_reset.c \
Yann Gautier091eab52019-06-04 18:06:34 +0200221 plat/st/stm32mp1/stm32mp1_dbgmcu.c \
Yann Gautiercaf575b2018-07-24 17:18:19 +0200222 plat/st/stm32mp1/stm32mp1_helper.S \
Yann Gautier3edc7c32019-05-20 19:17:08 +0200223 plat/st/stm32mp1/stm32mp1_syscfg.c
Yann Gautier4b0c72a2018-07-16 10:54:09 +0200224
Gabriel Fernandez1308d752020-03-11 11:30:34 +0100225ifeq ($(STM32MP13),1)
226PLAT_BL_COMMON_SOURCES += drivers/st/clk/clk-stm32-core.c \
Nicolas Le Bayon5c66fab2020-12-02 16:23:49 +0100227 drivers/st/clk/clk-stm32mp13.c \
228 drivers/st/crypto/stm32_rng.c
Gabriel Fernandez1308d752020-03-11 11:30:34 +0100229else
230PLAT_BL_COMMON_SOURCES += drivers/st/clk/stm32mp1_clk.c
231endif
232
Yann Gautierdbe63ac2022-03-16 19:03:20 +0100233BL2_SOURCES += plat/st/stm32mp1/plat_bl2_mem_params_desc.c \
Lionel Debieve1dc5e2e2020-09-27 21:13:53 +0200234 plat/st/stm32mp1/stm32mp1_fconf_firewall.c
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200235
Rohit Nerf9f72d92022-05-18 00:55:02 -0700236ifeq (${PSA_FWU_SUPPORT},1)
Sughosh Ganua1976842021-11-10 17:47:16 +0530237include drivers/fwu/fwu.mk
Rohit Nerf9f72d92022-05-18 00:55:02 -0700238endif
239
Yann Gautierdbe63ac2022-03-16 19:03:20 +0100240BL2_SOURCES += drivers/st/crypto/stm32_hash.c \
Yann Gautier4b0c72a2018-07-16 10:54:09 +0200241 plat/st/stm32mp1/bl2_plat_setup.c
242
Lionel Debieve13a668d2022-10-05 16:47:03 +0200243ifeq (${TRUSTED_BOARD_BOOT},1)
Lionel Debieve13a668d2022-10-05 16:47:03 +0200244ifeq ($(STM32MP13),1)
Yann Gautierdbe63ac2022-03-16 19:03:20 +0100245BL2_SOURCES += drivers/st/crypto/stm32_pka.c
246BL2_SOURCES += drivers/st/crypto/stm32_saes.c
Lionel Debieve13a668d2022-10-05 16:47:03 +0200247endif
Lionel Debieve13a668d2022-10-05 16:47:03 +0200248endif
249
Nicolas Le Bayon3f42cad2019-09-03 09:52:05 +0200250ifneq ($(filter 1,${STM32MP_EMMC} ${STM32MP_SDMMC}),)
Yann Gautierdbe63ac2022-03-16 19:03:20 +0100251BL2_SOURCES += drivers/st/mmc/stm32_sdmmc2.c
Nicolas Le Bayon3f42cad2019-09-03 09:52:05 +0200252endif
Yann Gautier8244e1d2018-10-15 09:36:58 +0200253
Lionel Debieve402a46b2019-11-04 12:28:15 +0100254ifeq (${STM32MP_RAW_NAND},1)
Yann Gautierdbe63ac2022-03-16 19:03:20 +0100255BL2_SOURCES += drivers/st/fmc/stm32_fmc2_nand.c
Lionel Debieve186b0462019-09-24 18:30:12 +0200256endif
257
Lionel Debievecb0dbc42019-09-25 09:11:31 +0200258ifneq ($(filter 1,${STM32MP_SPI_NAND} ${STM32MP_SPI_NOR}),)
Yann Gautierdbe63ac2022-03-16 19:03:20 +0100259BL2_SOURCES += drivers/st/spi/stm32_qspi.c
Lionel Debievecb0dbc42019-09-25 09:11:31 +0200260endif
261
262ifneq ($(filter 1,${STM32MP_RAW_NAND} ${STM32MP_SPI_NAND} ${STM32MP_SPI_NOR}),)
263BL2_SOURCES += plat/st/stm32mp1/stm32mp1_boot_device.c
Lionel Debieve402a46b2019-11-04 12:28:15 +0100264endif
265
Patrick Delaunaye50571b2021-10-28 13:48:52 +0200266ifeq (${STM32MP_UART_PROGRAMMER},1)
Yann Gautierdbe63ac2022-03-16 19:03:20 +0100267BL2_SOURCES += drivers/st/uart/stm32_uart.c
Patrick Delaunaye50571b2021-10-28 13:48:52 +0200268endif
269
Patrick Delaunay9c5ee782021-07-06 14:07:56 +0200270ifeq (${STM32MP_USB_PROGRAMMER},1)
271#The DFU stack uses only one end point, reduce the USB stack footprint
272$(eval $(call add_define_val,CONFIG_USBD_EP_NB,1U))
Patrick Delaunaye50571b2021-10-28 13:48:52 +0200273BL2_SOURCES += drivers/st/usb/stm32mp1_usb.c \
Patrick Delaunay9c5ee782021-07-06 14:07:56 +0200274 plat/st/stm32mp1/stm32mp1_usb_dfu.c
275endif
276
Yann Gautierdbe63ac2022-03-16 19:03:20 +0100277BL2_SOURCES += drivers/st/ddr/stm32mp1_ddr.c \
Yann Gautiercaf575b2018-07-24 17:18:19 +0200278 drivers/st/ddr/stm32mp1_ram.c
279
Yann Gautierdbe63ac2022-03-16 19:03:20 +0100280BL2_SOURCES += plat/st/stm32mp1/plat_image_load.c
Yann Gautier0ed7b2a2021-05-19 18:48:16 +0200281
282ifeq ($(AARCH32_SP),sp_min)
283# Create DTB file for BL32
284${BUILD_PLAT}/fdts/%-bl32.dts: fdts/%.dts fdts/${BL32_DTSI} | ${BUILD_PLAT} fdt_dirs
285 @echo '#include "$(patsubst fdts/%,%,$<)"' > $@
286 @echo '#include "${BL32_DTSI}"' >> $@
287
288${BUILD_PLAT}/fdts/%-bl32.dtb: ${BUILD_PLAT}/fdts/%-bl32.dts
289endif
290
Yann Gautierdbe63ac2022-03-16 19:03:20 +0100291include plat/st/common/common_rules.mk