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Dan Handley9df48042015-03-19 18:58:55 +00001/*
Soby Mathew7d5a2e72018-01-10 15:59:31 +00002 * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
Dan Handley9df48042015-03-19 18:58:55 +00003 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Dan Handley9df48042015-03-19 18:58:55 +00005 */
6
7#include <arch.h>
8#include <arch_helpers.h>
9#include <arm_def.h>
Dan Handley9df48042015-03-19 18:58:55 +000010#include <assert.h>
11#include <bl_common.h>
Dan Handley9df48042015-03-19 18:58:55 +000012#include <console.h>
Yatharth Kocharf9a0f162016-09-13 17:07:57 +010013#include <debug.h>
Dan Handley9df48042015-03-19 18:58:55 +000014#include <mmio.h>
15#include <plat_arm.h>
16#include <platform.h>
Jeenu Viswambharana5b5b8d2018-02-06 12:21:39 +000017#include <ras.h>
Daniel Boulbyb1b058d2018-09-18 11:52:49 +010018#include <utils.h>
19#include <arm_xlat_tables.h>
Dan Handley9df48042015-03-19 18:58:55 +000020
Dan Handley9df48042015-03-19 18:58:55 +000021/*
22 * Placeholder variables for copying the arguments that have been passed to
Juan Castillo7d199412015-12-14 09:35:25 +000023 * BL31 from BL2.
Dan Handley9df48042015-03-19 18:58:55 +000024 */
25static entry_point_info_t bl32_image_ep_info;
26static entry_point_info_t bl33_image_ep_info;
27
Soby Mathewaf14b462018-06-01 16:53:38 +010028/*
29 * Check that BL31_BASE is above ARM_TB_FW_CONFIG_LIMIT. The reserved page
30 * is required for SOC_FW_CONFIG/TOS_FW_CONFIG passed from BL2.
31 */
32CASSERT(BL31_BASE >= ARM_TB_FW_CONFIG_LIMIT, assert_bl31_base_overflows);
Dan Handley9df48042015-03-19 18:58:55 +000033
34/* Weak definitions may be overridden in specific ARM standard platform */
Soby Mathew7d5a2e72018-01-10 15:59:31 +000035#pragma weak bl31_early_platform_setup2
Dan Handley9df48042015-03-19 18:58:55 +000036#pragma weak bl31_platform_setup
37#pragma weak bl31_plat_arch_setup
38#pragma weak bl31_plat_get_next_image_ep_info
Dan Handley9df48042015-03-19 18:58:55 +000039
Daniel Boulbyb1b058d2018-09-18 11:52:49 +010040#define MAP_BL31_TOTAL MAP_REGION_FLAT( \
Daniel Boulby45a2c9e2018-07-06 16:54:44 +010041 BL31_BASE, \
42 BL31_END - BL31_BASE, \
43 MT_MEMORY | MT_RW | MT_SECURE)
Daniel Boulbyb1b058d2018-09-18 11:52:49 +010044#if RECLAIM_INIT_CODE
45IMPORT_SYM(unsigned long, __INIT_CODE_START__, BL_INIT_CODE_BASE);
46IMPORT_SYM(unsigned long, __INIT_CODE_END__, BL_INIT_CODE_END);
47
48#define MAP_BL_INIT_CODE MAP_REGION_FLAT( \
49 BL_INIT_CODE_BASE, \
50 BL_INIT_CODE_END \
51 - BL_INIT_CODE_BASE, \
52 MT_CODE | MT_SECURE)
53#endif
Dan Handley9df48042015-03-19 18:58:55 +000054
55/*******************************************************************************
56 * Return a pointer to the 'entry_point_info' structure of the next image for the
Juan Castillo7d199412015-12-14 09:35:25 +000057 * security state specified. BL33 corresponds to the non-secure image type
58 * while BL32 corresponds to the secure image type. A NULL pointer is returned
Dan Handley9df48042015-03-19 18:58:55 +000059 * if the image does not exist.
60 ******************************************************************************/
Sandrine Bailleuxb3b6e222018-07-11 12:44:22 +020061struct entry_point_info *bl31_plat_get_next_image_ep_info(uint32_t type)
Dan Handley9df48042015-03-19 18:58:55 +000062{
63 entry_point_info_t *next_image_info;
64
65 assert(sec_state_is_valid(type));
66 next_image_info = (type == NON_SECURE)
67 ? &bl33_image_ep_info : &bl32_image_ep_info;
68 /*
69 * None of the images on the ARM development platforms can have 0x0
70 * as the entrypoint
71 */
72 if (next_image_info->pc)
73 return next_image_info;
74 else
75 return NULL;
76}
77
78/*******************************************************************************
Juan Castillo7d199412015-12-14 09:35:25 +000079 * Perform any BL31 early platform setup common to ARM standard platforms.
Dan Handley9df48042015-03-19 18:58:55 +000080 * Here is an opportunity to copy parameters passed by the calling EL (S-EL1
81 * in BL2 & S-EL3 in BL1) before they are lost (potentially). This needs to be
82 * done before the MMU is initialized so that the memory layout can be used
83 * while creating page tables. BL2 has flushed this information to memory, so
84 * we are guaranteed to pick up good data.
85 ******************************************************************************/
Daniel Boulbyf45a4bb2018-09-18 13:26:03 +010086void __init arm_bl31_early_platform_setup(void *from_bl2, uintptr_t soc_fw_config,
Soby Mathew7d5a2e72018-01-10 15:59:31 +000087 uintptr_t hw_config, void *plat_params_from_bl2)
Dan Handley9df48042015-03-19 18:58:55 +000088{
89 /* Initialize the console to provide early debug support */
Antonio Nino Diaz23ede6a2018-06-19 09:29:36 +010090 arm_console_boot_init();
Dan Handley9df48042015-03-19 18:58:55 +000091
92#if RESET_TO_BL31
Juan Castillo7d199412015-12-14 09:35:25 +000093 /* There are no parameters from BL2 if BL31 is a reset vector */
Dan Handley9df48042015-03-19 18:58:55 +000094 assert(from_bl2 == NULL);
95 assert(plat_params_from_bl2 == NULL);
96
Antonio Nino Diazd9166ac2018-05-11 11:15:10 +010097# ifdef BL32_BASE
Juan Castillo7d199412015-12-14 09:35:25 +000098 /* Populate entry point information for BL32 */
Dan Handley9df48042015-03-19 18:58:55 +000099 SET_PARAM_HEAD(&bl32_image_ep_info,
100 PARAM_EP,
101 VERSION_1,
102 0);
103 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE);
104 bl32_image_ep_info.pc = BL32_BASE;
105 bl32_image_ep_info.spsr = arm_get_spsr_for_bl32_entry();
Antonio Nino Diazd9166ac2018-05-11 11:15:10 +0100106# endif /* BL32_BASE */
Dan Handley9df48042015-03-19 18:58:55 +0000107
Juan Castillo7d199412015-12-14 09:35:25 +0000108 /* Populate entry point information for BL33 */
Dan Handley9df48042015-03-19 18:58:55 +0000109 SET_PARAM_HEAD(&bl33_image_ep_info,
110 PARAM_EP,
111 VERSION_1,
112 0);
113 /*
Juan Castillo7d199412015-12-14 09:35:25 +0000114 * Tell BL31 where the non-trusted software image
Dan Handley9df48042015-03-19 18:58:55 +0000115 * is located and the entry state information
116 */
117 bl33_image_ep_info.pc = plat_get_ns_image_entrypoint();
Soby Mathew4876ae32016-05-09 17:20:10 +0100118
Dan Handley9df48042015-03-19 18:58:55 +0000119 bl33_image_ep_info.spsr = arm_get_spsr_for_bl33_entry();
120 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE);
121
Antonio Nino Diazd9166ac2018-05-11 11:15:10 +0100122# if ARM_LINUX_KERNEL_AS_BL33
123 /*
124 * According to the file ``Documentation/arm64/booting.txt`` of the
125 * Linux kernel tree, Linux expects the physical address of the device
126 * tree blob (DTB) in x0, while x1-x3 are reserved for future use and
127 * must be 0.
128 */
129 bl33_image_ep_info.args.arg0 = (u_register_t)ARM_PRELOADED_DTB_BASE;
130 bl33_image_ep_info.args.arg1 = 0U;
131 bl33_image_ep_info.args.arg2 = 0U;
132 bl33_image_ep_info.args.arg3 = 0U;
133# endif
134
Yatharth Kocharf9a0f162016-09-13 17:07:57 +0100135#else /* RESET_TO_BL31 */
136
Dan Handley9df48042015-03-19 18:58:55 +0000137 /*
138 * In debug builds, we pass a special value in 'plat_params_from_bl2'
Juan Castillo7d199412015-12-14 09:35:25 +0000139 * to verify platform parameters from BL2 to BL31.
Dan Handley9df48042015-03-19 18:58:55 +0000140 * In release builds, it's not used.
141 */
142 assert(((unsigned long long)plat_params_from_bl2) ==
143 ARM_BL31_PLAT_PARAM_VAL);
144
Yatharth Kocharf9a0f162016-09-13 17:07:57 +0100145 /*
146 * Check params passed from BL2 should not be NULL,
147 */
148 bl_params_t *params_from_bl2 = (bl_params_t *)from_bl2;
149 assert(params_from_bl2 != NULL);
150 assert(params_from_bl2->h.type == PARAM_BL_PARAMS);
151 assert(params_from_bl2->h.version >= VERSION_2);
152
153 bl_params_node_t *bl_params = params_from_bl2->head;
154
155 /*
156 * Copy BL33 and BL32 (if present), entry point information.
157 * They are stored in Secure RAM, in BL2's address space.
158 */
Antonio Nino Diaze0b757d2018-08-24 16:30:29 +0100159 while (bl_params != NULL) {
Yatharth Kocharf9a0f162016-09-13 17:07:57 +0100160 if (bl_params->image_id == BL32_IMAGE_ID)
161 bl32_image_ep_info = *bl_params->ep_info;
162
163 if (bl_params->image_id == BL33_IMAGE_ID)
164 bl33_image_ep_info = *bl_params->ep_info;
165
166 bl_params = bl_params->next_params_info;
167 }
168
Antonio Nino Diaze0b757d2018-08-24 16:30:29 +0100169 if (bl33_image_ep_info.pc == 0U)
Yatharth Kocharf9a0f162016-09-13 17:07:57 +0100170 panic();
Yatharth Kocharf9a0f162016-09-13 17:07:57 +0100171#endif /* RESET_TO_BL31 */
Dan Handley9df48042015-03-19 18:58:55 +0000172}
173
Soby Mathew7d5a2e72018-01-10 15:59:31 +0000174void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
175 u_register_t arg2, u_register_t arg3)
Dan Handley9df48042015-03-19 18:58:55 +0000176{
Soby Mathew7d5a2e72018-01-10 15:59:31 +0000177 arm_bl31_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3);
Dan Handley9df48042015-03-19 18:58:55 +0000178
179 /*
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000180 * Initialize Interconnect for this cluster during cold boot.
Dan Handley9df48042015-03-19 18:58:55 +0000181 * No need for locks as no other CPU is active.
182 */
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000183 plat_arm_interconnect_init();
Sandrine Bailleuxda797f62015-05-14 14:13:05 +0100184
Dan Handley9df48042015-03-19 18:58:55 +0000185 /*
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000186 * Enable Interconnect coherency for the primary CPU's cluster.
Sandrine Bailleuxda797f62015-05-14 14:13:05 +0100187 * Earlier bootloader stages might already do this (e.g. Trusted
188 * Firmware's BL1 does it) but we can't assume so. There is no harm in
189 * executing this code twice anyway.
Dan Handley9df48042015-03-19 18:58:55 +0000190 * Platform specific PSCI code will enable coherency for other
191 * clusters.
192 */
Vikram Kanigirifbb13012016-02-15 11:54:14 +0000193 plat_arm_interconnect_enter_coherency();
Dan Handley9df48042015-03-19 18:58:55 +0000194}
195
196/*******************************************************************************
Juan Castillo7d199412015-12-14 09:35:25 +0000197 * Perform any BL31 platform setup common to ARM standard platforms
Dan Handley9df48042015-03-19 18:58:55 +0000198 ******************************************************************************/
199void arm_bl31_platform_setup(void)
200{
Achin Gupta1fa7eb62015-11-03 14:18:34 +0000201 /* Initialize the GIC driver, cpu and distributor interfaces */
202 plat_arm_gic_driver_init();
Dan Handley9df48042015-03-19 18:58:55 +0000203 plat_arm_gic_init();
Dan Handley9df48042015-03-19 18:58:55 +0000204
205#if RESET_TO_BL31
206 /*
207 * Do initial security configuration to allow DRAM/device access
208 * (if earlier BL has not already done so).
209 */
210 plat_arm_security_setup();
211
Roberto Vargas550eb082018-01-05 16:00:05 +0000212#if defined(PLAT_ARM_MEM_PROT_ADDR)
213 arm_nor_psci_do_dyn_mem_protect();
214#endif /* PLAT_ARM_MEM_PROT_ADDR */
215
Dan Handley9df48042015-03-19 18:58:55 +0000216#endif /* RESET_TO_BL31 */
217
218 /* Enable and initialize the System level generic timer */
219 mmio_write_32(ARM_SYS_CNTCTL_BASE + CNTCR_OFF,
Antonio Nino Diaze0b757d2018-08-24 16:30:29 +0100220 CNTCR_FCREQ(0U) | CNTCR_EN);
Dan Handley9df48042015-03-19 18:58:55 +0000221
222 /* Allow access to the System counter timer module */
Soby Mathew61e8d0b2015-10-12 17:32:29 +0100223 arm_configure_sys_timer();
Dan Handley9df48042015-03-19 18:58:55 +0000224
225 /* Initialize power controller before setting up topology */
226 plat_arm_pwrc_setup();
Jeenu Viswambharana5b5b8d2018-02-06 12:21:39 +0000227
228#if RAS_EXTENSION
229 ras_init();
230#endif
Dan Handley9df48042015-03-19 18:58:55 +0000231}
232
Soby Mathew2fd66be2015-12-09 11:38:43 +0000233/*******************************************************************************
Juan Castillo7d199412015-12-14 09:35:25 +0000234 * Perform any BL31 platform runtime setup prior to BL31 exit common to ARM
Soby Mathew2fd66be2015-12-09 11:38:43 +0000235 * standard platforms
Antonio Nino Diaz23ede6a2018-06-19 09:29:36 +0100236 * Perform BL31 platform setup
Soby Mathew2fd66be2015-12-09 11:38:43 +0000237 ******************************************************************************/
238void arm_bl31_plat_runtime_setup(void)
239{
Antonio Nino Diaz23ede6a2018-06-19 09:29:36 +0100240#if MULTI_CONSOLE_API
241 console_switch_state(CONSOLE_FLAG_RUNTIME);
242#else
243 console_uninit();
244#endif
245
Soby Mathew2fd66be2015-12-09 11:38:43 +0000246 /* Initialize the runtime console */
Antonio Nino Diaz23ede6a2018-06-19 09:29:36 +0100247 arm_console_runtime_init();
Daniel Boulbyb1b058d2018-09-18 11:52:49 +0100248#if RECLAIM_INIT_CODE
249 arm_free_init_memory();
250#endif
Soby Mathew2fd66be2015-12-09 11:38:43 +0000251}
252
Daniel Boulbyb1b058d2018-09-18 11:52:49 +0100253#if RECLAIM_INIT_CODE
254/*
255 * Zero out and make RW memory used to store image boot time code so it can
256 * be reclaimed during runtime
257 */
258void arm_free_init_memory(void)
259{
260 int ret = xlat_change_mem_attributes(BL_INIT_CODE_BASE,
261 BL_INIT_CODE_END - BL_INIT_CODE_BASE,
262 MT_RW_DATA);
263
264 if (ret != 0) {
265 ERROR("Could not reclaim initialization code");
266 panic();
267 }
268}
269#endif
270
Daniel Boulbyf45a4bb2018-09-18 13:26:03 +0100271void __init bl31_platform_setup(void)
Dan Handley9df48042015-03-19 18:58:55 +0000272{
273 arm_bl31_platform_setup();
274}
275
Soby Mathew2fd66be2015-12-09 11:38:43 +0000276void bl31_plat_runtime_setup(void)
277{
278 arm_bl31_plat_runtime_setup();
279}
280
Dan Handley9df48042015-03-19 18:58:55 +0000281/*******************************************************************************
Sandrine Bailleux4a1267a2016-05-18 16:11:47 +0100282 * Perform the very early platform specific architectural setup shared between
283 * ARM standard platforms. This only does basic initialization. Later
284 * architectural setup (bl31_arch_setup()) does not do anything platform
285 * specific.
Dan Handley9df48042015-03-19 18:58:55 +0000286 ******************************************************************************/
Daniel Boulbyf45a4bb2018-09-18 13:26:03 +0100287void __init arm_bl31_plat_arch_setup(void)
Dan Handley9df48042015-03-19 18:58:55 +0000288{
Daniel Boulby45a2c9e2018-07-06 16:54:44 +0100289 const mmap_region_t bl_regions[] = {
290 MAP_BL31_TOTAL,
Daniel Boulbyb1b058d2018-09-18 11:52:49 +0100291#if RECLAIM_INIT_CODE
292 MAP_BL_INIT_CODE,
293#endif
Daniel Boulby4e97abd2018-07-16 14:09:15 +0100294 ARM_MAP_BL_RO,
Roberto Vargase3adc372018-05-23 09:27:06 +0100295#if USE_ROMLIB
296 ARM_MAP_ROMLIB_CODE,
297 ARM_MAP_ROMLIB_DATA,
298#endif
Dan Handley9df48042015-03-19 18:58:55 +0000299#if USE_COHERENT_MEM
Daniel Boulby45a2c9e2018-07-06 16:54:44 +0100300 ARM_MAP_BL_COHERENT_RAM,
Dan Handley9df48042015-03-19 18:58:55 +0000301#endif
Daniel Boulby45a2c9e2018-07-06 16:54:44 +0100302 {0}
303 };
304
305 arm_setup_page_tables(bl_regions, plat_arm_get_mmap());
306
Sandrine Bailleux4a1267a2016-05-18 16:11:47 +0100307 enable_mmu_el3(0);
Roberto Vargase3adc372018-05-23 09:27:06 +0100308
309 arm_setup_romlib();
Dan Handley9df48042015-03-19 18:58:55 +0000310}
311
Daniel Boulbyf45a4bb2018-09-18 13:26:03 +0100312void __init bl31_plat_arch_setup(void)
Dan Handley9df48042015-03-19 18:58:55 +0000313{
314 arm_bl31_plat_arch_setup();
315}