Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 1 | /* |
Ronak Jain | 325bad1 | 2021-12-21 01:39:59 -0800 | [diff] [blame] | 2 | * Copyright (c) 2013-2022, ARM Limited and Contributors. All rights reserved. |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 3 | * |
dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | /* |
| 8 | * Top-level SMC handler for ZynqMP power management calls and |
| 9 | * IPI setup functions for communication with PMU. |
| 10 | */ |
| 11 | |
| 12 | #include <errno.h> |
Antonio Nino Diaz | e0f9063 | 2018-12-14 00:18:21 +0000 | [diff] [blame] | 13 | |
| 14 | #include <common/runtime_svc.h> |
| 15 | #if ZYNQMP_WDT_RESTART |
| 16 | #include <arch_helpers.h> |
| 17 | #include <drivers/arm/gicv2.h> |
| 18 | #include <lib/mmio.h> |
| 19 | #include <lib/spinlock.h> |
| 20 | #include <plat/common/platform.h> |
| 21 | #endif |
| 22 | |
Jolly Shah | 0bfd700 | 2019-01-08 11:10:47 -0800 | [diff] [blame] | 23 | #include <plat_private.h> |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 24 | #include "pm_api_sys.h" |
| 25 | #include "pm_client.h" |
Ronak Jain | 325bad1 | 2021-12-21 01:39:59 -0800 | [diff] [blame] | 26 | #include "pm_defs.h" |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 27 | #include "pm_ipi.h" |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 28 | |
Rajan Vaja | 720fd9d | 2018-10-05 04:42:57 -0700 | [diff] [blame] | 29 | /* pm_up = !0 - UP, pm_up = 0 - DOWN */ |
| 30 | static int32_t pm_up, ipi_irq_flag; |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 31 | |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 32 | #if ZYNQMP_WDT_RESTART |
| 33 | static spinlock_t inc_lock; |
| 34 | static int active_cores = 0; |
| 35 | #endif |
| 36 | |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 37 | /** |
| 38 | * pm_context - Structure which contains data for power management |
| 39 | * @api_version version of PM API, must match with one on PMU side |
| 40 | * @payload payload array used to store received |
| 41 | * data from ipi buffer registers |
| 42 | */ |
| 43 | static struct { |
| 44 | uint32_t api_version; |
| 45 | uint32_t payload[PAYLOAD_ARG_CNT]; |
| 46 | } pm_ctx; |
| 47 | |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 48 | #if ZYNQMP_WDT_RESTART |
| 49 | /** |
| 50 | * trigger_wdt_restart() - Trigger warm restart event to APU cores |
| 51 | * |
| 52 | * This function triggers SGI for all active APU CPUs. SGI handler then |
| 53 | * power down CPU and call system reset. |
| 54 | */ |
| 55 | static void trigger_wdt_restart(void) |
| 56 | { |
| 57 | uint32_t core_count = 0; |
| 58 | uint32_t core_status[3]; |
| 59 | uint32_t target_cpu_list = 0; |
| 60 | int i; |
| 61 | |
| 62 | for (i = 0; i < 4; i++) { |
| 63 | pm_get_node_status(NODE_APU_0 + i, core_status); |
| 64 | if (core_status[0] == 1) { |
| 65 | core_count++; |
| 66 | target_cpu_list |= (1 << i); |
| 67 | } |
| 68 | } |
| 69 | |
| 70 | spin_lock(&inc_lock); |
| 71 | active_cores = core_count; |
| 72 | spin_unlock(&inc_lock); |
| 73 | |
| 74 | INFO("Active Cores: %d\n", active_cores); |
| 75 | |
Siva Durga Prasad Paladugu | 60bfbc9 | 2018-09-24 22:51:49 -0700 | [diff] [blame] | 76 | for (i = PLATFORM_CORE_COUNT - 1; i >= 0; i--) { |
| 77 | if (target_cpu_list & (1 << i)) { |
| 78 | /* trigger SGI to active cores */ |
| 79 | plat_ic_raise_el3_sgi(ARM_IRQ_SEC_SGI_7, i); |
| 80 | } |
| 81 | } |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 82 | } |
| 83 | |
| 84 | /** |
| 85 | * ttc_fiq_handler() - TTC Handler for timer event |
| 86 | * @id number of the highest priority pending interrupt of the type |
| 87 | * that this handler was registered for |
| 88 | * @flags security state, bit[0] |
| 89 | * @handler pointer to 'cpu_context' structure of the current CPU for the |
| 90 | * security state specified in the 'flags' parameter |
| 91 | * @cookie unused |
| 92 | * |
| 93 | * Function registered as INTR_TYPE_EL3 interrupt handler |
| 94 | * |
| 95 | * When WDT event is received in PMU, PMU needs to notify master to do cleanup |
| 96 | * if required. PMU sets up timer and starts timer to overflow in zero time upon |
| 97 | * WDT event. ATF handles this timer event and takes necessary action required |
| 98 | * for warm restart. |
| 99 | * |
| 100 | * In presence of non-secure software layers (EL1/2) sets the interrupt |
| 101 | * at registered entrance in GIC and informs that PMU responsed or demands |
| 102 | * action. |
| 103 | */ |
| 104 | static uint64_t ttc_fiq_handler(uint32_t id, uint32_t flags, void *handle, |
Michal Simek | 08341b7 | 2022-03-09 08:53:20 +0100 | [diff] [blame] | 105 | void *cookie) |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 106 | { |
| 107 | INFO("BL31: Got TTC FIQ\n"); |
| 108 | |
Siva Durga Prasad Paladugu | 60bfbc9 | 2018-09-24 22:51:49 -0700 | [diff] [blame] | 109 | plat_ic_end_of_interrupt(id); |
| 110 | |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 111 | /* Clear TTC interrupt by reading interrupt register */ |
| 112 | mmio_read_32(TTC3_INTR_REGISTER_1); |
| 113 | |
| 114 | /* Disable the timer interrupts */ |
| 115 | mmio_write_32(TTC3_INTR_ENABLE_1, 0); |
| 116 | |
| 117 | trigger_wdt_restart(); |
| 118 | |
| 119 | return 0; |
| 120 | } |
| 121 | |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 122 | /** |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 123 | * zynqmp_sgi7_irq() - Handler for SGI7 IRQ |
| 124 | * @id number of the highest priority pending interrupt of the type |
| 125 | * that this handler was registered for |
| 126 | * @flags security state, bit[0] |
| 127 | * @handler pointer to 'cpu_context' structure of the current CPU for the |
| 128 | * security state specified in the 'flags' parameter |
| 129 | * @cookie unused |
| 130 | * |
| 131 | * Function registered as INTR_TYPE_EL3 interrupt handler |
| 132 | * |
| 133 | * On receiving WDT event from PMU, ATF generates SGI7 to all running CPUs. |
| 134 | * In response to SGI7 interrupt, each CPUs do clean up if required and last |
| 135 | * running CPU calls system restart. |
| 136 | */ |
| 137 | static uint64_t __unused __dead2 zynqmp_sgi7_irq(uint32_t id, uint32_t flags, |
Michal Simek | 08341b7 | 2022-03-09 08:53:20 +0100 | [diff] [blame] | 138 | void *handle, void *cookie) |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 139 | { |
| 140 | int i; |
Will Wong | cc12795 | 2020-11-22 23:45:21 -0800 | [diff] [blame] | 141 | uint32_t value; |
| 142 | |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 143 | /* enter wfi and stay there */ |
| 144 | INFO("Entering wfi\n"); |
| 145 | |
| 146 | spin_lock(&inc_lock); |
| 147 | active_cores--; |
| 148 | |
| 149 | for (i = 0; i < 4; i++) { |
| 150 | mmio_write_32(BASE_GICD_BASE + GICD_CPENDSGIR + 4 * i, |
| 151 | 0xffffffff); |
| 152 | } |
| 153 | |
Tanmay Shah | 50702ba | 2022-09-13 11:10:08 -0700 | [diff] [blame] | 154 | dsb(); |
| 155 | |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 156 | spin_unlock(&inc_lock); |
| 157 | |
| 158 | if (active_cores == 0) { |
Will Wong | cc12795 | 2020-11-22 23:45:21 -0800 | [diff] [blame] | 159 | pm_mmio_read(PMU_GLOBAL_GEN_STORAGE4, &value); |
| 160 | value = (value & RESTART_SCOPE_MASK) >> RESTART_SCOPE_SHIFT; |
| 161 | pm_system_shutdown(PMF_SHUTDOWN_TYPE_RESET, value); |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 162 | } |
| 163 | |
| 164 | /* enter wfi and stay there */ |
| 165 | while (1) |
| 166 | wfi(); |
| 167 | } |
| 168 | |
| 169 | /** |
| 170 | * pm_wdt_restart_setup() - Setup warm restart interrupts |
| 171 | * |
| 172 | * This function sets up handler for SGI7 and TTC interrupts |
| 173 | * used for warm restart. |
| 174 | */ |
| 175 | static int pm_wdt_restart_setup(void) |
| 176 | { |
| 177 | int ret; |
| 178 | |
| 179 | /* register IRQ handler for SGI7 */ |
| 180 | ret = request_intr_type_el3(ARM_IRQ_SEC_SGI_7, zynqmp_sgi7_irq); |
| 181 | if (ret) { |
| 182 | WARN("BL31: registering SGI7 interrupt failed\n"); |
| 183 | goto err; |
| 184 | } |
| 185 | |
| 186 | ret = request_intr_type_el3(IRQ_TTC3_1, ttc_fiq_handler); |
| 187 | if (ret) |
| 188 | WARN("BL31: registering TTC3 interrupt failed\n"); |
| 189 | |
| 190 | err: |
| 191 | return ret; |
| 192 | } |
| 193 | #endif |
| 194 | |
| 195 | /** |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 196 | * pm_setup() - PM service setup |
| 197 | * |
| 198 | * @return On success, the initialization function must return 0. |
| 199 | * Any other return value will cause the framework to ignore |
| 200 | * the service |
| 201 | * |
| 202 | * Initialization functions for ZynqMP power management for |
| 203 | * communicaton with PMU. |
| 204 | * |
| 205 | * Called from sip_svc_setup initialization function with the |
| 206 | * rt_svc_init signature. |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 207 | */ |
Venkatesh Yadav Abbarapu | e7c4538 | 2022-05-19 14:49:49 +0530 | [diff] [blame] | 208 | int32_t pm_setup(void) |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 209 | { |
Naman Patel | 0feb5ea | 2022-11-22 05:01:37 -0800 | [diff] [blame] | 210 | enum pm_ret_status err; |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 211 | |
HariBabu Gattem | aa81171 | 2022-10-07 00:07:49 -0700 | [diff] [blame] | 212 | pm_ipi_init(primary_proc); |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 213 | |
Naman Patel | 0feb5ea | 2022-11-22 05:01:37 -0800 | [diff] [blame] | 214 | err = pm_get_api_version(&pm_ctx.api_version); |
| 215 | if (err != PM_RET_SUCCESS) { |
| 216 | ERROR("BL31: Failed to read Platform Management API version. " |
| 217 | "Return: %d\n", err); |
| 218 | return -EINVAL; |
| 219 | } |
Rajan Vaja | 720fd9d | 2018-10-05 04:42:57 -0700 | [diff] [blame] | 220 | if (pm_ctx.api_version < PM_VERSION) { |
| 221 | ERROR("BL31: Platform Management API version error. Expected: " |
| 222 | "v%d.%d - Found: v%d.%d\n", PM_VERSION_MAJOR, |
| 223 | PM_VERSION_MINOR, pm_ctx.api_version >> 16, |
Venkatesh Yadav Abbarapu | a2ca35d | 2022-07-04 11:40:27 +0530 | [diff] [blame] | 224 | pm_ctx.api_version & 0xFFFFU); |
Rajan Vaja | 720fd9d | 2018-10-05 04:42:57 -0700 | [diff] [blame] | 225 | return -EINVAL; |
| 226 | } |
| 227 | |
HariBabu Gattem | aa81171 | 2022-10-07 00:07:49 -0700 | [diff] [blame] | 228 | int32_t status = 0, ret = 0; |
Siva Durga Prasad Paladugu | efd431b | 2018-04-30 20:12:12 +0530 | [diff] [blame] | 229 | #if ZYNQMP_WDT_RESTART |
| 230 | status = pm_wdt_restart_setup(); |
| 231 | if (status) |
| 232 | WARN("BL31: warm-restart setup failed\n"); |
| 233 | #endif |
| 234 | |
Wendy Liang | 328105c | 2017-10-03 23:21:11 -0700 | [diff] [blame] | 235 | if (status >= 0) { |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 236 | INFO("BL31: PM Service Init Complete: API v%d.%d\n", |
| 237 | PM_VERSION_MAJOR, PM_VERSION_MINOR); |
Wendy Liang | 328105c | 2017-10-03 23:21:11 -0700 | [diff] [blame] | 238 | ret = 0; |
| 239 | } else { |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 240 | INFO("BL31: PM Service Init Failed, Error Code %d!\n", status); |
Wendy Liang | 328105c | 2017-10-03 23:21:11 -0700 | [diff] [blame] | 241 | ret = status; |
| 242 | } |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 243 | |
Siva Durga Prasad Paladugu | 79f7595 | 2018-04-30 19:39:49 +0530 | [diff] [blame] | 244 | pm_up = !status; |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 245 | |
Wendy Liang | 328105c | 2017-10-03 23:21:11 -0700 | [diff] [blame] | 246 | return ret; |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 247 | } |
| 248 | |
| 249 | /** |
| 250 | * pm_smc_handler() - SMC handler for PM-API calls coming from EL1/EL2. |
| 251 | * @smc_fid - Function Identifier |
| 252 | * @x1 - x4 - Arguments |
| 253 | * @cookie - Unused |
| 254 | * @handler - Pointer to caller's context structure |
| 255 | * |
| 256 | * @return - Unused |
| 257 | * |
| 258 | * Determines that smc_fid is valid and supported PM SMC Function ID from the |
| 259 | * list of pm_api_ids, otherwise completes the request with |
| 260 | * the unknown SMC Function ID |
| 261 | * |
| 262 | * The SMC calls for PM service are forwarded from SIP Service SMC handler |
| 263 | * function with rt_svc_handle signature |
| 264 | */ |
| 265 | uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3, |
Venkatesh Yadav Abbarapu | 0386e65 | 2022-05-24 14:05:57 +0530 | [diff] [blame] | 266 | uint64_t x4, const void *cookie, void *handle, uint64_t flags) |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 267 | { |
| 268 | enum pm_ret_status ret; |
Ronak Jain | 52de594 | 2022-01-20 23:11:18 -0800 | [diff] [blame] | 269 | uint32_t payload[PAYLOAD_ARG_CNT]; |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 270 | |
Ronak Jain | f841467 | 2022-05-11 02:48:52 -0700 | [diff] [blame] | 271 | uint32_t pm_arg[5]; |
HariBabu Gattem | aa81171 | 2022-10-07 00:07:49 -0700 | [diff] [blame] | 272 | uint32_t result[PAYLOAD_ARG_CNT] = {0}; |
Ronak Jain | 52de594 | 2022-01-20 23:11:18 -0800 | [diff] [blame] | 273 | uint32_t api_id; |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 274 | |
| 275 | /* Handle case where PM wasn't initialized properly */ |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 276 | if (pm_up == 0) |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 277 | SMC_RET1(handle, SMC_UNK); |
| 278 | |
| 279 | pm_arg[0] = (uint32_t)x1; |
| 280 | pm_arg[1] = (uint32_t)(x1 >> 32); |
| 281 | pm_arg[2] = (uint32_t)x2; |
| 282 | pm_arg[3] = (uint32_t)(x2 >> 32); |
Ronak Jain | 52de594 | 2022-01-20 23:11:18 -0800 | [diff] [blame] | 283 | pm_arg[4] = (uint32_t)x3; |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 284 | |
Ronak Jain | 52de594 | 2022-01-20 23:11:18 -0800 | [diff] [blame] | 285 | api_id = smc_fid & FUNCID_NUM_MASK; |
| 286 | |
| 287 | switch (api_id) { |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 288 | /* PM API Functions */ |
| 289 | case PM_SELF_SUSPEND: |
| 290 | ret = pm_self_suspend(pm_arg[0], pm_arg[1], pm_arg[2], |
| 291 | pm_arg[3]); |
| 292 | SMC_RET1(handle, (uint64_t)ret); |
| 293 | |
| 294 | case PM_REQ_SUSPEND: |
| 295 | ret = pm_req_suspend(pm_arg[0], pm_arg[1], pm_arg[2], |
| 296 | pm_arg[3]); |
| 297 | SMC_RET1(handle, (uint64_t)ret); |
| 298 | |
| 299 | case PM_REQ_WAKEUP: |
Filip Drazic | 78ba145 | 2017-02-07 12:03:57 +0100 | [diff] [blame] | 300 | { |
| 301 | /* Use address flag is encoded in the 1st bit of the low-word */ |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 302 | uint32_t set_addr = pm_arg[1] & 0x1U; |
| 303 | uint64_t address = (uint64_t)pm_arg[2] << 32U; |
Filip Drazic | 78ba145 | 2017-02-07 12:03:57 +0100 | [diff] [blame] | 304 | |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 305 | address |= pm_arg[1] & (~0x1U); |
Filip Drazic | 78ba145 | 2017-02-07 12:03:57 +0100 | [diff] [blame] | 306 | ret = pm_req_wakeup(pm_arg[0], set_addr, address, |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 307 | pm_arg[3]); |
| 308 | SMC_RET1(handle, (uint64_t)ret); |
Filip Drazic | 78ba145 | 2017-02-07 12:03:57 +0100 | [diff] [blame] | 309 | } |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 310 | |
| 311 | case PM_FORCE_POWERDOWN: |
| 312 | ret = pm_force_powerdown(pm_arg[0], pm_arg[1]); |
| 313 | SMC_RET1(handle, (uint64_t)ret); |
| 314 | |
| 315 | case PM_ABORT_SUSPEND: |
| 316 | ret = pm_abort_suspend(pm_arg[0]); |
| 317 | SMC_RET1(handle, (uint64_t)ret); |
| 318 | |
| 319 | case PM_SET_WAKEUP_SOURCE: |
| 320 | ret = pm_set_wakeup_source(pm_arg[0], pm_arg[1], pm_arg[2]); |
| 321 | SMC_RET1(handle, (uint64_t)ret); |
| 322 | |
| 323 | case PM_SYSTEM_SHUTDOWN: |
Soren Brinkmann | 58fbb9b | 2016-09-02 09:50:54 -0700 | [diff] [blame] | 324 | ret = pm_system_shutdown(pm_arg[0], pm_arg[1]); |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 325 | SMC_RET1(handle, (uint64_t)ret); |
| 326 | |
| 327 | case PM_REQ_NODE: |
| 328 | ret = pm_req_node(pm_arg[0], pm_arg[1], pm_arg[2], pm_arg[3]); |
| 329 | SMC_RET1(handle, (uint64_t)ret); |
| 330 | |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 331 | case PM_SET_REQUIREMENT: |
| 332 | ret = pm_set_requirement(pm_arg[0], pm_arg[1], pm_arg[2], |
| 333 | pm_arg[3]); |
| 334 | SMC_RET1(handle, (uint64_t)ret); |
| 335 | |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 336 | case PM_GET_API_VERSION: |
Boyan Karatotev | b3d2b4f | 2022-11-22 12:13:44 +0000 | [diff] [blame] | 337 | if (ipi_irq_flag == 0U) { |
| 338 | /* |
| 339 | * Enable IPI IRQ |
| 340 | * assume the rich OS is OK to handle callback IRQs now. |
| 341 | * Even if we were wrong, it would not enable the IRQ in |
| 342 | * the GIC. |
| 343 | */ |
| 344 | pm_ipi_irq_enable(primary_proc); |
| 345 | ipi_irq_flag = 1U; |
Soren Brinkmann | a1b0a90 | 2016-09-30 11:30:21 -0700 | [diff] [blame] | 346 | } |
Boyan Karatotev | b3d2b4f | 2022-11-22 12:13:44 +0000 | [diff] [blame] | 347 | SMC_RET1(handle, (uint64_t)PM_RET_SUCCESS | |
| 348 | ((uint64_t)pm_ctx.api_version << 32)); |
Nava kishore Manne | 68d460c | 2016-08-20 23:18:09 +0530 | [diff] [blame] | 349 | case PM_FPGA_LOAD: |
| 350 | ret = pm_fpga_load(pm_arg[0], pm_arg[1], pm_arg[2], pm_arg[3]); |
| 351 | SMC_RET1(handle, (uint64_t)ret); |
| 352 | |
| 353 | case PM_FPGA_GET_STATUS: |
| 354 | { |
Naman Patel | 6c48034 | 2022-12-01 02:58:46 -0800 | [diff] [blame] | 355 | uint32_t value = 0U; |
Nava kishore Manne | 68d460c | 2016-08-20 23:18:09 +0530 | [diff] [blame] | 356 | |
| 357 | ret = pm_fpga_get_status(&value); |
| 358 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32); |
| 359 | } |
| 360 | |
Siva Durga Prasad Paladugu | de93d98 | 2018-04-30 15:49:27 +0530 | [diff] [blame] | 361 | case PM_SECURE_RSA_AES: |
| 362 | ret = pm_secure_rsaaes(pm_arg[0], pm_arg[1], pm_arg[2], |
| 363 | pm_arg[3]); |
| 364 | SMC_RET1(handle, (uint64_t)ret); |
| 365 | |
Rajan Vaja | 02d1842 | 2019-03-04 11:09:39 +0530 | [diff] [blame] | 366 | case PM_GET_CALLBACK_DATA: |
Tejas Patel | f4c3a25 | 2020-01-29 22:06:12 -0800 | [diff] [blame] | 367 | pm_get_callbackdata(result, ARRAY_SIZE(result)); |
Rajan Vaja | 02d1842 | 2019-03-04 11:09:39 +0530 | [diff] [blame] | 368 | SMC_RET2(handle, |
| 369 | (uint64_t)result[0] | ((uint64_t)result[1] << 32), |
| 370 | (uint64_t)result[2] | ((uint64_t)result[3] << 32)); |
Rajan Vaja | 5529a01 | 2018-01-17 02:39:23 -0800 | [diff] [blame] | 371 | case PM_IOCTL: |
| 372 | { |
Naman Patel | 6c48034 | 2022-12-01 02:58:46 -0800 | [diff] [blame] | 373 | uint32_t value = 0U; |
Rajan Vaja | 5529a01 | 2018-01-17 02:39:23 -0800 | [diff] [blame] | 374 | |
| 375 | ret = pm_ioctl(pm_arg[0], pm_arg[1], pm_arg[2], |
| 376 | pm_arg[3], &value); |
| 377 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32); |
| 378 | } |
| 379 | |
Rajan Vaja | 3511613 | 2018-01-17 02:39:25 -0800 | [diff] [blame] | 380 | case PM_QUERY_DATA: |
| 381 | { |
Jolly Shah | 69fb5bf | 2018-02-07 16:25:41 -0800 | [diff] [blame] | 382 | uint32_t data[4] = { 0 }; |
Rajan Vaja | 3511613 | 2018-01-17 02:39:25 -0800 | [diff] [blame] | 383 | |
Rajan Vaja | cd82568 | 2020-11-23 21:33:39 -0800 | [diff] [blame] | 384 | pm_query_data(pm_arg[0], pm_arg[1], pm_arg[2], |
| 385 | pm_arg[3], data); |
Rajan Vaja | 3511613 | 2018-01-17 02:39:25 -0800 | [diff] [blame] | 386 | SMC_RET2(handle, (uint64_t)data[0] | ((uint64_t)data[1] << 32), |
| 387 | (uint64_t)data[2] | ((uint64_t)data[3] << 32)); |
| 388 | } |
| 389 | |
| 390 | case PM_CLOCK_ENABLE: |
| 391 | ret = pm_clock_enable(pm_arg[0]); |
| 392 | SMC_RET1(handle, (uint64_t)ret); |
| 393 | |
| 394 | case PM_CLOCK_DISABLE: |
| 395 | ret = pm_clock_disable(pm_arg[0]); |
| 396 | SMC_RET1(handle, (uint64_t)ret); |
| 397 | |
| 398 | case PM_CLOCK_GETSTATE: |
| 399 | { |
Naman Patel | 6c48034 | 2022-12-01 02:58:46 -0800 | [diff] [blame] | 400 | uint32_t value = 0U; |
Rajan Vaja | 3511613 | 2018-01-17 02:39:25 -0800 | [diff] [blame] | 401 | |
| 402 | ret = pm_clock_getstate(pm_arg[0], &value); |
| 403 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32); |
| 404 | } |
| 405 | |
| 406 | case PM_CLOCK_SETDIVIDER: |
| 407 | ret = pm_clock_setdivider(pm_arg[0], pm_arg[1]); |
| 408 | SMC_RET1(handle, (uint64_t)ret); |
| 409 | |
| 410 | case PM_CLOCK_GETDIVIDER: |
| 411 | { |
Naman Patel | 6c48034 | 2022-12-01 02:58:46 -0800 | [diff] [blame] | 412 | uint32_t value = 0U; |
Rajan Vaja | 3511613 | 2018-01-17 02:39:25 -0800 | [diff] [blame] | 413 | |
| 414 | ret = pm_clock_getdivider(pm_arg[0], &value); |
| 415 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32); |
| 416 | } |
| 417 | |
| 418 | case PM_CLOCK_SETRATE: |
| 419 | ret = pm_clock_setrate(pm_arg[0], |
| 420 | ((uint64_t)pm_arg[2]) << 32 | pm_arg[1]); |
| 421 | |
| 422 | SMC_RET1(handle, (uint64_t)ret); |
| 423 | |
| 424 | case PM_CLOCK_GETRATE: |
| 425 | { |
Ronak Jain | f841467 | 2022-05-11 02:48:52 -0700 | [diff] [blame] | 426 | uint64_t value = 0; |
Rajan Vaja | 3511613 | 2018-01-17 02:39:25 -0800 | [diff] [blame] | 427 | |
| 428 | ret = pm_clock_getrate(pm_arg[0], &value); |
Jolly Shah | 69fb5bf | 2018-02-07 16:25:41 -0800 | [diff] [blame] | 429 | SMC_RET2(handle, (uint64_t)ret | |
| 430 | (((uint64_t)value & 0xFFFFFFFFU) << 32U), |
| 431 | (value >> 32U) & 0xFFFFFFFFU); |
Rajan Vaja | 3511613 | 2018-01-17 02:39:25 -0800 | [diff] [blame] | 432 | |
| 433 | } |
| 434 | |
| 435 | case PM_CLOCK_SETPARENT: |
| 436 | ret = pm_clock_setparent(pm_arg[0], pm_arg[1]); |
| 437 | SMC_RET1(handle, (uint64_t)ret); |
| 438 | |
| 439 | case PM_CLOCK_GETPARENT: |
| 440 | { |
Naman Patel | 6c48034 | 2022-12-01 02:58:46 -0800 | [diff] [blame] | 441 | uint32_t value = 0U; |
Rajan Vaja | 3511613 | 2018-01-17 02:39:25 -0800 | [diff] [blame] | 442 | |
| 443 | ret = pm_clock_getparent(pm_arg[0], &value); |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 444 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32U); |
Rajan Vaja | 3511613 | 2018-01-17 02:39:25 -0800 | [diff] [blame] | 445 | } |
| 446 | |
Rajan Vaja | c7ee23d | 2018-02-14 23:10:54 -0800 | [diff] [blame] | 447 | case PM_GET_TRUSTZONE_VERSION: |
| 448 | SMC_RET1(handle, (uint64_t)PM_RET_SUCCESS | |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 449 | ((uint64_t)ZYNQMP_TZ_VERSION << 32U)); |
Rajan Vaja | c7ee23d | 2018-02-14 23:10:54 -0800 | [diff] [blame] | 450 | |
Siva Durga Prasad Paladugu | 43b23a3 | 2018-04-27 16:26:47 +0530 | [diff] [blame] | 451 | case PM_SET_SUSPEND_MODE: |
| 452 | ret = pm_set_suspend_mode(pm_arg[0]); |
| 453 | SMC_RET1(handle, (uint64_t)ret); |
| 454 | |
Siva Durga Prasad Paladugu | f3994cc | 2018-05-01 11:12:55 +0530 | [diff] [blame] | 455 | case PM_SECURE_SHA: |
| 456 | ret = pm_sha_hash(pm_arg[0], pm_arg[1], pm_arg[2], |
| 457 | pm_arg[3]); |
| 458 | SMC_RET1(handle, (uint64_t)ret); |
| 459 | |
| 460 | case PM_SECURE_RSA: |
| 461 | ret = pm_rsa_core(pm_arg[0], pm_arg[1], pm_arg[2], |
| 462 | pm_arg[3]); |
| 463 | SMC_RET1(handle, (uint64_t)ret); |
| 464 | |
Siva Durga Prasad Paladugu | a4ed4b2 | 2018-04-30 20:06:58 +0530 | [diff] [blame] | 465 | case PM_SECURE_IMAGE: |
| 466 | { |
Siva Durga Prasad Paladugu | a4ed4b2 | 2018-04-30 20:06:58 +0530 | [diff] [blame] | 467 | ret = pm_secure_image(pm_arg[0], pm_arg[1], pm_arg[2], |
| 468 | pm_arg[3], &result[0]); |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 469 | SMC_RET2(handle, (uint64_t)ret | ((uint64_t)result[0] << 32U), |
Siva Durga Prasad Paladugu | a4ed4b2 | 2018-04-30 20:06:58 +0530 | [diff] [blame] | 470 | result[1]); |
| 471 | } |
| 472 | |
Siva Durga Prasad Paladugu | 7c6516a | 2018-09-04 17:41:34 +0530 | [diff] [blame] | 473 | case PM_FPGA_READ: |
| 474 | { |
Naman Patel | 6c48034 | 2022-12-01 02:58:46 -0800 | [diff] [blame] | 475 | uint32_t value = 0U; |
Siva Durga Prasad Paladugu | 7c6516a | 2018-09-04 17:41:34 +0530 | [diff] [blame] | 476 | |
| 477 | ret = pm_fpga_read(pm_arg[0], pm_arg[1], pm_arg[2], pm_arg[3], |
| 478 | &value); |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 479 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32U); |
Siva Durga Prasad Paladugu | 7c6516a | 2018-09-04 17:41:34 +0530 | [diff] [blame] | 480 | } |
| 481 | |
Siva Durga Prasad Paladugu | 8bd905b | 2018-09-04 18:05:50 +0530 | [diff] [blame] | 482 | case PM_SECURE_AES: |
| 483 | { |
Naman Patel | 6c48034 | 2022-12-01 02:58:46 -0800 | [diff] [blame] | 484 | uint32_t value = 0U; |
Siva Durga Prasad Paladugu | 8bd905b | 2018-09-04 18:05:50 +0530 | [diff] [blame] | 485 | |
| 486 | ret = pm_aes_engine(pm_arg[0], pm_arg[1], &value); |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 487 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32U); |
Siva Durga Prasad Paladugu | 8bd905b | 2018-09-04 18:05:50 +0530 | [diff] [blame] | 488 | } |
| 489 | |
Jolly Shah | a7cc5ee | 2019-01-02 12:27:00 -0800 | [diff] [blame] | 490 | case PM_PLL_SET_PARAMETER: |
| 491 | ret = pm_pll_set_parameter(pm_arg[0], pm_arg[1], pm_arg[2]); |
| 492 | SMC_RET1(handle, (uint64_t)ret); |
| 493 | |
Jolly Shah | cb2f45d | 2019-01-04 11:28:38 -0800 | [diff] [blame] | 494 | case PM_PLL_GET_PARAMETER: |
| 495 | { |
Naman Patel | 6c48034 | 2022-12-01 02:58:46 -0800 | [diff] [blame] | 496 | uint32_t value = 0U; |
Jolly Shah | cb2f45d | 2019-01-04 11:28:38 -0800 | [diff] [blame] | 497 | |
| 498 | ret = pm_pll_get_parameter(pm_arg[0], pm_arg[1], &value); |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 499 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value << 32U)); |
Jolly Shah | cb2f45d | 2019-01-04 11:28:38 -0800 | [diff] [blame] | 500 | } |
| 501 | |
Jolly Shah | 1f0d585 | 2019-01-04 11:32:31 -0800 | [diff] [blame] | 502 | case PM_PLL_SET_MODE: |
| 503 | ret = pm_pll_set_mode(pm_arg[0], pm_arg[1]); |
| 504 | SMC_RET1(handle, (uint64_t)ret); |
| 505 | |
Jolly Shah | 141421e | 2019-01-04 11:35:48 -0800 | [diff] [blame] | 506 | case PM_PLL_GET_MODE: |
| 507 | { |
Naman Patel | 6c48034 | 2022-12-01 02:58:46 -0800 | [diff] [blame] | 508 | uint32_t mode = 0U; |
Jolly Shah | 141421e | 2019-01-04 11:35:48 -0800 | [diff] [blame] | 509 | |
| 510 | ret = pm_pll_get_mode(pm_arg[0], &mode); |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 511 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)mode << 32U)); |
Jolly Shah | 141421e | 2019-01-04 11:35:48 -0800 | [diff] [blame] | 512 | } |
| 513 | |
Kalyani Akula | 6ebe483 | 2020-11-22 22:42:10 -0800 | [diff] [blame] | 514 | case PM_REGISTER_ACCESS: |
| 515 | { |
Naman Patel | 6c48034 | 2022-12-01 02:58:46 -0800 | [diff] [blame] | 516 | uint32_t value = 0U; |
Kalyani Akula | 6ebe483 | 2020-11-22 22:42:10 -0800 | [diff] [blame] | 517 | |
| 518 | ret = pm_register_access(pm_arg[0], pm_arg[1], pm_arg[2], |
| 519 | pm_arg[3], &value); |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 520 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32U); |
Kalyani Akula | 6ebe483 | 2020-11-22 22:42:10 -0800 | [diff] [blame] | 521 | } |
| 522 | |
VNSL Durga | deb1a36 | 2020-11-23 04:46:04 -0800 | [diff] [blame] | 523 | case PM_EFUSE_ACCESS: |
| 524 | { |
Naman Patel | 6c48034 | 2022-12-01 02:58:46 -0800 | [diff] [blame] | 525 | uint32_t value = 0U; |
VNSL Durga | deb1a36 | 2020-11-23 04:46:04 -0800 | [diff] [blame] | 526 | |
Vesa Jääskeläinen | 28f9ce5 | 2022-04-29 08:47:24 +0300 | [diff] [blame] | 527 | #if defined(ZYNQMP_SECURE_EFUSES) |
| 528 | if (is_caller_non_secure(flags)) { |
| 529 | SMC_RET1(handle, |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 530 | (((uint64_t)PM_RET_ERROR_NOT_ENABLED) << 32U) | |
Vesa Jääskeläinen | 28f9ce5 | 2022-04-29 08:47:24 +0300 | [diff] [blame] | 531 | (uint64_t)PM_RET_ERROR_ACCESS); |
| 532 | } |
| 533 | #endif |
VNSL Durga | deb1a36 | 2020-11-23 04:46:04 -0800 | [diff] [blame] | 534 | ret = pm_efuse_access(pm_arg[0], pm_arg[1], &value); |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 535 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32U); |
VNSL Durga | deb1a36 | 2020-11-23 04:46:04 -0800 | [diff] [blame] | 536 | } |
| 537 | |
Nava kishore Manne | 2af6d53 | 2022-01-13 13:29:36 +0530 | [diff] [blame] | 538 | case PM_FPGA_GET_VERSION: |
| 539 | case PM_FPGA_GET_FEATURE_LIST: |
| 540 | { |
Nava kishore Manne | 2af6d53 | 2022-01-13 13:29:36 +0530 | [diff] [blame] | 541 | uint32_t ret_payload[PAYLOAD_ARG_CNT]; |
| 542 | |
| 543 | PM_PACK_PAYLOAD5(payload, smc_fid & FUNCID_NUM_MASK, |
| 544 | pm_arg[0], pm_arg[1], pm_arg[2], pm_arg[3]); |
| 545 | ret = pm_ipi_send_sync(primary_proc, payload, ret_payload, 3U); |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 546 | SMC_RET2(handle, (uint64_t)ret | (uint64_t)ret_payload[0] << 32U, |
| 547 | (uint64_t)ret_payload[1] | (uint64_t)ret_payload[2] << 32U); |
Nava kishore Manne | 2af6d53 | 2022-01-13 13:29:36 +0530 | [diff] [blame] | 548 | } |
| 549 | |
Ronak Jain | 325bad1 | 2021-12-21 01:39:59 -0800 | [diff] [blame] | 550 | case PM_FEATURE_CHECK: |
| 551 | { |
Ronak Jain | f841467 | 2022-05-11 02:48:52 -0700 | [diff] [blame] | 552 | uint32_t version = 0; |
Ronak Jain | 325bad1 | 2021-12-21 01:39:59 -0800 | [diff] [blame] | 553 | uint32_t bit_mask[2] = {0}; |
| 554 | |
| 555 | ret = pm_feature_check(pm_arg[0], &version, bit_mask, |
| 556 | ARRAY_SIZE(bit_mask)); |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 557 | SMC_RET2(handle, (uint64_t)ret | ((uint64_t)version << 32U), |
| 558 | (uint64_t)bit_mask[0] | ((uint64_t)bit_mask[1] << 32U)); |
Ronak Jain | 325bad1 | 2021-12-21 01:39:59 -0800 | [diff] [blame] | 559 | } |
| 560 | |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 561 | default: |
Ronak Jain | 52de594 | 2022-01-20 23:11:18 -0800 | [diff] [blame] | 562 | /* Send request to the PMU */ |
| 563 | PM_PACK_PAYLOAD6(payload, api_id, pm_arg[0], pm_arg[1], |
| 564 | pm_arg[2], pm_arg[3], pm_arg[4]); |
| 565 | ret = pm_ipi_send_sync(primary_proc, payload, result, |
| 566 | PAYLOAD_ARG_CNT); |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 567 | SMC_RET2(handle, (uint64_t)ret | ((uint64_t)result[0] << 32U), |
| 568 | (uint64_t)result[1] | ((uint64_t)result[2] << 32U)); |
Soren Brinkmann | 76fcae3 | 2016-03-06 20:16:27 -0800 | [diff] [blame] | 569 | } |
| 570 | } |
Venkatesh Yadav Abbarapu | 7ace4af | 2020-11-23 04:26:54 -0800 | [diff] [blame] | 571 | |
| 572 | /** |
| 573 | * em_smc_handler() - SMC handler for EM-API calls coming from EL1/EL2. |
| 574 | * @smc_fid - Function Identifier |
| 575 | * @x1 - x4 - Arguments |
| 576 | * @cookie - Unused |
| 577 | * @handler - Pointer to caller's context structure |
| 578 | * |
| 579 | * @return - Unused |
| 580 | * |
| 581 | * Determines that smc_fid is valid and supported EM SMC Function ID from the |
| 582 | * list of em_api_ids, otherwise completes the request with |
| 583 | * the unknown SMC Function ID |
| 584 | * |
| 585 | * The SMC calls for EM service are forwarded from SIP Service SMC handler |
| 586 | * function with rt_svc_handle signature |
| 587 | */ |
| 588 | uint64_t em_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3, |
Venkatesh Yadav Abbarapu | 0386e65 | 2022-05-24 14:05:57 +0530 | [diff] [blame] | 589 | uint64_t x4, const void *cookie, void *handle, uint64_t flags) |
Venkatesh Yadav Abbarapu | 7ace4af | 2020-11-23 04:26:54 -0800 | [diff] [blame] | 590 | { |
| 591 | enum pm_ret_status ret; |
| 592 | |
| 593 | switch (smc_fid & FUNCID_NUM_MASK) { |
| 594 | /* EM API Functions */ |
| 595 | case EM_SET_ACTION: |
| 596 | { |
| 597 | uint32_t value; |
| 598 | |
| 599 | ret = em_set_action(&value); |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 600 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32U); |
Venkatesh Yadav Abbarapu | 7ace4af | 2020-11-23 04:26:54 -0800 | [diff] [blame] | 601 | } |
| 602 | |
| 603 | case EM_REMOVE_ACTION: |
| 604 | { |
| 605 | uint32_t value; |
| 606 | |
| 607 | ret = em_remove_action(&value); |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 608 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32U); |
Venkatesh Yadav Abbarapu | 7ace4af | 2020-11-23 04:26:54 -0800 | [diff] [blame] | 609 | } |
| 610 | |
| 611 | case EM_SEND_ERRORS: |
| 612 | { |
| 613 | uint32_t value; |
| 614 | |
| 615 | ret = em_send_errors(&value); |
HariBabu Gattem | b0c70f5 | 2022-09-29 23:59:11 -0700 | [diff] [blame] | 616 | SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32U); |
Venkatesh Yadav Abbarapu | 7ace4af | 2020-11-23 04:26:54 -0800 | [diff] [blame] | 617 | } |
| 618 | |
| 619 | default: |
| 620 | WARN("Unimplemented EM Service Call: 0x%x\n", smc_fid); |
| 621 | SMC_RET1(handle, SMC_UNK); |
| 622 | } |
| 623 | } |