Antonio Nino Diaz | 272e871 | 2018-09-18 01:36:00 +0100 | [diff] [blame] | 1 | # |
Carlo Caione | 189494a | 2019-08-23 18:28:36 +0100 | [diff] [blame] | 2 | # Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved. |
Antonio Nino Diaz | 272e871 | 2018-09-18 01:36:00 +0100 | [diff] [blame] | 3 | # |
| 4 | # SPDX-License-Identifier: BSD-3-Clause |
| 5 | # |
| 6 | |
| 7 | include lib/xlat_tables_v2/xlat_tables.mk |
| 8 | |
Carlo Caione | 50e8a27 | 2019-08-23 19:34:44 +0100 | [diff] [blame] | 9 | AML_PLAT := plat/amlogic |
| 10 | AML_PLAT_SOC := ${AML_PLAT}/${PLAT} |
Carlo Caione | d6e5afb | 2019-08-23 20:02:32 +0100 | [diff] [blame] | 11 | AML_PLAT_COMMON := ${AML_PLAT}/common |
Antonio Nino Diaz | 272e871 | 2018-09-18 01:36:00 +0100 | [diff] [blame] | 12 | |
Carlo Caione | 50e8a27 | 2019-08-23 19:34:44 +0100 | [diff] [blame] | 13 | PLAT_INCLUDES := -I${AML_PLAT_SOC}/include |
| 14 | |
| 15 | GIC_SOURCES := drivers/arm/gic/common/gic_common.c \ |
Antonio Nino Diaz | 272e871 | 2018-09-18 01:36:00 +0100 | [diff] [blame] | 16 | drivers/arm/gic/v2/gicv2_main.c \ |
| 17 | drivers/arm/gic/v2/gicv2_helpers.c \ |
| 18 | plat/common/plat_gicv2.c |
| 19 | |
Carlo Caione | 189494a | 2019-08-23 18:28:36 +0100 | [diff] [blame] | 20 | PLAT_BL_COMMON_SOURCES := drivers/amlogic/console/aarch64/meson_console.S \ |
Carlo Caione | 50e8a27 | 2019-08-23 19:34:44 +0100 | [diff] [blame] | 21 | ${AML_PLAT_SOC}/gxbb_common.c \ |
| 22 | ${AML_PLAT_SOC}/gxbb_topology.c \ |
Antonio Nino Diaz | 272e871 | 2018-09-18 01:36:00 +0100 | [diff] [blame] | 23 | ${XLAT_TABLES_LIB_SRCS} |
| 24 | |
| 25 | BL31_SOURCES += lib/cpus/aarch64/cortex_a53.S \ |
| 26 | plat/common/plat_psci_common.c \ |
Carlo Caione | d6e5afb | 2019-08-23 20:02:32 +0100 | [diff] [blame] | 27 | ${AML_PLAT_COMMON}/aarch64/aml_helpers.S \ |
Carlo Caione | 50e8a27 | 2019-08-23 19:34:44 +0100 | [diff] [blame] | 28 | ${AML_PLAT_SOC}/gxbb_bl31_setup.c \ |
| 29 | ${AML_PLAT_SOC}/gxbb_efuse.c \ |
| 30 | ${AML_PLAT_SOC}/gxbb_mhu.c \ |
| 31 | ${AML_PLAT_SOC}/gxbb_pm.c \ |
| 32 | ${AML_PLAT_SOC}/gxbb_scpi.c \ |
| 33 | ${AML_PLAT_SOC}/gxbb_sip_svc.c \ |
| 34 | ${AML_PLAT_SOC}/gxbb_thermal.c \ |
| 35 | ${GIC_SOURCES} |
Antonio Nino Diaz | 272e871 | 2018-09-18 01:36:00 +0100 | [diff] [blame] | 36 | |
| 37 | # Tune compiler for Cortex-A53 |
| 38 | ifeq ($(notdir $(CC)),armclang) |
| 39 | TF_CFLAGS_aarch64 += -mcpu=cortex-a53 |
| 40 | else ifneq ($(findstring clang,$(notdir $(CC))),) |
| 41 | TF_CFLAGS_aarch64 += -mcpu=cortex-a53 |
| 42 | else |
| 43 | TF_CFLAGS_aarch64 += -mtune=cortex-a53 |
| 44 | endif |
| 45 | |
| 46 | # Build config flags |
| 47 | # ------------------ |
| 48 | |
| 49 | # Enable all errata workarounds for Cortex-A53 |
| 50 | ERRATA_A53_826319 := 1 |
| 51 | ERRATA_A53_835769 := 1 |
| 52 | ERRATA_A53_836870 := 1 |
| 53 | ERRATA_A53_843419 := 1 |
| 54 | ERRATA_A53_855873 := 1 |
| 55 | |
| 56 | WORKAROUND_CVE_2017_5715 := 0 |
| 57 | |
| 58 | # Have different sections for code and rodata |
| 59 | SEPARATE_CODE_AND_RODATA := 1 |
| 60 | |
| 61 | # Use Coherent memory |
| 62 | USE_COHERENT_MEM := 1 |
| 63 | |
Antonio Nino Diaz | 272e871 | 2018-09-18 01:36:00 +0100 | [diff] [blame] | 64 | # Verify build config |
| 65 | # ------------------- |
| 66 | |
Antonio Nino Diaz | 272e871 | 2018-09-18 01:36:00 +0100 | [diff] [blame] | 67 | ifneq (${RESET_TO_BL31}, 0) |
Carlo Caione | 50e8a27 | 2019-08-23 19:34:44 +0100 | [diff] [blame] | 68 | $(error Error: ${PLAT} needs RESET_TO_BL31=0) |
Antonio Nino Diaz | 272e871 | 2018-09-18 01:36:00 +0100 | [diff] [blame] | 69 | endif |
| 70 | |
| 71 | ifeq (${ARCH},aarch32) |
Carlo Caione | 50e8a27 | 2019-08-23 19:34:44 +0100 | [diff] [blame] | 72 | $(error Error: AArch32 not supported on ${PLAT}) |
Antonio Nino Diaz | 272e871 | 2018-09-18 01:36:00 +0100 | [diff] [blame] | 73 | endif |