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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Dan Handleye83b0ca2014-01-14 18:17:09 +00002 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
Dan Handley2bd4ef22014-04-09 13:14:54 +010031#include <arch.h>
Achin Gupta4f6ad662013-10-25 09:08:21 +010032#include <arch_helpers.h>
Dan Handley2bd4ef22014-04-09 13:14:54 +010033#include <assert.h>
Achin Gupta4f6ad662013-10-25 09:08:21 +010034#include <bl_common.h>
35#include <bl2.h>
Dan Handley714a0d22014-04-09 13:13:04 +010036#include <debug.h>
Dan Handley2bd4ef22014-04-09 13:14:54 +010037#include <platform.h>
38#include <stdio.h>
Dan Handleybcd60ba2014-04-17 18:53:42 +010039#include "bl2_private.h"
Achin Gupta4f6ad662013-10-25 09:08:21 +010040
41/*******************************************************************************
Vikram Kanigiria3a5e4a2014-05-15 18:27:15 +010042 * Runs BL31 from the given entry point. It jumps to a higher exception level
43 * through an SMC.
44 ******************************************************************************/
Vikram Kanigirida567432014-04-15 18:08:08 +010045static void __dead2 bl2_run_bl31(entry_point_info_t *bl31_ep_info,
Vikram Kanigiria3a5e4a2014-05-15 18:27:15 +010046 unsigned long arg1,
47 unsigned long arg2)
48{
Vikram Kanigirida567432014-04-15 18:08:08 +010049 /* Set the args pointer */
50 bl31_ep_info->args.arg0 = arg1;
51 bl31_ep_info->args.arg1 = arg2;
Vikram Kanigiria3a5e4a2014-05-15 18:27:15 +010052
Vikram Kanigirida567432014-04-15 18:08:08 +010053 /* Flush the params to be passed to memory */
54 bl2_plat_flush_bl31_params();
Vikram Kanigiria3a5e4a2014-05-15 18:27:15 +010055
Vikram Kanigirida567432014-04-15 18:08:08 +010056 smc(RUN_IMAGE, (unsigned long)bl31_ep_info, 0, 0, 0, 0, 0, 0);
Vikram Kanigiria3a5e4a2014-05-15 18:27:15 +010057}
58
59
60/*******************************************************************************
Achin Gupta4f6ad662013-10-25 09:08:21 +010061 * The only thing to do in BL2 is to load further images and pass control to
62 * BL31. The memory occupied by BL2 will be reclaimed by BL3_x stages. BL2 runs
63 * entirely in S-EL1. Since arm standard c libraries are not PIC, printf et al
64 * are not available. We rely on assertions to signal error conditions
65 ******************************************************************************/
66void bl2_main(void)
67{
Dan Handleye2712bc2014-04-10 15:37:22 +010068 meminfo_t *bl2_tzram_layout;
Vikram Kanigirida567432014-04-15 18:08:08 +010069 bl31_params_t *bl2_to_bl31_params;
Vikram Kanigirida567432014-04-15 18:08:08 +010070 unsigned int bl2_load, bl31_load;
71 entry_point_info_t *bl31_ep_info;
Vikram Kanigirid8c9d262014-05-16 18:48:12 +010072 meminfo_t bl32_mem_info;
73 meminfo_t bl33_mem_info;
Vikram Kanigirida567432014-04-15 18:08:08 +010074 int e;
Achin Gupta4f6ad662013-10-25 09:08:21 +010075
76 /* Perform remaining generic architectural setup in S-El1 */
77 bl2_arch_setup();
78
79 /* Perform platform setup in BL1 */
80 bl2_platform_setup();
81
Jon Medhurstecf0a712014-02-17 12:18:24 +000082 printf("BL2 %s\n\r", build_message);
Achin Gupta4f6ad662013-10-25 09:08:21 +010083
84 /* Find out how much free trusted ram remains after BL2 load */
Sandrine Bailleuxee12f6f2013-11-28 14:55:58 +000085 bl2_tzram_layout = bl2_plat_sec_mem_layout();
Achin Gupta4f6ad662013-10-25 09:08:21 +010086
87 /*
Vikram Kanigirida567432014-04-15 18:08:08 +010088 * Get a pointer to the memory the platform has set aside to pass
89 * information to BL31.
90 */
91 bl2_to_bl31_params = bl2_plat_get_bl31_params();
Vikram Kanigirida567432014-04-15 18:08:08 +010092 bl31_ep_info = bl2_plat_get_bl31_ep_info();
93
94 /*
Achin Gupta4f6ad662013-10-25 09:08:21 +010095 * Load BL31. BL1 tells BL2 whether it has been TOP or BOTTOM loaded.
96 * To avoid fragmentation of trusted SRAM memory, BL31 is always
97 * loaded opposite to BL2. This allows BL31 to reclaim BL2 memory
98 * while maintaining its free space in one contiguous chunk.
99 */
Sandrine Bailleuxee12f6f2013-11-28 14:55:58 +0000100 bl2_load = bl2_tzram_layout->attr & LOAD_MASK;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100101 assert((bl2_load == TOP_LOAD) || (bl2_load == BOT_LOAD));
102 bl31_load = (bl2_load == TOP_LOAD) ? BOT_LOAD : TOP_LOAD;
Vikram Kanigirida567432014-04-15 18:08:08 +0100103 e = load_image(bl2_tzram_layout,
104 BL31_IMAGE_NAME,
105 bl31_load,
106 BL31_BASE,
107 bl2_to_bl31_params->bl31_image_info,
108 bl31_ep_info);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100109
110 /* Assert if it has not been possible to load BL31 */
Vikram Kanigirida567432014-04-15 18:08:08 +0100111 if (e) {
Achin Guptae4d084e2014-02-19 17:18:23 +0000112 ERROR("Failed to load BL3-1.\n");
113 panic();
114 }
115
Vikram Kanigirida567432014-04-15 18:08:08 +0100116 bl2_plat_set_bl31_ep_info(bl2_to_bl31_params->bl31_image_info,
117 bl31_ep_info);
Achin Guptaa3050ed2014-02-19 17:52:35 +0000118
Vikram Kanigirid8c9d262014-05-16 18:48:12 +0100119 bl2_plat_get_bl33_meminfo(&bl33_mem_info);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100120
Achin Guptae4d084e2014-02-19 17:18:23 +0000121 /* Load the BL33 image in non-secure memory provided by the platform */
Vikram Kanigirid8c9d262014-05-16 18:48:12 +0100122 e = load_image(&bl33_mem_info,
Vikram Kanigirida567432014-04-15 18:08:08 +0100123 BL33_IMAGE_NAME,
124 BOT_LOAD,
125 plat_get_ns_image_entrypoint(),
126 bl2_to_bl31_params->bl33_image_info,
127 bl2_to_bl31_params->bl33_ep_info);
128
Harry Liebel561cd332014-02-14 14:42:48 +0000129 /* Halt if failed to load normal world firmware. */
Vikram Kanigirida567432014-04-15 18:08:08 +0100130 if (e) {
Harry Liebel561cd332014-02-14 14:42:48 +0000131 ERROR("Failed to load BL3-3.\n");
132 panic();
133 }
Vikram Kanigirida567432014-04-15 18:08:08 +0100134 bl2_plat_set_bl33_ep_info(bl2_to_bl31_params->bl33_image_info,
135 bl2_to_bl31_params->bl33_ep_info);
Harry Liebel561cd332014-02-14 14:42:48 +0000136
Dan Handley21a30ab2014-04-15 11:38:38 +0100137
138#ifdef BL32_BASE
Achin Gupta4f6ad662013-10-25 09:08:21 +0100139 /*
Vikram Kanigiria3a5e4a2014-05-15 18:27:15 +0100140 * Load the BL32 image if there's one. It is upto to platform
141 * to specify where BL32 should be loaded if it exists. It
142 * could create space in the secure sram or point to a
Dan Handley21a30ab2014-04-15 11:38:38 +0100143 * completely different memory.
144 *
145 * If a platform does not want to attempt to load BL3-2 image
146 * it must leave BL32_BASE undefined
Vikram Kanigiria3a5e4a2014-05-15 18:27:15 +0100147 */
Vikram Kanigirid8c9d262014-05-16 18:48:12 +0100148 bl2_plat_get_bl32_meminfo(&bl32_mem_info);
Dan Handley21a30ab2014-04-15 11:38:38 +0100149 e = load_image(&bl32_mem_info,
150 BL32_IMAGE_NAME,
151 bl32_mem_info.attr & LOAD_MASK,
152 BL32_BASE,
153 bl2_to_bl31_params->bl32_image_info,
154 bl2_to_bl31_params->bl32_ep_info);
Vikram Kanigiria3a5e4a2014-05-15 18:27:15 +0100155
Dan Handley21a30ab2014-04-15 11:38:38 +0100156 /* Issue a diagnostic if no Secure Payload could be loaded */
157 if (e) {
158 WARN("Failed to load BL3-2.\n");
159 } else {
160 bl2_plat_set_bl32_ep_info(
161 bl2_to_bl31_params->bl32_image_info,
162 bl2_to_bl31_params->bl32_ep_info);
Achin Guptaa3050ed2014-02-19 17:52:35 +0000163 }
Dan Handley21a30ab2014-04-15 11:38:38 +0100164#endif /* BL32_BASE */
Achin Guptaa3050ed2014-02-19 17:52:35 +0000165
Achin Gupta4f6ad662013-10-25 09:08:21 +0100166 /*
167 * Run BL31 via an SMC to BL1. Information on how to pass control to
Achin Guptae4d084e2014-02-19 17:18:23 +0000168 * the BL32 (if present) and BL33 software images will be passed to
169 * BL31 as an argument.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100170 */
Vikram Kanigirid8c9d262014-05-16 18:48:12 +0100171 bl2_run_bl31(bl31_ep_info, (unsigned long)bl2_to_bl31_params, 0);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100172}