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Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Dan Handleye83b0ca2014-01-14 18:17:09 +00002 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include <stdio.h>
32#include <string.h>
33#include <assert.h>
34#include <arch_helpers.h>
35#include <console.h>
36#include <platform.h>
37#include <semihosting.h>
38#include <bl_common.h>
39#include <bl2.h>
Harry Liebel561cd332014-02-14 14:42:48 +000040#include "debug.h"
Achin Gupta4f6ad662013-10-25 09:08:21 +010041
42/*******************************************************************************
43 * The only thing to do in BL2 is to load further images and pass control to
44 * BL31. The memory occupied by BL2 will be reclaimed by BL3_x stages. BL2 runs
45 * entirely in S-EL1. Since arm standard c libraries are not PIC, printf et al
46 * are not available. We rely on assertions to signal error conditions
47 ******************************************************************************/
48void bl2_main(void)
49{
Sandrine Bailleuxee12f6f2013-11-28 14:55:58 +000050 meminfo *bl2_tzram_layout;
Achin Guptae4d084e2014-02-19 17:18:23 +000051 bl31_args *bl2_to_bl31_args;
Achin Guptaa3050ed2014-02-19 17:52:35 +000052 unsigned long bl31_base, bl32_base = 0, bl33_base, el_status;
Achin Gupta4f6ad662013-10-25 09:08:21 +010053 unsigned int bl2_load, bl31_load, mode;
54
55 /* Perform remaining generic architectural setup in S-El1 */
56 bl2_arch_setup();
57
58 /* Perform platform setup in BL1 */
59 bl2_platform_setup();
60
Achin Guptae4d084e2014-02-19 17:18:23 +000061#if defined(__GNUC__)
Achin Gupta4f6ad662013-10-25 09:08:21 +010062 printf("BL2 Built : %s, %s\n\r", __TIME__, __DATE__);
63#endif
64
65 /* Find out how much free trusted ram remains after BL2 load */
Sandrine Bailleuxee12f6f2013-11-28 14:55:58 +000066 bl2_tzram_layout = bl2_plat_sec_mem_layout();
Achin Gupta4f6ad662013-10-25 09:08:21 +010067
68 /*
69 * Load BL31. BL1 tells BL2 whether it has been TOP or BOTTOM loaded.
70 * To avoid fragmentation of trusted SRAM memory, BL31 is always
71 * loaded opposite to BL2. This allows BL31 to reclaim BL2 memory
72 * while maintaining its free space in one contiguous chunk.
73 */
Sandrine Bailleuxee12f6f2013-11-28 14:55:58 +000074 bl2_load = bl2_tzram_layout->attr & LOAD_MASK;
Achin Gupta4f6ad662013-10-25 09:08:21 +010075 assert((bl2_load == TOP_LOAD) || (bl2_load == BOT_LOAD));
76 bl31_load = (bl2_load == TOP_LOAD) ? BOT_LOAD : TOP_LOAD;
Sandrine Bailleuxee12f6f2013-11-28 14:55:58 +000077 bl31_base = load_image(bl2_tzram_layout, BL31_IMAGE_NAME,
Achin Gupta4f6ad662013-10-25 09:08:21 +010078 bl31_load, BL31_BASE);
79
80 /* Assert if it has not been possible to load BL31 */
Achin Guptae4d084e2014-02-19 17:18:23 +000081 if (bl31_base == 0) {
82 ERROR("Failed to load BL3-1.\n");
83 panic();
84 }
85
86 /*
87 * Get a pointer to the memory the platform has set aside to pass
88 * information to BL31.
89 */
90 bl2_to_bl31_args = bl2_get_bl31_args_ptr();
Achin Gupta4f6ad662013-10-25 09:08:21 +010091
92 /*
Achin Guptaa3050ed2014-02-19 17:52:35 +000093 * Load the BL32 image if there's one. It is upto to platform
94 * to specify where BL32 should be loaded if it exists. It
95 * could create space in the secure sram or point to a
96 * completely different memory. A zero size indicates that the
97 * platform does not want to load a BL32 image.
98 */
99 if (bl2_to_bl31_args->bl32_meminfo.total_size)
100 bl32_base = load_image(&bl2_to_bl31_args->bl32_meminfo,
101 BL32_IMAGE_NAME,
102 bl2_to_bl31_args->bl32_meminfo.attr &
103 LOAD_MASK,
104 BL32_BASE);
105
106 /*
Achin Gupta4f6ad662013-10-25 09:08:21 +0100107 * Create a new layout of memory for BL31 as seen by BL2. This
108 * will gobble up all the BL2 memory.
109 */
Achin Guptae4d084e2014-02-19 17:18:23 +0000110 init_bl31_mem_layout(bl2_tzram_layout,
111 &bl2_to_bl31_args->bl31_meminfo,
112 bl31_load);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100113
Achin Guptae4d084e2014-02-19 17:18:23 +0000114 /* Load the BL33 image in non-secure memory provided by the platform */
115 bl33_base = load_image(&bl2_to_bl31_args->bl33_meminfo,
116 BL33_IMAGE_NAME,
117 BOT_LOAD,
118 plat_get_ns_image_entrypoint());
Harry Liebel561cd332014-02-14 14:42:48 +0000119 /* Halt if failed to load normal world firmware. */
120 if (bl33_base == 0) {
121 ERROR("Failed to load BL3-3.\n");
122 panic();
123 }
124
Achin Gupta4f6ad662013-10-25 09:08:21 +0100125 /*
126 * BL2 also needs to tell BL31 where the non-trusted software image
Achin Guptae4d084e2014-02-19 17:18:23 +0000127 * is located.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100128 */
Achin Guptae4d084e2014-02-19 17:18:23 +0000129 bl2_to_bl31_args->bl33_image_info.entrypoint = bl33_base;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100130
131 /* Figure out what mode we enter the non-secure world in */
132 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT;
133 el_status &= ID_AA64PFR0_ELX_MASK;
134
135 if (el_status)
136 mode = MODE_EL2;
137 else
138 mode = MODE_EL1;
139
Achin Guptae4d084e2014-02-19 17:18:23 +0000140 /*
141 * TODO: Consider the possibility of specifying the SPSR in
142 * the FIP ToC and allowing the platform to have a say as
143 * well.
144 */
145 bl2_to_bl31_args->bl33_image_info.spsr =
146 make_spsr(mode, MODE_SP_ELX, MODE_RW_64);
147 bl2_to_bl31_args->bl33_image_info.security_state = NON_SECURE;
148
Achin Guptaa3050ed2014-02-19 17:52:35 +0000149 if (bl32_base) {
150 /* Fill BL32 image info */
151 bl2_to_bl31_args->bl32_image_info.entrypoint = bl32_base;
152 bl2_to_bl31_args->bl32_image_info.security_state = SECURE;
153
154 /*
155 * The Secure Payload Dispatcher service is responsible for
156 * setting the SPSR prior to entry into the BL32 image.
157 */
158 bl2_to_bl31_args->bl32_image_info.spsr = 0;
159 }
160
Achin Guptae4d084e2014-02-19 17:18:23 +0000161 /* Flush the entire BL31 args buffer */
162 flush_dcache_range((unsigned long) bl2_to_bl31_args,
163 sizeof(*bl2_to_bl31_args));
Achin Gupta4f6ad662013-10-25 09:08:21 +0100164
165 /*
166 * Run BL31 via an SMC to BL1. Information on how to pass control to
Achin Guptae4d084e2014-02-19 17:18:23 +0000167 * the BL32 (if present) and BL33 software images will be passed to
168 * BL31 as an argument.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100169 */
Achin Guptae4d084e2014-02-19 17:18:23 +0000170 run_image(bl31_base,
171 make_spsr(MODE_EL3, MODE_SP_ELX, MODE_RW_64),
172 SECURE,
173 (void *) bl2_to_bl31_args,
174 NULL);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100175}