blob: 6f6ea51bfe1db23aa6555231a0fdf3b7ca724326 [file] [log] [blame]
Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Dan Handleye83b0ca2014-01-14 18:17:09 +00002 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include <stdio.h>
32#include <string.h>
33#include <assert.h>
34#include <arch_helpers.h>
35#include <console.h>
36#include <platform.h>
37#include <semihosting.h>
38#include <bl_common.h>
39#include <bl2.h>
Dan Handley714a0d22014-04-09 13:13:04 +010040#include <debug.h>
Dan Handleybcd60ba2014-04-17 18:53:42 +010041#include "bl2_private.h"
Achin Gupta4f6ad662013-10-25 09:08:21 +010042
43/*******************************************************************************
44 * The only thing to do in BL2 is to load further images and pass control to
45 * BL31. The memory occupied by BL2 will be reclaimed by BL3_x stages. BL2 runs
46 * entirely in S-EL1. Since arm standard c libraries are not PIC, printf et al
47 * are not available. We rely on assertions to signal error conditions
48 ******************************************************************************/
49void bl2_main(void)
50{
Dan Handleye2712bc2014-04-10 15:37:22 +010051 meminfo_t *bl2_tzram_layout;
52 bl31_args_t *bl2_to_bl31_args;
Achin Guptaa3050ed2014-02-19 17:52:35 +000053 unsigned long bl31_base, bl32_base = 0, bl33_base, el_status;
Achin Gupta4f6ad662013-10-25 09:08:21 +010054 unsigned int bl2_load, bl31_load, mode;
55
56 /* Perform remaining generic architectural setup in S-El1 */
57 bl2_arch_setup();
58
59 /* Perform platform setup in BL1 */
60 bl2_platform_setup();
61
Jon Medhurstecf0a712014-02-17 12:18:24 +000062 printf("BL2 %s\n\r", build_message);
Achin Gupta4f6ad662013-10-25 09:08:21 +010063
64 /* Find out how much free trusted ram remains after BL2 load */
Sandrine Bailleuxee12f6f2013-11-28 14:55:58 +000065 bl2_tzram_layout = bl2_plat_sec_mem_layout();
Achin Gupta4f6ad662013-10-25 09:08:21 +010066
67 /*
68 * Load BL31. BL1 tells BL2 whether it has been TOP or BOTTOM loaded.
69 * To avoid fragmentation of trusted SRAM memory, BL31 is always
70 * loaded opposite to BL2. This allows BL31 to reclaim BL2 memory
71 * while maintaining its free space in one contiguous chunk.
72 */
Sandrine Bailleuxee12f6f2013-11-28 14:55:58 +000073 bl2_load = bl2_tzram_layout->attr & LOAD_MASK;
Achin Gupta4f6ad662013-10-25 09:08:21 +010074 assert((bl2_load == TOP_LOAD) || (bl2_load == BOT_LOAD));
75 bl31_load = (bl2_load == TOP_LOAD) ? BOT_LOAD : TOP_LOAD;
Sandrine Bailleuxee12f6f2013-11-28 14:55:58 +000076 bl31_base = load_image(bl2_tzram_layout, BL31_IMAGE_NAME,
Achin Gupta4f6ad662013-10-25 09:08:21 +010077 bl31_load, BL31_BASE);
78
79 /* Assert if it has not been possible to load BL31 */
Achin Guptae4d084e2014-02-19 17:18:23 +000080 if (bl31_base == 0) {
81 ERROR("Failed to load BL3-1.\n");
82 panic();
83 }
84
85 /*
86 * Get a pointer to the memory the platform has set aside to pass
87 * information to BL31.
88 */
89 bl2_to_bl31_args = bl2_get_bl31_args_ptr();
Achin Gupta4f6ad662013-10-25 09:08:21 +010090
91 /*
Achin Guptaa3050ed2014-02-19 17:52:35 +000092 * Load the BL32 image if there's one. It is upto to platform
93 * to specify where BL32 should be loaded if it exists. It
94 * could create space in the secure sram or point to a
95 * completely different memory. A zero size indicates that the
96 * platform does not want to load a BL32 image.
97 */
98 if (bl2_to_bl31_args->bl32_meminfo.total_size)
99 bl32_base = load_image(&bl2_to_bl31_args->bl32_meminfo,
100 BL32_IMAGE_NAME,
101 bl2_to_bl31_args->bl32_meminfo.attr &
102 LOAD_MASK,
103 BL32_BASE);
104
105 /*
Achin Gupta4f6ad662013-10-25 09:08:21 +0100106 * Create a new layout of memory for BL31 as seen by BL2. This
107 * will gobble up all the BL2 memory.
108 */
Achin Guptae4d084e2014-02-19 17:18:23 +0000109 init_bl31_mem_layout(bl2_tzram_layout,
110 &bl2_to_bl31_args->bl31_meminfo,
111 bl31_load);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100112
Achin Guptae4d084e2014-02-19 17:18:23 +0000113 /* Load the BL33 image in non-secure memory provided by the platform */
114 bl33_base = load_image(&bl2_to_bl31_args->bl33_meminfo,
115 BL33_IMAGE_NAME,
116 BOT_LOAD,
117 plat_get_ns_image_entrypoint());
Harry Liebel561cd332014-02-14 14:42:48 +0000118 /* Halt if failed to load normal world firmware. */
119 if (bl33_base == 0) {
120 ERROR("Failed to load BL3-3.\n");
121 panic();
122 }
123
Achin Gupta4f6ad662013-10-25 09:08:21 +0100124 /*
125 * BL2 also needs to tell BL31 where the non-trusted software image
Achin Guptae4d084e2014-02-19 17:18:23 +0000126 * is located.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100127 */
Achin Guptae4d084e2014-02-19 17:18:23 +0000128 bl2_to_bl31_args->bl33_image_info.entrypoint = bl33_base;
Achin Gupta4f6ad662013-10-25 09:08:21 +0100129
130 /* Figure out what mode we enter the non-secure world in */
131 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT;
132 el_status &= ID_AA64PFR0_ELX_MASK;
133
134 if (el_status)
135 mode = MODE_EL2;
136 else
137 mode = MODE_EL1;
138
Achin Guptae4d084e2014-02-19 17:18:23 +0000139 /*
140 * TODO: Consider the possibility of specifying the SPSR in
141 * the FIP ToC and allowing the platform to have a say as
142 * well.
143 */
144 bl2_to_bl31_args->bl33_image_info.spsr =
145 make_spsr(mode, MODE_SP_ELX, MODE_RW_64);
146 bl2_to_bl31_args->bl33_image_info.security_state = NON_SECURE;
147
Achin Guptaa3050ed2014-02-19 17:52:35 +0000148 if (bl32_base) {
149 /* Fill BL32 image info */
150 bl2_to_bl31_args->bl32_image_info.entrypoint = bl32_base;
151 bl2_to_bl31_args->bl32_image_info.security_state = SECURE;
152
153 /*
154 * The Secure Payload Dispatcher service is responsible for
155 * setting the SPSR prior to entry into the BL32 image.
156 */
157 bl2_to_bl31_args->bl32_image_info.spsr = 0;
158 }
159
Achin Guptae4d084e2014-02-19 17:18:23 +0000160 /* Flush the entire BL31 args buffer */
161 flush_dcache_range((unsigned long) bl2_to_bl31_args,
162 sizeof(*bl2_to_bl31_args));
Achin Gupta4f6ad662013-10-25 09:08:21 +0100163
164 /*
165 * Run BL31 via an SMC to BL1. Information on how to pass control to
Achin Guptae4d084e2014-02-19 17:18:23 +0000166 * the BL32 (if present) and BL33 software images will be passed to
167 * BL31 as an argument.
Achin Gupta4f6ad662013-10-25 09:08:21 +0100168 */
Achin Guptae4d084e2014-02-19 17:18:23 +0000169 run_image(bl31_base,
170 make_spsr(MODE_EL3, MODE_SP_ELX, MODE_RW_64),
171 SECURE,
172 (void *) bl2_to_bl31_args,
173 NULL);
Achin Gupta4f6ad662013-10-25 09:08:21 +0100174}