blob: 48ceabfd934e626a09dd5fbb5a83c59db0ffd45f [file] [log] [blame]
developer8670d252021-03-19 22:13:11 +08001#
2# Copyright (c) 2021, MediaTek Inc. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7MTK_PLAT := plat/mediatek
8MTK_PLAT_SOC := ${MTK_PLAT}/${PLAT}
9
10PLAT_INCLUDES := -I${MTK_PLAT}/common/ \
christine.zhua22c10b2021-03-24 21:44:52 +080011 -I${MTK_PLAT}/common/drivers/gic600/ \
developer4c1354b2021-04-22 14:56:58 +080012 -I${MTK_PLAT}/common/drivers/timer/ \
developer037c99f2020-06-15 16:41:03 +080013 -I${MTK_PLAT_SOC}/drivers/mcdi/ \
developer2a56b2c2020-06-16 13:28:28 +080014 -I${MTK_PLAT_SOC}/drivers/spmc/ \
developer8670d252021-03-19 22:13:11 +080015 -I${MTK_PLAT_SOC}/include/
16
christine.zhua22c10b2021-03-24 21:44:52 +080017GICV3_SUPPORT_GIC600 := 1
developer8670d252021-03-19 22:13:11 +080018include drivers/arm/gic/v3/gicv3.mk
19include lib/xlat_tables_v2/xlat_tables.mk
20
21PLAT_BL_COMMON_SOURCES := ${GICV3_SOURCES} \
22 ${XLAT_TABLES_LIB_SRCS} \
23 plat/common/aarch64/crash_console_helpers.S \
24 plat/common/plat_psci_common.c
25
26
27BL31_SOURCES += common/desc_image_load.c \
developer98b97182021-03-26 18:33:43 +080028 drivers/delay_timer/delay_timer.c \
29 drivers/delay_timer/generic_delay_timer.c \
developer8670d252021-03-19 22:13:11 +080030 drivers/ti/uart/aarch64/16550_console.S \
31 lib/bl_aux_params/bl_aux_params.c \
32 lib/cpus/aarch64/cortex_a55.S \
33 lib/cpus/aarch64/cortex_a78.S \
34 plat/common/plat_gicv3.c \
christine.zhua22c10b2021-03-24 21:44:52 +080035 ${MTK_PLAT}/common/drivers/gic600/mt_gic_v3.c \
developer4c1354b2021-04-22 14:56:58 +080036 ${MTK_PLAT}/common/drivers/timer/mt_timer.c \
developer8273a602021-03-25 11:26:46 +080037 ${MTK_PLAT}/common/mtk_cirq.c \
developer8670d252021-03-19 22:13:11 +080038 ${MTK_PLAT}/common/mtk_plat_common.c \
39 ${MTK_PLAT}/common/params_setup.c \
40 ${MTK_PLAT_SOC}/aarch64/platform_common.c \
41 ${MTK_PLAT_SOC}/aarch64/plat_helpers.S \
42 ${MTK_PLAT_SOC}/bl31_plat_setup.c \
developer037c99f2020-06-15 16:41:03 +080043 ${MTK_PLAT_SOC}/drivers/mcdi/mt_cpu_pm.c \
44 ${MTK_PLAT_SOC}/drivers/mcdi/mt_cpu_pm_cpc.c \
45 ${MTK_PLAT_SOC}/drivers/mcdi/mt_mcdi.c \
developer2a56b2c2020-06-16 13:28:28 +080046 ${MTK_PLAT_SOC}/drivers/spmc/mtspmc.c \
developer8670d252021-03-19 22:13:11 +080047 ${MTK_PLAT_SOC}/plat_pm.c \
48 ${MTK_PLAT_SOC}/plat_topology.c
49
50# Configs for A78 and A55
51HW_ASSISTED_COHERENCY := 1
52USE_COHERENT_MEM := 0
53CTX_INCLUDE_AARCH32_REGS := 0
54ERRATA_A55_1530923 := 1
55
56# indicate the reset vector address can be programmed
57PROGRAMMABLE_RESET_ADDRESS := 1
58
59COLD_BOOT_SINGLE_CPU := 1
60
61MACH_MT8195 := 1
62$(eval $(call add_define,MACH_MT8195))
63
64include lib/coreboot/coreboot.mk