| developer | 8670d25 | 2021-03-19 22:13:11 +0800 | [diff] [blame] | 1 | # |
| 2 | # Copyright (c) 2021, MediaTek Inc. All rights reserved. |
| 3 | # |
| 4 | # SPDX-License-Identifier: BSD-3-Clause |
| 5 | # |
| 6 | |
| 7 | MTK_PLAT := plat/mediatek |
| 8 | MTK_PLAT_SOC := ${MTK_PLAT}/${PLAT} |
| 9 | |
| 10 | PLAT_INCLUDES := -I${MTK_PLAT}/common/ \ |
| christine.zhu | a22c10b | 2021-03-24 21:44:52 +0800 | [diff] [blame^] | 11 | -I${MTK_PLAT}/common/drivers/gic600/ \ |
| developer | 8670d25 | 2021-03-19 22:13:11 +0800 | [diff] [blame] | 12 | -I${MTK_PLAT_SOC}/include/ |
| 13 | |
| christine.zhu | a22c10b | 2021-03-24 21:44:52 +0800 | [diff] [blame^] | 14 | GICV3_SUPPORT_GIC600 := 1 |
| developer | 8670d25 | 2021-03-19 22:13:11 +0800 | [diff] [blame] | 15 | include drivers/arm/gic/v3/gicv3.mk |
| 16 | include lib/xlat_tables_v2/xlat_tables.mk |
| 17 | |
| 18 | PLAT_BL_COMMON_SOURCES := ${GICV3_SOURCES} \ |
| 19 | ${XLAT_TABLES_LIB_SRCS} \ |
| 20 | plat/common/aarch64/crash_console_helpers.S \ |
| 21 | plat/common/plat_psci_common.c |
| 22 | |
| 23 | |
| 24 | BL31_SOURCES += common/desc_image_load.c \ |
| 25 | drivers/ti/uart/aarch64/16550_console.S \ |
| 26 | lib/bl_aux_params/bl_aux_params.c \ |
| 27 | lib/cpus/aarch64/cortex_a55.S \ |
| 28 | lib/cpus/aarch64/cortex_a78.S \ |
| 29 | plat/common/plat_gicv3.c \ |
| christine.zhu | a22c10b | 2021-03-24 21:44:52 +0800 | [diff] [blame^] | 30 | ${MTK_PLAT}/common/drivers/gic600/mt_gic_v3.c \ |
| developer | 8670d25 | 2021-03-19 22:13:11 +0800 | [diff] [blame] | 31 | ${MTK_PLAT}/common/mtk_plat_common.c \ |
| 32 | ${MTK_PLAT}/common/params_setup.c \ |
| 33 | ${MTK_PLAT_SOC}/aarch64/platform_common.c \ |
| 34 | ${MTK_PLAT_SOC}/aarch64/plat_helpers.S \ |
| 35 | ${MTK_PLAT_SOC}/bl31_plat_setup.c \ |
| 36 | ${MTK_PLAT_SOC}/plat_pm.c \ |
| 37 | ${MTK_PLAT_SOC}/plat_topology.c |
| 38 | |
| 39 | # Configs for A78 and A55 |
| 40 | HW_ASSISTED_COHERENCY := 1 |
| 41 | USE_COHERENT_MEM := 0 |
| 42 | CTX_INCLUDE_AARCH32_REGS := 0 |
| 43 | ERRATA_A55_1530923 := 1 |
| 44 | |
| 45 | # indicate the reset vector address can be programmed |
| 46 | PROGRAMMABLE_RESET_ADDRESS := 1 |
| 47 | |
| 48 | COLD_BOOT_SINGLE_CPU := 1 |
| 49 | |
| 50 | MACH_MT8195 := 1 |
| 51 | $(eval $(call add_define,MACH_MT8195)) |
| 52 | |
| 53 | include lib/coreboot/coreboot.mk |