Sandrine Bailleux | 798140d | 2014-07-17 16:06:39 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. |
| 3 | * |
| 4 | * Redistribution and use in source and binary forms, with or without |
| 5 | * modification, are permitted provided that the following conditions are met: |
| 6 | * |
| 7 | * Redistributions of source code must retain the above copyright notice, this |
| 8 | * list of conditions and the following disclaimer. |
| 9 | * |
| 10 | * Redistributions in binary form must reproduce the above copyright notice, |
| 11 | * this list of conditions and the following disclaimer in the documentation |
| 12 | * and/or other materials provided with the distribution. |
| 13 | * |
| 14 | * Neither the name of ARM nor the names of its contributors may be used |
| 15 | * to endorse or promote products derived from this software without specific |
| 16 | * prior written permission. |
| 17 | * |
| 18 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 19 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| 22 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 23 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 24 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 25 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 26 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 27 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 28 | * POSSIBILITY OF SUCH DAMAGE. |
| 29 | */ |
| 30 | |
| 31 | #include <arch_helpers.h> |
| 32 | #include <assert.h> |
| 33 | #include <bl_common.h> |
| 34 | #include <console.h> |
| 35 | #include <debug.h> |
| 36 | #include <platform.h> |
| 37 | #include <platform_def.h> |
| 38 | #include <string.h> |
| 39 | #include "juno_def.h" |
| 40 | #include "juno_private.h" |
| 41 | #include "scp_bootloader.h" |
| 42 | |
| 43 | /******************************************************************************* |
| 44 | * Declarations of linker defined symbols which will help us find the layout |
| 45 | * of trusted RAM |
| 46 | ******************************************************************************/ |
| 47 | extern unsigned long __RO_START__; |
| 48 | extern unsigned long __RO_END__; |
| 49 | |
Soby Mathew | 2ae2043 | 2015-01-08 18:02:44 +0000 | [diff] [blame] | 50 | #if USE_COHERENT_MEM |
Sandrine Bailleux | 798140d | 2014-07-17 16:06:39 +0100 | [diff] [blame] | 51 | extern unsigned long __COHERENT_RAM_START__; |
| 52 | extern unsigned long __COHERENT_RAM_END__; |
Soby Mathew | 2ae2043 | 2015-01-08 18:02:44 +0000 | [diff] [blame] | 53 | #endif |
Sandrine Bailleux | 798140d | 2014-07-17 16:06:39 +0100 | [diff] [blame] | 54 | |
| 55 | /* |
| 56 | * The next 2 constants identify the extents of the code & RO data region. |
| 57 | * These addresses are used by the MMU setup code and therefore they must be |
| 58 | * page-aligned. It is the responsibility of the linker script to ensure that |
| 59 | * __RO_START__ and __RO_END__ linker symbols refer to page-aligned addresses. |
| 60 | */ |
| 61 | #define BL2_RO_BASE (unsigned long)(&__RO_START__) |
| 62 | #define BL2_RO_LIMIT (unsigned long)(&__RO_END__) |
| 63 | |
Soby Mathew | 2ae2043 | 2015-01-08 18:02:44 +0000 | [diff] [blame] | 64 | #if USE_COHERENT_MEM |
Sandrine Bailleux | 798140d | 2014-07-17 16:06:39 +0100 | [diff] [blame] | 65 | /* |
| 66 | * The next 2 constants identify the extents of the coherent memory region. |
| 67 | * These addresses are used by the MMU setup code and therefore they must be |
| 68 | * page-aligned. It is the responsibility of the linker script to ensure that |
| 69 | * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to |
| 70 | * page-aligned addresses. |
| 71 | */ |
| 72 | #define BL2_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__) |
| 73 | #define BL2_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__) |
Soby Mathew | 2ae2043 | 2015-01-08 18:02:44 +0000 | [diff] [blame] | 74 | #endif |
Sandrine Bailleux | 798140d | 2014-07-17 16:06:39 +0100 | [diff] [blame] | 75 | |
| 76 | /* Data structure which holds the extents of the trusted RAM for BL2 */ |
| 77 | static meminfo_t bl2_tzram_layout |
Soby Mathew | 2ae2043 | 2015-01-08 18:02:44 +0000 | [diff] [blame] | 78 | __attribute__ ((aligned(PLATFORM_CACHE_LINE_SIZE))); |
Sandrine Bailleux | 798140d | 2014-07-17 16:06:39 +0100 | [diff] [blame] | 79 | |
| 80 | /******************************************************************************* |
| 81 | * Structure which holds the arguments which need to be passed to BL3-1 |
| 82 | ******************************************************************************/ |
| 83 | static bl2_to_bl31_params_mem_t bl31_params_mem; |
| 84 | |
| 85 | meminfo_t *bl2_plat_sec_mem_layout(void) |
| 86 | { |
| 87 | return &bl2_tzram_layout; |
| 88 | } |
| 89 | |
| 90 | /******************************************************************************* |
| 91 | * This function assigns a pointer to the memory that the platform has kept |
| 92 | * aside to pass platform specific and trusted firmware related information |
| 93 | * to BL31. This memory is allocated by allocating memory to |
| 94 | * bl2_to_bl31_params_mem_t structure which is a superset of all the |
| 95 | * structure whose information is passed to BL31 |
| 96 | * NOTE: This function should be called only once and should be done |
| 97 | * before generating params to BL31 |
| 98 | ******************************************************************************/ |
| 99 | bl31_params_t *bl2_plat_get_bl31_params(void) |
| 100 | { |
| 101 | bl31_params_t *bl2_to_bl31_params; |
| 102 | |
| 103 | /* |
| 104 | * Initialise the memory for all the arguments that needs to |
| 105 | * be passed to BL3-1 |
| 106 | */ |
| 107 | memset(&bl31_params_mem, 0, sizeof(bl2_to_bl31_params_mem_t)); |
| 108 | |
| 109 | /* Assign memory for TF related information */ |
| 110 | bl2_to_bl31_params = &bl31_params_mem.bl31_params; |
| 111 | SET_PARAM_HEAD(bl2_to_bl31_params, PARAM_BL31, VERSION_1, 0); |
| 112 | |
| 113 | /* Fill BL3-1 related information */ |
| 114 | bl2_to_bl31_params->bl31_image_info = &bl31_params_mem.bl31_image_info; |
| 115 | SET_PARAM_HEAD(bl2_to_bl31_params->bl31_image_info, PARAM_IMAGE_BINARY, |
| 116 | VERSION_1, 0); |
| 117 | |
| 118 | /* Fill BL3-2 related information if it exists */ |
| 119 | #if BL32_BASE |
| 120 | bl2_to_bl31_params->bl32_ep_info = &bl31_params_mem.bl32_ep_info; |
| 121 | SET_PARAM_HEAD(bl2_to_bl31_params->bl32_ep_info, PARAM_EP, |
| 122 | VERSION_1, 0); |
| 123 | bl2_to_bl31_params->bl32_image_info = &bl31_params_mem.bl32_image_info; |
| 124 | SET_PARAM_HEAD(bl2_to_bl31_params->bl32_image_info, PARAM_IMAGE_BINARY, |
| 125 | VERSION_1, 0); |
| 126 | #endif |
| 127 | |
| 128 | /* Fill BL3-3 related information */ |
| 129 | bl2_to_bl31_params->bl33_ep_info = &bl31_params_mem.bl33_ep_info; |
| 130 | SET_PARAM_HEAD(bl2_to_bl31_params->bl33_ep_info, |
| 131 | PARAM_EP, VERSION_1, 0); |
| 132 | |
| 133 | /* BL3-3 expects to receive the primary CPU MPID (through x0) */ |
Juan Castillo | 21b0419 | 2014-08-12 17:24:30 +0100 | [diff] [blame] | 134 | bl2_to_bl31_params->bl33_ep_info->args.arg0 = 0xffff & read_mpidr(); |
Sandrine Bailleux | 798140d | 2014-07-17 16:06:39 +0100 | [diff] [blame] | 135 | |
| 136 | bl2_to_bl31_params->bl33_image_info = &bl31_params_mem.bl33_image_info; |
| 137 | SET_PARAM_HEAD(bl2_to_bl31_params->bl33_image_info, PARAM_IMAGE_BINARY, |
| 138 | VERSION_1, 0); |
| 139 | |
| 140 | return bl2_to_bl31_params; |
| 141 | } |
| 142 | |
| 143 | /******************************************************************************* |
| 144 | * This function returns a pointer to the shared memory that the platform |
| 145 | * has kept to point to entry point information of BL31 to BL2 |
| 146 | ******************************************************************************/ |
| 147 | struct entry_point_info *bl2_plat_get_bl31_ep_info(void) |
| 148 | { |
| 149 | #if DEBUG |
| 150 | bl31_params_mem.bl31_ep_info.args.arg1 = JUNO_BL31_PLAT_PARAM_VAL; |
| 151 | #endif |
| 152 | |
| 153 | return &bl31_params_mem.bl31_ep_info; |
| 154 | } |
| 155 | |
| 156 | /******************************************************************************* |
| 157 | * BL1 has passed the extents of the trusted RAM that should be visible to BL2 |
| 158 | * in x0. This memory layout is sitting at the base of the free trusted RAM. |
| 159 | * Copy it to a safe loaction before its reclaimed by later BL2 functionality. |
| 160 | ******************************************************************************/ |
| 161 | void bl2_early_platform_setup(meminfo_t *mem_layout) |
| 162 | { |
| 163 | /* Initialize the console to provide early debug support */ |
Soby Mathew | f797cea | 2014-08-21 15:20:27 +0100 | [diff] [blame] | 164 | console_init(PL011_UART2_BASE, PL011_UART2_CLK_IN_HZ, PL011_BAUDRATE); |
Sandrine Bailleux | 798140d | 2014-07-17 16:06:39 +0100 | [diff] [blame] | 165 | |
| 166 | /* Setup the BL2 memory layout */ |
| 167 | bl2_tzram_layout = *mem_layout; |
Juan Castillo | 6b672f5 | 2014-09-04 14:43:09 +0100 | [diff] [blame] | 168 | |
| 169 | /* Initialise the IO layer and register platform IO devices */ |
| 170 | io_setup(); |
Sandrine Bailleux | 798140d | 2014-07-17 16:06:39 +0100 | [diff] [blame] | 171 | } |
| 172 | |
| 173 | /******************************************************************************* |
| 174 | * Perform platform specific setup, i.e. initialize the IO layer, load BL3-0 |
| 175 | * image and initialise the memory location to use for passing arguments to |
| 176 | * BL3-1. |
| 177 | ******************************************************************************/ |
| 178 | void bl2_platform_setup(void) |
| 179 | { |
Juan Castillo | 6b672f5 | 2014-09-04 14:43:09 +0100 | [diff] [blame] | 180 | /* Initialize the secure environment */ |
| 181 | plat_security_setup(); |
Sandrine Bailleux | 798140d | 2014-07-17 16:06:39 +0100 | [diff] [blame] | 182 | } |
| 183 | |
| 184 | /* Flush the TF params and the TF plat params */ |
| 185 | void bl2_plat_flush_bl31_params(void) |
| 186 | { |
| 187 | flush_dcache_range((unsigned long)&bl31_params_mem, |
| 188 | sizeof(bl2_to_bl31_params_mem_t)); |
| 189 | } |
| 190 | |
| 191 | /******************************************************************************* |
| 192 | * Perform the very early platform specific architectural setup here. At the |
| 193 | * moment this is only intializes the mmu in a quick and dirty way. |
| 194 | ******************************************************************************/ |
| 195 | void bl2_plat_arch_setup(void) |
| 196 | { |
| 197 | configure_mmu_el1(bl2_tzram_layout.total_base, |
| 198 | bl2_tzram_layout.total_size, |
| 199 | BL2_RO_BASE, |
Soby Mathew | 2ae2043 | 2015-01-08 18:02:44 +0000 | [diff] [blame] | 200 | BL2_RO_LIMIT |
| 201 | #if USE_COHERENT_MEM |
| 202 | , BL2_COHERENT_RAM_BASE, |
| 203 | BL2_COHERENT_RAM_LIMIT |
| 204 | #endif |
| 205 | ); |
Sandrine Bailleux | 798140d | 2014-07-17 16:06:39 +0100 | [diff] [blame] | 206 | } |
| 207 | |
| 208 | /******************************************************************************* |
| 209 | * Populate the extents of memory available for loading BL3-0, i.e. anywhere |
| 210 | * in trusted RAM as long as it doesn't overwrite BL2. |
| 211 | ******************************************************************************/ |
| 212 | void bl2_plat_get_bl30_meminfo(meminfo_t *bl30_meminfo) |
| 213 | { |
| 214 | *bl30_meminfo = bl2_tzram_layout; |
| 215 | } |
| 216 | |
| 217 | /******************************************************************************* |
| 218 | * Transfer BL3-0 from Trusted RAM using the SCP Download protocol. |
| 219 | * Return 0 on success, -1 otherwise. |
| 220 | ******************************************************************************/ |
| 221 | int bl2_plat_handle_bl30(image_info_t *bl30_image_info) |
| 222 | { |
| 223 | int ret; |
| 224 | |
| 225 | ret = scp_bootloader_transfer((void *)bl30_image_info->image_base, |
| 226 | bl30_image_info->image_size); |
| 227 | |
| 228 | if (ret == 0) |
| 229 | INFO("BL2: BL3-0 transferred to SCP\n\r"); |
| 230 | else |
| 231 | ERROR("BL2: BL3-0 transfer failure\n\r"); |
| 232 | |
| 233 | return ret; |
| 234 | } |
| 235 | |
| 236 | /******************************************************************************* |
| 237 | * Before calling this function BL31 is loaded in memory and its entrypoint |
| 238 | * is set by load_image. This is a placeholder for the platform to change |
| 239 | * the entrypoint of BL31 and set SPSR and security state. |
| 240 | * On Juno we are only setting the security state, entrypoint |
| 241 | ******************************************************************************/ |
| 242 | void bl2_plat_set_bl31_ep_info(image_info_t *bl31_image_info, |
| 243 | entry_point_info_t *bl31_ep_info) |
| 244 | { |
| 245 | SET_SECURITY_STATE(bl31_ep_info->h.attr, SECURE); |
| 246 | bl31_ep_info->spsr = SPSR_64(MODE_EL3, MODE_SP_ELX, |
| 247 | DISABLE_ALL_EXCEPTIONS); |
| 248 | } |
| 249 | |
| 250 | |
| 251 | /******************************************************************************* |
| 252 | * Before calling this function BL32 is loaded in memory and its entrypoint |
| 253 | * is set by load_image. This is a placeholder for the platform to change |
| 254 | * the entrypoint of BL32 and set SPSR and security state. |
| 255 | * On Juno we are only setting the security state, entrypoint |
| 256 | ******************************************************************************/ |
| 257 | void bl2_plat_set_bl32_ep_info(image_info_t *bl32_image_info, |
| 258 | entry_point_info_t *bl32_ep_info) |
| 259 | { |
| 260 | SET_SECURITY_STATE(bl32_ep_info->h.attr, SECURE); |
| 261 | /* |
| 262 | * The Secure Payload Dispatcher service is responsible for |
| 263 | * setting the SPSR prior to entry into the BL32 image. |
| 264 | */ |
| 265 | bl32_ep_info->spsr = 0; |
| 266 | } |
| 267 | |
| 268 | /******************************************************************************* |
| 269 | * Before calling this function BL33 is loaded in memory and its entrypoint |
| 270 | * is set by load_image. This is a placeholder for the platform to change |
| 271 | * the entrypoint of BL33 and set SPSR and security state. |
| 272 | * On Juno we are only setting the security state, entrypoint |
| 273 | ******************************************************************************/ |
| 274 | void bl2_plat_set_bl33_ep_info(image_info_t *image, |
| 275 | entry_point_info_t *bl33_ep_info) |
| 276 | { |
| 277 | unsigned long el_status; |
| 278 | unsigned int mode; |
| 279 | |
| 280 | /* Figure out what mode we enter the non-secure world in */ |
| 281 | el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; |
| 282 | el_status &= ID_AA64PFR0_ELX_MASK; |
| 283 | |
| 284 | if (el_status) |
| 285 | mode = MODE_EL2; |
| 286 | else |
| 287 | mode = MODE_EL1; |
| 288 | |
| 289 | /* |
| 290 | * TODO: Consider the possibility of specifying the SPSR in |
| 291 | * the FIP ToC and allowing the platform to have a say as |
| 292 | * well. |
| 293 | */ |
| 294 | bl33_ep_info->spsr = SPSR_64(mode, MODE_SP_ELX, |
| 295 | DISABLE_ALL_EXCEPTIONS); |
| 296 | SET_SECURITY_STATE(bl33_ep_info->h.attr, NON_SECURE); |
| 297 | } |
| 298 | |
| 299 | /******************************************************************************* |
| 300 | * Populate the extents of memory available for loading BL3-2 |
| 301 | ******************************************************************************/ |
| 302 | void bl2_plat_get_bl32_meminfo(meminfo_t *bl32_meminfo) |
| 303 | { |
| 304 | /* |
| 305 | * Populate the extents of memory available for loading BL3-2. |
| 306 | */ |
| 307 | bl32_meminfo->total_base = BL32_BASE; |
| 308 | bl32_meminfo->free_base = BL32_BASE; |
| 309 | bl32_meminfo->total_size = |
| 310 | (TSP_SEC_MEM_BASE + TSP_SEC_MEM_SIZE) - BL32_BASE; |
| 311 | bl32_meminfo->free_size = |
| 312 | (TSP_SEC_MEM_BASE + TSP_SEC_MEM_SIZE) - BL32_BASE; |
| 313 | } |
| 314 | |
| 315 | |
| 316 | /******************************************************************************* |
| 317 | * Populate the extents of memory available for loading BL3-3 |
| 318 | ******************************************************************************/ |
| 319 | void bl2_plat_get_bl33_meminfo(meminfo_t *bl33_meminfo) |
| 320 | { |
Juan Castillo | 921b877 | 2014-09-05 17:29:38 +0100 | [diff] [blame] | 321 | bl33_meminfo->total_base = DRAM_NS_BASE; |
| 322 | bl33_meminfo->total_size = DRAM_NS_SIZE; |
| 323 | bl33_meminfo->free_base = DRAM_NS_BASE; |
| 324 | bl33_meminfo->free_size = DRAM_NS_SIZE; |
Sandrine Bailleux | 798140d | 2014-07-17 16:06:39 +0100 | [diff] [blame] | 325 | } |