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Sandrine Bailleux798140d2014-07-17 16:06:39 +01001/*
2 * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
30
31#include <arch_helpers.h>
32#include <assert.h>
33#include <bl_common.h>
34#include <console.h>
35#include <debug.h>
36#include <platform.h>
37#include <platform_def.h>
38#include <string.h>
39#include "juno_def.h"
40#include "juno_private.h"
41#include "scp_bootloader.h"
42
43/*******************************************************************************
44 * Declarations of linker defined symbols which will help us find the layout
45 * of trusted RAM
46 ******************************************************************************/
47extern unsigned long __RO_START__;
48extern unsigned long __RO_END__;
49
50extern unsigned long __COHERENT_RAM_START__;
51extern unsigned long __COHERENT_RAM_END__;
52
53/*
54 * The next 2 constants identify the extents of the code & RO data region.
55 * These addresses are used by the MMU setup code and therefore they must be
56 * page-aligned. It is the responsibility of the linker script to ensure that
57 * __RO_START__ and __RO_END__ linker symbols refer to page-aligned addresses.
58 */
59#define BL2_RO_BASE (unsigned long)(&__RO_START__)
60#define BL2_RO_LIMIT (unsigned long)(&__RO_END__)
61
62/*
63 * The next 2 constants identify the extents of the coherent memory region.
64 * These addresses are used by the MMU setup code and therefore they must be
65 * page-aligned. It is the responsibility of the linker script to ensure that
66 * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to
67 * page-aligned addresses.
68 */
69#define BL2_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__)
70#define BL2_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__)
71
72/* Data structure which holds the extents of the trusted RAM for BL2 */
73static meminfo_t bl2_tzram_layout
74__attribute__ ((aligned(PLATFORM_CACHE_LINE_SIZE),
75 section("tzfw_coherent_mem")));
76
77/*******************************************************************************
78 * Structure which holds the arguments which need to be passed to BL3-1
79 ******************************************************************************/
80static bl2_to_bl31_params_mem_t bl31_params_mem;
81
82meminfo_t *bl2_plat_sec_mem_layout(void)
83{
84 return &bl2_tzram_layout;
85}
86
87/*******************************************************************************
88 * This function assigns a pointer to the memory that the platform has kept
89 * aside to pass platform specific and trusted firmware related information
90 * to BL31. This memory is allocated by allocating memory to
91 * bl2_to_bl31_params_mem_t structure which is a superset of all the
92 * structure whose information is passed to BL31
93 * NOTE: This function should be called only once and should be done
94 * before generating params to BL31
95 ******************************************************************************/
96bl31_params_t *bl2_plat_get_bl31_params(void)
97{
98 bl31_params_t *bl2_to_bl31_params;
99
100 /*
101 * Initialise the memory for all the arguments that needs to
102 * be passed to BL3-1
103 */
104 memset(&bl31_params_mem, 0, sizeof(bl2_to_bl31_params_mem_t));
105
106 /* Assign memory for TF related information */
107 bl2_to_bl31_params = &bl31_params_mem.bl31_params;
108 SET_PARAM_HEAD(bl2_to_bl31_params, PARAM_BL31, VERSION_1, 0);
109
110 /* Fill BL3-1 related information */
111 bl2_to_bl31_params->bl31_image_info = &bl31_params_mem.bl31_image_info;
112 SET_PARAM_HEAD(bl2_to_bl31_params->bl31_image_info, PARAM_IMAGE_BINARY,
113 VERSION_1, 0);
114
115 /* Fill BL3-2 related information if it exists */
116#if BL32_BASE
117 bl2_to_bl31_params->bl32_ep_info = &bl31_params_mem.bl32_ep_info;
118 SET_PARAM_HEAD(bl2_to_bl31_params->bl32_ep_info, PARAM_EP,
119 VERSION_1, 0);
120 bl2_to_bl31_params->bl32_image_info = &bl31_params_mem.bl32_image_info;
121 SET_PARAM_HEAD(bl2_to_bl31_params->bl32_image_info, PARAM_IMAGE_BINARY,
122 VERSION_1, 0);
123#endif
124
125 /* Fill BL3-3 related information */
126 bl2_to_bl31_params->bl33_ep_info = &bl31_params_mem.bl33_ep_info;
127 SET_PARAM_HEAD(bl2_to_bl31_params->bl33_ep_info,
128 PARAM_EP, VERSION_1, 0);
129
130 /* BL3-3 expects to receive the primary CPU MPID (through x0) */
Juan Castillo21b04192014-08-12 17:24:30 +0100131 bl2_to_bl31_params->bl33_ep_info->args.arg0 = 0xffff & read_mpidr();
Sandrine Bailleux798140d2014-07-17 16:06:39 +0100132
133 bl2_to_bl31_params->bl33_image_info = &bl31_params_mem.bl33_image_info;
134 SET_PARAM_HEAD(bl2_to_bl31_params->bl33_image_info, PARAM_IMAGE_BINARY,
135 VERSION_1, 0);
136
137 return bl2_to_bl31_params;
138}
139
140/*******************************************************************************
141 * This function returns a pointer to the shared memory that the platform
142 * has kept to point to entry point information of BL31 to BL2
143 ******************************************************************************/
144struct entry_point_info *bl2_plat_get_bl31_ep_info(void)
145{
146#if DEBUG
147 bl31_params_mem.bl31_ep_info.args.arg1 = JUNO_BL31_PLAT_PARAM_VAL;
148#endif
149
150 return &bl31_params_mem.bl31_ep_info;
151}
152
153/*******************************************************************************
154 * BL1 has passed the extents of the trusted RAM that should be visible to BL2
155 * in x0. This memory layout is sitting at the base of the free trusted RAM.
156 * Copy it to a safe loaction before its reclaimed by later BL2 functionality.
157 ******************************************************************************/
158void bl2_early_platform_setup(meminfo_t *mem_layout)
159{
160 /* Initialize the console to provide early debug support */
161 console_init(PL011_UART0_BASE, PL011_UART0_CLK_IN_HZ, PL011_BAUDRATE);
162
163 /* Setup the BL2 memory layout */
164 bl2_tzram_layout = *mem_layout;
165}
166
167/*******************************************************************************
168 * Perform platform specific setup, i.e. initialize the IO layer, load BL3-0
169 * image and initialise the memory location to use for passing arguments to
170 * BL3-1.
171 ******************************************************************************/
172void bl2_platform_setup(void)
173{
174 /* Initialise the IO layer and register platform IO devices */
175 io_setup();
176}
177
178/* Flush the TF params and the TF plat params */
179void bl2_plat_flush_bl31_params(void)
180{
181 flush_dcache_range((unsigned long)&bl31_params_mem,
182 sizeof(bl2_to_bl31_params_mem_t));
183}
184
185/*******************************************************************************
186 * Perform the very early platform specific architectural setup here. At the
187 * moment this is only intializes the mmu in a quick and dirty way.
188 ******************************************************************************/
189void bl2_plat_arch_setup(void)
190{
191 configure_mmu_el1(bl2_tzram_layout.total_base,
192 bl2_tzram_layout.total_size,
193 BL2_RO_BASE,
194 BL2_RO_LIMIT,
195 BL2_COHERENT_RAM_BASE,
196 BL2_COHERENT_RAM_LIMIT);
197}
198
199/*******************************************************************************
200 * Populate the extents of memory available for loading BL3-0, i.e. anywhere
201 * in trusted RAM as long as it doesn't overwrite BL2.
202 ******************************************************************************/
203void bl2_plat_get_bl30_meminfo(meminfo_t *bl30_meminfo)
204{
205 *bl30_meminfo = bl2_tzram_layout;
206}
207
208/*******************************************************************************
209 * Transfer BL3-0 from Trusted RAM using the SCP Download protocol.
210 * Return 0 on success, -1 otherwise.
211 ******************************************************************************/
212int bl2_plat_handle_bl30(image_info_t *bl30_image_info)
213{
214 int ret;
215
216 ret = scp_bootloader_transfer((void *)bl30_image_info->image_base,
217 bl30_image_info->image_size);
218
219 if (ret == 0)
220 INFO("BL2: BL3-0 transferred to SCP\n\r");
221 else
222 ERROR("BL2: BL3-0 transfer failure\n\r");
223
224 return ret;
225}
226
227/*******************************************************************************
228 * Before calling this function BL31 is loaded in memory and its entrypoint
229 * is set by load_image. This is a placeholder for the platform to change
230 * the entrypoint of BL31 and set SPSR and security state.
231 * On Juno we are only setting the security state, entrypoint
232 ******************************************************************************/
233void bl2_plat_set_bl31_ep_info(image_info_t *bl31_image_info,
234 entry_point_info_t *bl31_ep_info)
235{
236 SET_SECURITY_STATE(bl31_ep_info->h.attr, SECURE);
237 bl31_ep_info->spsr = SPSR_64(MODE_EL3, MODE_SP_ELX,
238 DISABLE_ALL_EXCEPTIONS);
239}
240
241
242/*******************************************************************************
243 * Before calling this function BL32 is loaded in memory and its entrypoint
244 * is set by load_image. This is a placeholder for the platform to change
245 * the entrypoint of BL32 and set SPSR and security state.
246 * On Juno we are only setting the security state, entrypoint
247 ******************************************************************************/
248void bl2_plat_set_bl32_ep_info(image_info_t *bl32_image_info,
249 entry_point_info_t *bl32_ep_info)
250{
251 SET_SECURITY_STATE(bl32_ep_info->h.attr, SECURE);
252 /*
253 * The Secure Payload Dispatcher service is responsible for
254 * setting the SPSR prior to entry into the BL32 image.
255 */
256 bl32_ep_info->spsr = 0;
257}
258
259/*******************************************************************************
260 * Before calling this function BL33 is loaded in memory and its entrypoint
261 * is set by load_image. This is a placeholder for the platform to change
262 * the entrypoint of BL33 and set SPSR and security state.
263 * On Juno we are only setting the security state, entrypoint
264 ******************************************************************************/
265void bl2_plat_set_bl33_ep_info(image_info_t *image,
266 entry_point_info_t *bl33_ep_info)
267{
268 unsigned long el_status;
269 unsigned int mode;
270
271 /* Figure out what mode we enter the non-secure world in */
272 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT;
273 el_status &= ID_AA64PFR0_ELX_MASK;
274
275 if (el_status)
276 mode = MODE_EL2;
277 else
278 mode = MODE_EL1;
279
280 /*
281 * TODO: Consider the possibility of specifying the SPSR in
282 * the FIP ToC and allowing the platform to have a say as
283 * well.
284 */
285 bl33_ep_info->spsr = SPSR_64(mode, MODE_SP_ELX,
286 DISABLE_ALL_EXCEPTIONS);
287 SET_SECURITY_STATE(bl33_ep_info->h.attr, NON_SECURE);
288}
289
290/*******************************************************************************
291 * Populate the extents of memory available for loading BL3-2
292 ******************************************************************************/
293void bl2_plat_get_bl32_meminfo(meminfo_t *bl32_meminfo)
294{
295 /*
296 * Populate the extents of memory available for loading BL3-2.
297 */
298 bl32_meminfo->total_base = BL32_BASE;
299 bl32_meminfo->free_base = BL32_BASE;
300 bl32_meminfo->total_size =
301 (TSP_SEC_MEM_BASE + TSP_SEC_MEM_SIZE) - BL32_BASE;
302 bl32_meminfo->free_size =
303 (TSP_SEC_MEM_BASE + TSP_SEC_MEM_SIZE) - BL32_BASE;
304}
305
306
307/*******************************************************************************
308 * Populate the extents of memory available for loading BL3-3
309 ******************************************************************************/
310void bl2_plat_get_bl33_meminfo(meminfo_t *bl33_meminfo)
311{
312 bl33_meminfo->total_base = DRAM_BASE;
313 bl33_meminfo->total_size = DRAM_SIZE;
314 bl33_meminfo->free_base = DRAM_BASE;
315 bl33_meminfo->free_size = DRAM_SIZE;
316}