Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 1 | /* |
Sandrine Bailleux | 4a1267a | 2016-05-18 16:11:47 +0100 | [diff] [blame] | 2 | * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved. |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 3 | * |
dp-arm | fa3cf0b | 2017-05-03 09:38:09 +0100 | [diff] [blame] | 4 | * SPDX-License-Identifier: BSD-3-Clause |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 5 | */ |
| 6 | #include <arm_def.h> |
| 7 | #include <plat_arm.h> |
| 8 | |
| 9 | /* |
Sandrine Bailleux | 4a1267a | 2016-05-18 16:11:47 +0100 | [diff] [blame] | 10 | * Table of memory regions for different BL stages to map using the MMU. |
| 11 | * This doesn't include Trusted SRAM as arm_setup_page_tables() already |
| 12 | * takes care of mapping it. |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 13 | */ |
Masahiro Yamada | 441bfdd | 2016-12-25 23:36:24 +0900 | [diff] [blame] | 14 | #ifdef IMAGE_BL1 |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 15 | const mmap_region_t plat_arm_mmap[] = { |
| 16 | ARM_MAP_SHARED_RAM, |
Juan Castillo | b6132f1 | 2015-10-06 14:01:35 +0100 | [diff] [blame] | 17 | V2M_MAP_FLASH0_RO, |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 18 | V2M_MAP_IOFPGA, |
| 19 | CSS_MAP_DEVICE, |
| 20 | SOC_CSS_MAP_DEVICE, |
Yatharth Kochar | 736a3bf | 2015-10-11 14:14:55 +0100 | [diff] [blame] | 21 | #if TRUSTED_BOARD_BOOT |
Sandrine Bailleux | d9160a5 | 2017-05-26 15:48:10 +0100 | [diff] [blame] | 22 | /* Map DRAM to authenticate NS_BL2U image. */ |
Yatharth Kochar | 736a3bf | 2015-10-11 14:14:55 +0100 | [diff] [blame] | 23 | ARM_MAP_NS_DRAM1, |
| 24 | #endif |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 25 | {0} |
| 26 | }; |
| 27 | #endif |
Masahiro Yamada | 441bfdd | 2016-12-25 23:36:24 +0900 | [diff] [blame] | 28 | #ifdef IMAGE_BL2 |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 29 | const mmap_region_t plat_arm_mmap[] = { |
| 30 | ARM_MAP_SHARED_RAM, |
Juan Castillo | b6132f1 | 2015-10-06 14:01:35 +0100 | [diff] [blame] | 31 | V2M_MAP_FLASH0_RO, |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 32 | V2M_MAP_IOFPGA, |
| 33 | CSS_MAP_DEVICE, |
| 34 | SOC_CSS_MAP_DEVICE, |
| 35 | ARM_MAP_NS_DRAM1, |
| 36 | ARM_MAP_TSP_SEC_MEM, |
| 37 | {0} |
| 38 | }; |
| 39 | #endif |
Masahiro Yamada | 441bfdd | 2016-12-25 23:36:24 +0900 | [diff] [blame] | 40 | #ifdef IMAGE_BL2U |
Yatharth Kochar | 3a11eda | 2015-10-14 15:28:11 +0100 | [diff] [blame] | 41 | const mmap_region_t plat_arm_mmap[] = { |
| 42 | ARM_MAP_SHARED_RAM, |
| 43 | CSS_MAP_DEVICE, |
| 44 | SOC_CSS_MAP_DEVICE, |
| 45 | {0} |
| 46 | }; |
| 47 | #endif |
Masahiro Yamada | 441bfdd | 2016-12-25 23:36:24 +0900 | [diff] [blame] | 48 | #ifdef IMAGE_BL31 |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 49 | const mmap_region_t plat_arm_mmap[] = { |
| 50 | ARM_MAP_SHARED_RAM, |
| 51 | V2M_MAP_IOFPGA, |
| 52 | CSS_MAP_DEVICE, |
Soby Mathew | cbafd7a | 2016-11-14 12:44:32 +0000 | [diff] [blame] | 53 | #if CSS_USE_SCMI_DRIVER |
| 54 | /* |
| 55 | * The SCMI payload area is currently in the Non Secure SRAM. This is |
| 56 | * a potential security risk but this will be resolved once SCP |
| 57 | * completely replaces SCPI with SCMI as the only communication |
| 58 | * protocol. |
| 59 | */ |
| 60 | CSS_MAP_NSRAM, |
| 61 | #endif |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 62 | SOC_CSS_MAP_DEVICE, |
| 63 | {0} |
| 64 | }; |
| 65 | #endif |
Masahiro Yamada | 441bfdd | 2016-12-25 23:36:24 +0900 | [diff] [blame] | 66 | #ifdef IMAGE_BL32 |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 67 | const mmap_region_t plat_arm_mmap[] = { |
Yatharth Kochar | 2694cba | 2016-11-14 12:00:41 +0000 | [diff] [blame] | 68 | #ifdef AARCH32 |
| 69 | ARM_MAP_SHARED_RAM, |
| 70 | #endif |
Dan Handley | 9df4804 | 2015-03-19 18:58:55 +0000 | [diff] [blame] | 71 | V2M_MAP_IOFPGA, |
| 72 | CSS_MAP_DEVICE, |
| 73 | SOC_CSS_MAP_DEVICE, |
| 74 | {0} |
| 75 | }; |
| 76 | #endif |
| 77 | |
| 78 | ARM_CASSERT_MMAP |
| 79 | |