plat: fix switch statements to comply with MISRA rules
Ensure (where possible) that switch statements in plat comply with MISRA
rules 16.1 - 16.7.
Change-Id: Ie4a7d2fd10f6141c0cfb89317ea28a755391622f
Signed-off-by: Jonathan Wright <jonathan.wright@arm.com>
diff --git a/plat/rockchip/rk3399/drivers/pmu/pmu.c b/plat/rockchip/rk3399/drivers/pmu/pmu.c
index caea7a7..ed1ea8b 100644
--- a/plat/rockchip/rk3399/drivers/pmu/pmu.c
+++ b/plat/rockchip/rk3399/drivers/pmu/pmu.c
@@ -310,6 +310,7 @@
pmu_bus_idle_req(BUS_ID_PERIHP, state);
break;
default:
+ /* Do nothing in default case */
break;
}
@@ -647,12 +648,8 @@
int rockchip_soc_hlvl_pwr_dm_off(uint32_t lvl,
plat_local_state_t lvl_state)
{
- switch (lvl) {
- case MPIDR_AFFLVL1:
+ if (lvl == MPIDR_AFFLVL1) {
clst_pwr_domain_suspend(lvl_state);
- break;
- default:
- break;
}
return PSCI_E_SUCCESS;
@@ -675,12 +672,8 @@
int rockchip_soc_hlvl_pwr_dm_suspend(uint32_t lvl, plat_local_state_t lvl_state)
{
- switch (lvl) {
- case MPIDR_AFFLVL1:
+ if (lvl == MPIDR_AFFLVL1) {
clst_pwr_domain_suspend(lvl_state);
- break;
- default:
- break;
}
return PSCI_E_SUCCESS;
@@ -698,12 +691,8 @@
int rockchip_soc_hlvl_pwr_dm_on_finish(uint32_t lvl,
plat_local_state_t lvl_state)
{
- switch (lvl) {
- case MPIDR_AFFLVL1:
+ if (lvl == MPIDR_AFFLVL1) {
clst_pwr_domain_resume(lvl_state);
- break;
- default:
- break;
}
return PSCI_E_SUCCESS;
@@ -721,11 +710,8 @@
int rockchip_soc_hlvl_pwr_dm_resume(uint32_t lvl, plat_local_state_t lvl_state)
{
- switch (lvl) {
- case MPIDR_AFFLVL1:
+ if (lvl == MPIDR_AFFLVL1) {
clst_pwr_domain_resume(lvl_state);
- default:
- break;
}
return PSCI_E_SUCCESS;