blob: dae8997af885027e003edd806ae250e8af40b570 [file] [log] [blame]
developer4f0d2ba2023-08-21 17:33:25 +08001--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
2+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
developerb1fa7b92023-11-14 19:15:35 +08003@@ -1843,6 +1843,12 @@ static void mtk_tx_set_dma_desc_v3(struc
4
developerdca80e32023-10-19 16:24:46 +08005 trace_printk("[%s] skb_shinfo(skb)->nr_frags=%x HNAT_SKB_CB2(skb)->magic=%x txd4=%x<-----\n",
6 __func__, skb_shinfo(skb)->nr_frags, HNAT_SKB_CB2(skb)->magic, data);
developerb1fa7b92023-11-14 19:15:35 +08007+
developerdca80e32023-10-19 16:24:46 +08008+ /* forward to eip197 if this packet is going to encrypt */
9+ if (unlikely(skb_hnat_cdrt(skb) && is_magic_tag_valid(skb))) {
10+ data &= ((~TX_DMA_TPORT_MASK) << TX_DMA_TPORT_SHIFT);
11+ data |= (EIP197_QDMA_TPORT & TX_DMA_TPORT_MASK) << TX_DMA_TPORT_SHIFT;
12+ }
developerb1fa7b92023-11-14 19:15:35 +080013 #endif
developerdca80e32023-10-19 16:24:46 +080014 WRITE_ONCE(desc->txd4, data);
15
developerb1fa7b92023-11-14 19:15:35 +080016@@ -1866,6 +1872,17 @@ static void mtk_tx_set_dma_desc_v3(struc
developerdca80e32023-10-19 16:24:46 +080017
18 WRITE_ONCE(desc->txd7, 0);
19 WRITE_ONCE(desc->txd8, 0);
developerb1fa7b92023-11-14 19:15:35 +080020+
21+#if defined(CONFIG_NET_MEDIATEK_HNAT) || defined(CONFIG_NET_MEDIATEK_HNAT_MODULE)
developerdca80e32023-10-19 16:24:46 +080022+ if (unlikely(skb_hnat_cdrt(skb) && is_magic_tag_valid(skb))) {
23+ /* carry cdrt index for encryption */
24+ data = (skb_hnat_cdrt(skb) & TX_DMA_CDRT_MASK) << TX_DMA_CDRT_SHIFT;
25+ WRITE_ONCE(desc->txd8, data);
26+ skb_hnat_magic_tag(skb) = 0;
27+ } else {
28+ WRITE_ONCE(desc->txd8, 0);
29+ }
developerb1fa7b92023-11-14 19:15:35 +080030+#endif
developerdca80e32023-10-19 16:24:46 +080031 }
32
33 static void mtk_tx_set_dma_desc(struct sk_buff *skb, struct net_device *dev, void *txd,
developerb1fa7b92023-11-14 19:15:35 +080034@@ -2293,6 +2310,7 @@ static int mtk_poll_rx(struct napi_struc
developer4f0d2ba2023-08-21 17:33:25 +080035
36 skb_hnat_alg(skb) = 0;
37 skb_hnat_filled(skb) = 0;
38+ skb_hnat_set_cdrt(skb, 0);
39 skb_hnat_magic_tag(skb) = HNAT_MAGIC_TAG;
40 skb_hnat_set_tops(skb, 0);
41 skb_hnat_set_is_decap(skb, 0);
42--- a/drivers/net/ethernet/mediatek/mtk_hnat/hnat_nf_hook.c
43+++ b/drivers/net/ethernet/mediatek/mtk_hnat/hnat_nf_hook.c
developerb1fa7b92023-11-14 19:15:35 +080044@@ -1078,6 +1078,9 @@ static unsigned int hnat_ipv4_get_nextho
developer4f0d2ba2023-08-21 17:33:25 +080045 return 0;
46 }
47
48+ if (!skb_hnat_cdrt(skb) && dst && dst_xfrm(dst))
49+ return 0;
50+
51 rcu_read_lock_bh();
52 nexthop = (__force u32)rt_nexthop(rt, ip_hdr(skb)->daddr);
53 neigh = __ipv4_neigh_lookup_noref(dev, nexthop);
developerb1fa7b92023-11-14 19:15:35 +080054@@ -1301,6 +1304,9 @@ static inline void hnat_fill_offload_eng
developer4f0d2ba2023-08-21 17:33:25 +080055 */
56 entry->ipv4_hnapt.tport_id = NR_TDMA_QDMA_TPORT;
57 entry->ipv4_hnapt.tops_entry = skb_hnat_tops(skb);
58+ } else if (skb_hnat_cdrt(skb)) {
59+ entry->ipv4_hnapt.tport_id = NR_EIP197_QDMA_TPORT;
60+ entry->ipv4_hnapt.cdrt_id = skb_hnat_cdrt(skb);
61 } else {
62 return;
63 }
developerb1fa7b92023-11-14 19:15:35 +080064@@ -1310,6 +1316,75 @@ static inline void hnat_fill_offload_eng
developerdca80e32023-10-19 16:24:46 +080065 #endif /* defined(CONFIG_MEDIATEK_NETSYS_V3) */
66 }
developer4f0d2ba2023-08-21 17:33:25 +080067
developerdca80e32023-10-19 16:24:46 +080068+int hnat_bind_crypto_entry(struct sk_buff *skb, const struct net_device *dev) {
69+ struct foe_entry *foe;
70+ struct foe_entry entry = { 0 };
71+ struct ethhdr *eth = eth_hdr(skb);
72+ u32 gmac = NR_DISCARD;
73+
74+ if (skb_hnat_tops(skb) && mtk_tnl_encap_offload)
75+ mtk_tnl_encap_offload(skb);
76+
77+ foe = &hnat_priv->foe_table_cpu[skb_hnat_ppe(skb)][skb_hnat_entry(skb)];
78+
79+ hnat_get_filled_unbind_entry(skb, &entry);
80+ entry.bfib1.cah = 1;
81+ entry.bfib1.time_stamp = (hnat_priv->data->version == MTK_HNAT_V2 ||
82+ hnat_priv->data->version == MTK_HNAT_V3) ?
83+ readl(hnat_priv->fe_base + 0x0010) & (0xFF) :
84+ readl(hnat_priv->fe_base + 0x0010) & (0x7FFF);
85+ entry.ipv4_hnapt.iblk2.port_ag =
86+ (hnat_priv->data->version == MTK_HNAT_V2 ||
87+ hnat_priv->data->version == MTK_HNAT_V3) ? 0xf : 0x3f;
88+
89+ if (IS_LAN(dev)) {
90+ if (IS_BOND_MODE)
91+ gmac = ((skb_hnat_entry(skb) >> 1) % hnat_priv->gmac_num) ?
92+ NR_GMAC2_PORT : NR_GMAC1_PORT;
93+ else
94+ gmac = NR_GMAC1_PORT;
95+ } else if (IS_LAN2(dev)) {
96+ gmac = NR_GMAC2_PORT;
97+ } else if (IS_WAN(dev)) {
98+ gmac = (IS_GMAC1_MODE) ? NR_GMAC1_PORT : NR_GMAC2_PORT;
99+ } else {
100+ pr_notice("Unknown case of dp, iif=%x --> %s\n", skb_hnat_iface(skb), dev->name);
101+ return -1;
102+ }
103+
104+ entry.ipv4_hnapt.iblk2.mibf = 1;
105+ entry.ipv4_hnapt.iblk2.dp = gmac;
106+ entry.ipv4_hnapt.iblk2.port_mg =
107+ (hnat_priv->data->version == MTK_HNAT_V1_1) ? 0x3f : 0;
108+ entry.bfib1.ttl = 1;
109+ entry.bfib1.state = BIND;
110+
111+ hnat_fill_offload_engine_entry(skb, &entry, dev);
112+
113+ if (!skb_hnat_tops(skb)) {
114+ entry.ipv4_hnapt.dmac_hi = swab32(*((u32 *)eth->h_dest));
115+ entry.ipv4_hnapt.dmac_lo = swab16(*((u16 *)&eth->h_dest[4]));
116+ entry.ipv4_hnapt.smac_hi = swab32(*((u32 *)eth->h_source));
117+ entry.ipv4_hnapt.smac_lo = swab16(*((u16 *)&eth->h_source[4]));
118+ }
119+
120+ wmb();
121+
122+ if (entry_hnat_is_bound(foe))
123+ return 0;
124+
125+ memcpy(foe, &entry, sizeof(entry));
126+
127+ if (hnat_priv->data->per_flow_accounting &&
128+ skb_hnat_entry(skb) < hnat_priv->foe_etry_num &&
129+ skb_hnat_ppe(skb) < CFG_PPE_NUM)
130+ memset(&hnat_priv->acct[skb_hnat_ppe(skb)][skb_hnat_entry(skb)],
131+ 0, sizeof(struct mib_entry));
132+
133+ return 0;
134+}
135+EXPORT_SYMBOL(hnat_bind_crypto_entry);
136+
137 static unsigned int skb_to_hnat_info(struct sk_buff *skb,
138 const struct net_device *dev,
139 struct foe_entry *foe,
developerb1fa7b92023-11-14 19:15:35 +0800140@@ -2369,6 +2444,7 @@ int mtk_sw_nat_hook_rx(struct sk_buff *s
developer4f0d2ba2023-08-21 17:33:25 +0800141
142 skb_hnat_alg(skb) = 0;
143 skb_hnat_set_tops(skb, 0);
144+ skb_hnat_set_cdrt(skb, 0);
145 skb_hnat_magic_tag(skb) = HNAT_MAGIC_TAG;
146
147 if (skb_hnat_iface(skb) == FOE_MAGIC_WED0)
developerb1fa7b92023-11-14 19:15:35 +0800148@@ -2455,7 +2531,8 @@ static unsigned int mtk_hnat_accel_type(
developer4f0d2ba2023-08-21 17:33:25 +0800149 * is from local_out which is also filtered in sanity check.
150 */
151 dst = skb_dst(skb);
152- if (dst && dst_xfrm(dst))
153+ if (dst && dst_xfrm(dst)
154+ && (!mtk_crypto_offloadable || !mtk_crypto_offloadable(skb)))
155 return 0;
156
157 ct = nf_ct_get(skb, &ctinfo);
developerb1fa7b92023-11-14 19:15:35 +0800158@@ -2856,6 +2933,14 @@ static unsigned int mtk_hnat_nf_post_rou
developer5c851032023-09-04 11:13:18 +0800159 }
160 }
161
162+ /* we are not support protocols other than IPv4 TCP for crypto offload yet */
163+ if (skb_hnat_is_decrypt(skb)
164+ && (ntohs(skb->protocol) != ETH_P_IP
165+ || ip_hdr(skb)->protocol != IPPROTO_TCP)) {
166+ skb_hnat_alg(skb) = 1;
167+ return 0;
168+ }
169+
170 if (!IS_LAN_GRP(out) && !IS_WAN(out) && !IS_EXT(out))
171 is_virt_dev = true;
172
developerb1fa7b92023-11-14 19:15:35 +0800173@@ -3165,7 +3250,10 @@ mtk_hnat_ipv4_nf_local_out(void *priv, s
developer4f0d2ba2023-08-21 17:33:25 +0800174 if (iph->protocol == IPPROTO_IPV6) {
175 entry->udib1.pkt_type = IPV6_6RD;
176 hnat_set_head_frags(state, skb, 0, hnat_set_alg);
177- } else if (!skb_hnat_tops(skb)) {
178+ } else if (is_magic_tag_valid(skb)
179+ && (skb_hnat_cdrt(skb) || skb_hnat_tops(skb))) {
180+ hnat_set_head_frags(state, skb, 0, hnat_set_alg);
181+ } else {
182 hnat_set_head_frags(state, skb, 1, hnat_set_alg);
183 }
184
185--- a/drivers/net/ethernet/mediatek/mtk_hnat/nf_hnat_mtk.h
186+++ b/drivers/net/ethernet/mediatek/mtk_hnat/nf_hnat_mtk.h
187@@ -46,7 +46,8 @@ struct hnat_desc {
188 u32 amsdu : 1;
189 u32 tops : 6;
190 u32 is_decap : 1;
191- u32 resv3 : 12;
192+ u32 cdrt : 8;
193+ u32 resv3 : 4;
194 u32 magic_tag_protect : 16;
195 } __packed;
196 #elif defined(CONFIG_MEDIATEK_NETSYS_RX_V2)
197@@ -99,12 +100,16 @@ struct hnat_desc {
198 #define skb_hnat_is_encap(skb) (!skb_hnat_is_decap(skb))
199 #define skb_hnat_set_tops(skb, tops) ((skb_hnat_tops(skb)) = (tops))
200 #define skb_hnat_set_is_decap(skb, is_decap) ((skb_hnat_is_decap(skb)) = (is_decap))
201+#define skb_hnat_cdrt(skb) (((struct hnat_desc *)((skb)->head))->cdrt)
202+#define skb_hnat_set_cdrt(skb, cdrt) ((skb_hnat_cdrt(skb)) = (cdrt))
203 #else /* !defined(CONFIG_MEDIATEK_NETSYS_V3) */
204 #define skb_hnat_tops(skb) (0)
205 #define skb_hnat_is_decap(skb) (0)
206 #define skb_hnat_is_encap(skb) (0)
207 #define skb_hnat_set_tops(skb, tops)
208 #define skb_hnat_set_is_decap(skb, is_decap)
209+#define skb_hnat_cdrt(skb) (0)
210+#define skb_hnat_set_cdrt(skb, cdrt)
211 #endif /* defined(CONFIG_MEDIATEK_NETSYS_V3) */
212 #define skb_hnat_magic(skb) (((struct hnat_desc *)(skb->head))->magic)
213 #define skb_hnat_reason(skb) (((struct hnat_desc *)(skb->head))->crsn)
214--- a/drivers/net/ethernet/mediatek/mtk_hnat/hnat.c
215+++ b/drivers/net/ethernet/mediatek/mtk_hnat/hnat.c
216@@ -49,6 +49,8 @@ int (*mtk_tnl_decap_offload)(struct sk_b
217 EXPORT_SYMBOL(mtk_tnl_decap_offload);
218 bool (*mtk_tnl_decap_offloadable)(struct sk_buff *skb) = NULL;
219 EXPORT_SYMBOL(mtk_tnl_decap_offloadable);
220+bool (*mtk_crypto_offloadable)(struct sk_buff *skb) = NULL;
221+EXPORT_SYMBOL(mtk_crypto_offloadable);
222
223 static void hnat_sma_build_entry(struct timer_list *t)
224 {
225--- a/drivers/net/ethernet/mediatek/mtk_hnat/hnat.h
226+++ b/drivers/net/ethernet/mediatek/mtk_hnat/hnat.h
developerdca80e32023-10-19 16:24:46 +0800227@@ -1135,6 +1135,8 @@ enum FoeIpAct {
developer4f0d2ba2023-08-21 17:33:25 +0800228 #define NR_WDMA1_PORT 9
229 #define NR_WDMA2_PORT 13
230 #define NR_GMAC3_PORT 15
231+#define NR_EIP197_TPORT 2
232+#define NR_EIP197_QDMA_TPORT 3
233 #define NR_TDMA_TPORT 4
234 #define NR_TDMA_QDMA_TPORT 5
235 #define LAN_DEV_NAME hnat_priv->lan
developerb1fa7b92023-11-14 19:15:35 +0800236@@ -1289,6 +1291,8 @@ extern int qos_toggle;
developer4f0d2ba2023-08-21 17:33:25 +0800237 extern int (*mtk_tnl_encap_offload)(struct sk_buff *skb);
238 extern int (*mtk_tnl_decap_offload)(struct sk_buff *skb);
239 extern bool (*mtk_tnl_decap_offloadable)(struct sk_buff *skb);
240+extern bool (*mtk_crypto_offloadable)(struct sk_buff *skb);
developerdca80e32023-10-19 16:24:46 +0800241+extern int hnat_bind_crypto_entry(struct sk_buff *skb, const struct net_device *dev);
developer4f0d2ba2023-08-21 17:33:25 +0800242
243 int ext_if_add(struct extdev_entry *ext_entry);
244 int ext_if_del(struct extdev_entry *ext_entry);
developerdca80e32023-10-19 16:24:46 +0800245--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
246+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
developerb1fa7b92023-11-14 19:15:35 +0800247@@ -558,6 +558,10 @@
developerdca80e32023-10-19 16:24:46 +0800248
249 #define MTK_QDMA_GMAC2_QID 8
250
251+/* QDMA V2 descriptor txd8 */
252+#define TX_DMA_CDRT_SHIFT 0
253+#define TX_DMA_CDRT_MASK 0xff
254+
255 /* QDMA V2 descriptor txd6 */
256 #define TX_DMA_INS_VLAN_V2 BIT(16)
257
developerb1fa7b92023-11-14 19:15:35 +0800258@@ -567,6 +571,9 @@
developerdca80e32023-10-19 16:24:46 +0800259 #define TX_DMA_SPTAG_V3 BIT(27)
260
261 /* QDMA V2 descriptor txd4 */
262+#define EIP197_QDMA_TPORT 3
263+#define TX_DMA_TPORT_SHIFT 0
264+#define TX_DMA_TPORT_MASK 0xf
265 #define TX_DMA_FPORT_SHIFT_V2 8
266 #define TX_DMA_FPORT_MASK_V2 0xf
267 #define TX_DMA_SWC_V2 BIT(30)