developer | 5d148cb | 2023-06-02 13:08:11 +0800 | [diff] [blame] | 1 | From 1d16ff587875717c950c983af8eaa474d0a855ca Mon Sep 17 00:00:00 2001 |
| 2 | From: Sam Shih <sam.shih@mediatek.com> |
| 3 | Date: Fri, 2 Jun 2023 13:06:13 +0800 |
| 4 | Subject: [PATCH] |
| 5 | [spi-and-storage][999-2327-mtd-spinand-toshiba-Support-for-new-Kioxia-Serial-NAND.patch] |
developer | 41370d5 | 2022-03-16 16:01:59 +0800 | [diff] [blame] | 6 | |
developer | 41370d5 | 2022-03-16 16:01:59 +0800 | [diff] [blame] | 7 | --- |
| 8 | drivers/mtd/nand/spi/toshiba.c | 128 ++++++++++++++++++++++++++++----- |
| 9 | 1 file changed, 111 insertions(+), 17 deletions(-) |
| 10 | |
| 11 | diff --git a/drivers/mtd/nand/spi/toshiba.c b/drivers/mtd/nand/spi/toshiba.c |
developer | 5d148cb | 2023-06-02 13:08:11 +0800 | [diff] [blame] | 12 | index 7ce5997dd..be51a2eaf 100644 |
developer | 41370d5 | 2022-03-16 16:01:59 +0800 | [diff] [blame] | 13 | --- a/drivers/mtd/nand/spi/toshiba.c |
| 14 | +++ b/drivers/mtd/nand/spi/toshiba.c |
developer | 5d148cb | 2023-06-02 13:08:11 +0800 | [diff] [blame] | 15 | @@ -19,6 +19,18 @@ static SPINAND_OP_VARIANTS(read_cache_variants, |
developer | 41370d5 | 2022-03-16 16:01:59 +0800 | [diff] [blame] | 16 | SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0), |
| 17 | SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0)); |
| 18 | |
| 19 | +static SPINAND_OP_VARIANTS(write_cache_x4_variants, |
| 20 | + SPINAND_PROG_LOAD_X4(true, 0, NULL, 0), |
| 21 | + SPINAND_PROG_LOAD(true, 0, NULL, 0)); |
| 22 | + |
| 23 | +static SPINAND_OP_VARIANTS(update_cache_x4_variants, |
| 24 | + SPINAND_PROG_LOAD_X4(false, 0, NULL, 0), |
| 25 | + SPINAND_PROG_LOAD(false, 0, NULL, 0)); |
| 26 | + |
| 27 | +/** |
| 28 | + * Backward compatibility for 1st generation Serial NAND devices |
| 29 | + * which don't support Quad Program Load operation. |
| 30 | + */ |
| 31 | static SPINAND_OP_VARIANTS(write_cache_variants, |
| 32 | SPINAND_PROG_LOAD(true, 0, NULL, 0)); |
| 33 | |
developer | 5d148cb | 2023-06-02 13:08:11 +0800 | [diff] [blame] | 34 | @@ -94,7 +106,7 @@ static int tx58cxgxsxraix_ecc_get_status(struct spinand_device *spinand, |
developer | 41370d5 | 2022-03-16 16:01:59 +0800 | [diff] [blame] | 35 | } |
| 36 | |
| 37 | static const struct spinand_info toshiba_spinand_table[] = { |
| 38 | - /* 3.3V 1Gb */ |
| 39 | + /* 3.3V 1Gb (1st generation) */ |
| 40 | SPINAND_INFO("TC58CVG0S3HRAIG", |
| 41 | SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xC2), |
| 42 | NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), |
developer | 5d148cb | 2023-06-02 13:08:11 +0800 | [diff] [blame] | 43 | @@ -105,7 +117,7 @@ static const struct spinand_info toshiba_spinand_table[] = { |
developer | 41370d5 | 2022-03-16 16:01:59 +0800 | [diff] [blame] | 44 | 0, |
| 45 | SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, |
| 46 | tx58cxgxsxraix_ecc_get_status)), |
| 47 | - /* 3.3V 2Gb */ |
| 48 | + /* 3.3V 2Gb (1st generation) */ |
| 49 | SPINAND_INFO("TC58CVG1S3HRAIG", |
| 50 | SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xCB), |
| 51 | NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1), |
developer | 5d148cb | 2023-06-02 13:08:11 +0800 | [diff] [blame] | 52 | @@ -116,7 +128,7 @@ static const struct spinand_info toshiba_spinand_table[] = { |
developer | 41370d5 | 2022-03-16 16:01:59 +0800 | [diff] [blame] | 53 | 0, |
| 54 | SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, |
| 55 | tx58cxgxsxraix_ecc_get_status)), |
| 56 | - /* 3.3V 4Gb */ |
| 57 | + /* 3.3V 4Gb (1st generation) */ |
| 58 | SPINAND_INFO("TC58CVG2S0HRAIG", |
| 59 | SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xCD), |
| 60 | NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1), |
developer | 5d148cb | 2023-06-02 13:08:11 +0800 | [diff] [blame] | 61 | @@ -127,18 +139,7 @@ static const struct spinand_info toshiba_spinand_table[] = { |
developer | 41370d5 | 2022-03-16 16:01:59 +0800 | [diff] [blame] | 62 | 0, |
| 63 | SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, |
| 64 | tx58cxgxsxraix_ecc_get_status)), |
| 65 | - /* 3.3V 4Gb */ |
| 66 | - SPINAND_INFO("TC58CVG2S0HRAIJ", |
| 67 | - SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xED), |
| 68 | - NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1), |
| 69 | - NAND_ECCREQ(8, 512), |
| 70 | - SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |
| 71 | - &write_cache_variants, |
| 72 | - &update_cache_variants), |
| 73 | - 0, |
| 74 | - SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, |
| 75 | - tx58cxgxsxraix_ecc_get_status)), |
| 76 | - /* 1.8V 1Gb */ |
| 77 | + /* 1.8V 1Gb (1st generation) */ |
| 78 | SPINAND_INFO("TC58CYG0S3HRAIG", |
| 79 | SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xB2), |
| 80 | NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), |
developer | 5d148cb | 2023-06-02 13:08:11 +0800 | [diff] [blame] | 81 | @@ -149,7 +150,7 @@ static const struct spinand_info toshiba_spinand_table[] = { |
developer | 41370d5 | 2022-03-16 16:01:59 +0800 | [diff] [blame] | 82 | 0, |
| 83 | SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, |
| 84 | tx58cxgxsxraix_ecc_get_status)), |
| 85 | - /* 1.8V 2Gb */ |
| 86 | + /* 1.8V 2Gb (1st generation) */ |
| 87 | SPINAND_INFO("TC58CYG1S3HRAIG", |
| 88 | SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xBB), |
| 89 | NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1), |
developer | 5d148cb | 2023-06-02 13:08:11 +0800 | [diff] [blame] | 90 | @@ -160,7 +161,7 @@ static const struct spinand_info toshiba_spinand_table[] = { |
developer | 41370d5 | 2022-03-16 16:01:59 +0800 | [diff] [blame] | 91 | 0, |
| 92 | SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, |
| 93 | tx58cxgxsxraix_ecc_get_status)), |
| 94 | - /* 1.8V 4Gb */ |
| 95 | + /* 1.8V 4Gb (1st generation) */ |
| 96 | SPINAND_INFO("TC58CYG2S0HRAIG", |
| 97 | SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xBD), |
| 98 | NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1), |
developer | 5d148cb | 2023-06-02 13:08:11 +0800 | [diff] [blame] | 99 | @@ -171,6 +172,99 @@ static const struct spinand_info toshiba_spinand_table[] = { |
developer | 41370d5 | 2022-03-16 16:01:59 +0800 | [diff] [blame] | 100 | 0, |
| 101 | SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, |
| 102 | tx58cxgxsxraix_ecc_get_status)), |
| 103 | + |
| 104 | + /* |
| 105 | + * 2nd generation serial nand has HOLD_D which is equivalent to |
| 106 | + * QE_BIT. |
| 107 | + */ |
| 108 | + /* 3.3V 1Gb (2nd generation) */ |
| 109 | + SPINAND_INFO("TC58CVG0S3HRAIJ", |
| 110 | + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE2), |
| 111 | + NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), |
| 112 | + NAND_ECCREQ(8, 512), |
| 113 | + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |
| 114 | + &write_cache_x4_variants, |
| 115 | + &update_cache_x4_variants), |
| 116 | + SPINAND_HAS_QE_BIT, |
| 117 | + SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, |
| 118 | + tx58cxgxsxraix_ecc_get_status)), |
| 119 | + /* 3.3V 2Gb (2nd generation) */ |
| 120 | + SPINAND_INFO("TC58CVG1S3HRAIJ", |
| 121 | + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xEB), |
| 122 | + NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1), |
| 123 | + NAND_ECCREQ(8, 512), |
| 124 | + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |
| 125 | + &write_cache_x4_variants, |
| 126 | + &update_cache_x4_variants), |
| 127 | + SPINAND_HAS_QE_BIT, |
| 128 | + SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, |
| 129 | + tx58cxgxsxraix_ecc_get_status)), |
| 130 | + /* 3.3V 4Gb (2nd generation) */ |
| 131 | + SPINAND_INFO("TC58CVG2S0HRAIJ", |
| 132 | + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xED), |
| 133 | + NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1), |
| 134 | + NAND_ECCREQ(8, 512), |
| 135 | + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |
| 136 | + &write_cache_x4_variants, |
| 137 | + &update_cache_x4_variants), |
| 138 | + SPINAND_HAS_QE_BIT, |
| 139 | + SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, |
| 140 | + tx58cxgxsxraix_ecc_get_status)), |
| 141 | + /* 3.3V 8Gb (2nd generation) */ |
| 142 | + SPINAND_INFO("TH58CVG3S0HRAIJ", |
| 143 | + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE4), |
| 144 | + NAND_MEMORG(1, 4096, 256, 64, 4096, 80, 1, 1, 1), |
| 145 | + NAND_ECCREQ(8, 512), |
| 146 | + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |
| 147 | + &write_cache_x4_variants, |
| 148 | + &update_cache_x4_variants), |
| 149 | + SPINAND_HAS_QE_BIT, |
| 150 | + SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, |
| 151 | + tx58cxgxsxraix_ecc_get_status)), |
| 152 | + /* 1.8V 1Gb (2nd generation) */ |
| 153 | + SPINAND_INFO("TC58CYG0S3HRAIJ", |
| 154 | + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xD2), |
| 155 | + NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), |
| 156 | + NAND_ECCREQ(8, 512), |
| 157 | + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |
| 158 | + &write_cache_x4_variants, |
| 159 | + &update_cache_x4_variants), |
| 160 | + SPINAND_HAS_QE_BIT, |
| 161 | + SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, |
| 162 | + tx58cxgxsxraix_ecc_get_status)), |
| 163 | + /* 1.8V 2Gb (2nd generation) */ |
| 164 | + SPINAND_INFO("TC58CYG1S3HRAIJ", |
| 165 | + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xDB), |
| 166 | + NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1), |
| 167 | + NAND_ECCREQ(8, 512), |
| 168 | + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |
| 169 | + &write_cache_x4_variants, |
| 170 | + &update_cache_x4_variants), |
| 171 | + SPINAND_HAS_QE_BIT, |
| 172 | + SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, |
| 173 | + tx58cxgxsxraix_ecc_get_status)), |
| 174 | + /* 1.8V 4Gb (2nd generation) */ |
| 175 | + SPINAND_INFO("TC58CYG2S0HRAIJ", |
| 176 | + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xDD), |
| 177 | + NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1), |
| 178 | + NAND_ECCREQ(8, 512), |
| 179 | + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |
| 180 | + &write_cache_x4_variants, |
| 181 | + &update_cache_x4_variants), |
| 182 | + SPINAND_HAS_QE_BIT, |
| 183 | + SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, |
| 184 | + tx58cxgxsxraix_ecc_get_status)), |
| 185 | + /* 1.8V 8Gb (2nd generation) */ |
| 186 | + SPINAND_INFO("TH58CYG3S0HRAIJ", |
| 187 | + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xD4), |
| 188 | + NAND_MEMORG(1, 4096, 256, 64, 4096, 80, 1, 1, 1), |
| 189 | + NAND_ECCREQ(8, 512), |
| 190 | + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, |
| 191 | + &write_cache_x4_variants, |
| 192 | + &update_cache_x4_variants), |
| 193 | + SPINAND_HAS_QE_BIT, |
| 194 | + SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout, |
| 195 | + tx58cxgxsxraix_ecc_get_status)), |
| 196 | }; |
| 197 | |
| 198 | static const struct spinand_manufacturer_ops toshiba_spinand_manuf_ops = { |
developer | 5d148cb | 2023-06-02 13:08:11 +0800 | [diff] [blame] | 199 | -- |
| 200 | 2.34.1 |
| 201 | |