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git01.mediatek.com / openwrt / feeds / mtk-openwrt-feeds / ca1c6b2afaacaa86d976800d48874863cbbf92fd / . / target / linux / mediatek / patches-5.4 / 500-auxadc-add-auxadc-32k-clk.patch
blob: dc0dd2fca112ad74e814149645aa9a71bbbdbe24 [file] [log] [blame]
developer2cdfa052021-08-12 10:41:52 +0800[diff] [blame]1diff --git a/drivers/iio/adc/mt6577_auxadc.c b/drivers/iio/adc/mt6577_auxadc.c
2index 2449d91..b8a43eb 100644
3--- a/drivers/iio/adc/mt6577_auxadc.c
4+++ b/drivers/iio/adc/mt6577_auxadc.c
5@@ -42,6 +42,7 @@ struct mtk_auxadc_compatible {
6 struct mt6577_auxadc_device {
7 void __iomem *reg_base;
8 struct clk *adc_clk;
9+ struct clk *adc_32k_clk;
10 struct mutex lock;
11 const struct mtk_auxadc_compatible *dev_comp;
12 };
13@@ -214,6 +215,12 @@ static int __maybe_unused mt6577_auxadc_resume(struct device *dev)
14 return ret;
15 }
16
17+ ret = clk_prepare_enable(adc_dev->adc_32k_clk);
18+ if (ret) {
19+ pr_err("failed to enable auxadc clock\n");
20+ return ret;
21+ }
22+
23 mt6577_auxadc_mod_reg(adc_dev->reg_base + MT6577_AUXADC_MISC,
24 MT6577_AUXADC_PDN_EN, 0);
25 mdelay(MT6577_AUXADC_POWER_READY_MS);
26@@ -228,6 +235,8 @@ static int __maybe_unused mt6577_auxadc_suspend(struct device *dev)
27
28 mt6577_auxadc_mod_reg(adc_dev->reg_base + MT6577_AUXADC_MISC,
29 0, MT6577_AUXADC_PDN_EN);
30+
31+ clk_disable_unprepare(adc_dev->adc_32k_clk);
32 clk_disable_unprepare(adc_dev->adc_clk);
33
34 return 0;
35@@ -272,6 +281,17 @@ static int mt6577_auxadc_probe(struct platform_device *pdev)
36 return ret;
37 }
38
39+ adc_dev->adc_32k_clk = devm_clk_get(&pdev->dev, "32k");
40+ if (IS_ERR(adc_dev->adc_32k_clk)) {
41+ dev_err(&pdev->dev, "failed to get auxadc 32k clock\n");
42+ } else {
43+ ret = clk_prepare_enable(adc_dev->adc_32k_clk);
44+ if (ret) {
45+ dev_err(&pdev->dev, "failed to enable auxadc 32k clock\n");
46+ return ret;
47+ }
48+ }
49+
50 adc_clk_rate = clk_get_rate(adc_dev->adc_clk);
51 if (!adc_clk_rate) {
52 ret = -EINVAL;
53@@ -301,6 +321,7 @@ static int mt6577_auxadc_probe(struct platform_device *pdev)
54 mt6577_auxadc_mod_reg(adc_dev->reg_base + MT6577_AUXADC_MISC,
55 0, MT6577_AUXADC_PDN_EN);
56 err_disable_clk:
57+ clk_disable_unprepare(adc_dev->adc_32k_clk);
58 clk_disable_unprepare(adc_dev->adc_clk);
59 return ret;
60 }
61@@ -315,6 +336,7 @@ static int mt6577_auxadc_remove(struct platform_device *pdev)
62 mt6577_auxadc_mod_reg(adc_dev->reg_base + MT6577_AUXADC_MISC,
63 0, MT6577_AUXADC_PDN_EN);
64
65+ clk_disable_unprepare(adc_dev->adc_32k_clk);
66 clk_disable_unprepare(adc_dev->adc_clk);
67
68 return 0;