| commit | ca1c6b2afaacaa86d976800d48874863cbbf92fd | [log] [tgz] |
|---|---|---|
| author | developer <developer@mediatek.com> | Wed Apr 26 19:51:06 2023 +0800 |
| committer | developer <developer@mediatek.com> | Fri May 05 14:53:39 2023 +0800 |
| tree | 2d4a1fa2de089070a61136c85153cf4f864f97c9 | |
| parent | 8d613a6f30e203a9991080821b231c6f204d2bde [diff] |
[][Add PCIe max link width adjustment feature] [Description] Add PCIe max link width adjustment feature. [Release-log] N/A Change-Id: If4a7f53c8be8c6cf18b8febffd9fbfe88c743ff9 Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/7422117