blob: d7deb35a47437f973df89edecbe496d02c241f8e [file] [log] [blame]
developerbbd45e12023-05-19 08:22:06 +08001From 98998425cb0089e60f7172552f8231814736e921 Mon Sep 17 00:00:00 2001
2From: Evelyn Tsai <evelyn.tsai@mediatek.com>
3Date: Thu, 18 May 2023 18:02:17 +0800
4Subject: [PATCH 3/6] wifi: mt76: mt7915: disable wfdma tx/rx during SER
5 recovery.
developer2324aa22023-04-12 11:30:15 +08006
7Signed-off-by: Bo Jiao <Bo.Jiao@mediatek.com>
8---
9 dma.c | 6 ++
developer20bb2202023-04-17 09:22:47 +080010 mt7915/dma.c | 148 +++++++++++++++++++++++++++---------------------
developer2324aa22023-04-12 11:30:15 +080011 mt7915/mac.c | 17 +++++-
12 mt7915/mt7915.h | 1 +
developer20bb2202023-04-17 09:22:47 +080013 4 files changed, 103 insertions(+), 69 deletions(-)
developer2324aa22023-04-12 11:30:15 +080014
15diff --git a/dma.c b/dma.c
developerbbd45e12023-05-19 08:22:06 +080016index 465190e..05d9ab3 100644
developer2324aa22023-04-12 11:30:15 +080017--- a/dma.c
18+++ b/dma.c
19@@ -466,6 +466,9 @@ mt76_dma_tx_queue_skb_raw(struct mt76_dev *dev, struct mt76_queue *q,
20 struct mt76_queue_buf buf = {};
21 dma_addr_t addr;
22
23+ if (test_bit(MT76_MCU_RESET, &dev->phy.state))
24+ goto error;
25+
26 if (q->queued + 1 >= q->ndesc - 1)
27 goto error;
28
29@@ -507,6 +510,9 @@ mt76_dma_tx_queue_skb(struct mt76_dev *dev, struct mt76_queue *q,
30 dma_addr_t addr;
31 u8 *txwi;
32
33+ if (test_bit(MT76_RESET, &dev->phy.state))
34+ goto free_skb;
35+
36 t = mt76_get_txwi(dev);
37 if (!t)
38 goto free_skb;
39diff --git a/mt7915/dma.c b/mt7915/dma.c
developerbbd45e12023-05-19 08:22:06 +080040index 86a93de..4c8cf0c 100644
developer2324aa22023-04-12 11:30:15 +080041--- a/mt7915/dma.c
42+++ b/mt7915/dma.c
developer20bb2202023-04-17 09:22:47 +080043@@ -250,12 +250,90 @@ static void mt7915_dma_disable(struct mt7915_dev *dev, bool rst)
developer2324aa22023-04-12 11:30:15 +080044 }
45 }
46
47-static int mt7915_dma_enable(struct mt7915_dev *dev)
developer20bb2202023-04-17 09:22:47 +080048+int __mt7915_dma_enable(struct mt7915_dev *dev, bool reset, bool wed_reset)
developer2324aa22023-04-12 11:30:15 +080049 {
50 struct mt76_dev *mdev = &dev->mt76;
51 u32 hif1_ofs = 0;
52 u32 irq_mask;
53
54+ if (dev->hif2)
55+ hif1_ofs = MT_WFDMA0_PCIE1(0) - MT_WFDMA0(0);
56+
57+ /* enable wpdma tx/rx */
58+ if (!reset) {
59+ mt76_set(dev, MT_WFDMA0_GLO_CFG,
60+ MT_WFDMA0_GLO_CFG_TX_DMA_EN |
61+ MT_WFDMA0_GLO_CFG_RX_DMA_EN |
62+ MT_WFDMA0_GLO_CFG_OMIT_TX_INFO |
63+ MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2);
64+
65+ if (is_mt7915(mdev))
66+ mt76_set(dev, MT_WFDMA1_GLO_CFG,
67+ MT_WFDMA1_GLO_CFG_TX_DMA_EN |
68+ MT_WFDMA1_GLO_CFG_RX_DMA_EN |
69+ MT_WFDMA1_GLO_CFG_OMIT_TX_INFO |
70+ MT_WFDMA1_GLO_CFG_OMIT_RX_INFO);
71+
72+ if (dev->hif2) {
73+ mt76_set(dev, MT_WFDMA0_GLO_CFG + hif1_ofs,
74+ MT_WFDMA0_GLO_CFG_TX_DMA_EN |
75+ MT_WFDMA0_GLO_CFG_RX_DMA_EN |
76+ MT_WFDMA0_GLO_CFG_OMIT_TX_INFO |
77+ MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2);
78+
79+ if (is_mt7915(mdev))
80+ mt76_set(dev, MT_WFDMA1_GLO_CFG + hif1_ofs,
81+ MT_WFDMA1_GLO_CFG_TX_DMA_EN |
82+ MT_WFDMA1_GLO_CFG_RX_DMA_EN |
83+ MT_WFDMA1_GLO_CFG_OMIT_TX_INFO |
84+ MT_WFDMA1_GLO_CFG_OMIT_RX_INFO);
85+
86+ mt76_set(dev, MT_WFDMA_HOST_CONFIG,
87+ MT_WFDMA_HOST_CONFIG_PDMA_BAND);
88+ }
89+ }
90+
91+ /* enable interrupts for TX/RX rings */
92+ irq_mask = MT_INT_RX_DONE_MCU |
93+ MT_INT_TX_DONE_MCU |
94+ MT_INT_MCU_CMD;
95+
96+ if (!dev->phy.mt76->band_idx)
97+ irq_mask |= MT_INT_BAND0_RX_DONE;
98+
99+ if (dev->dbdc_support || dev->phy.mt76->band_idx)
100+ irq_mask |= MT_INT_BAND1_RX_DONE;
101+
102+ if (mtk_wed_device_active(&dev->mt76.mmio.wed) && wed_reset) {
103+ u32 wed_irq_mask = irq_mask;
104+ int ret;
105+
106+ wed_irq_mask |= MT_INT_TX_DONE_BAND0 | MT_INT_TX_DONE_BAND1;
developerbbd45e12023-05-19 08:22:06 +0800107+ if (!is_mt798x(&dev->mt76))
developer2324aa22023-04-12 11:30:15 +0800108+ mt76_wr(dev, MT_INT_WED_MASK_CSR, wed_irq_mask);
109+ else
110+ mt76_wr(dev, MT_INT_MASK_CSR, wed_irq_mask);
111+
112+ ret = mt7915_mcu_wed_enable_rx_stats(dev);
113+ if (ret)
114+ return ret;
115+
116+ mtk_wed_device_start(&dev->mt76.mmio.wed, wed_irq_mask);
117+ }
118+
119+ irq_mask = reset ? MT_INT_MCU_CMD : irq_mask;
120+
121+ mt7915_irq_enable(dev, irq_mask);
122+ mt7915_irq_disable(dev, 0);
developer20bb2202023-04-17 09:22:47 +0800123+
124+ return 0;
developer2324aa22023-04-12 11:30:15 +0800125+}
126+
127+static int mt7915_dma_enable(struct mt7915_dev *dev, bool reset)
128+{
129+ struct mt76_dev *mdev = &dev->mt76;
130+ u32 hif1_ofs = 0;
131+
132 if (dev->hif2)
133 hif1_ofs = MT_WFDMA0_PCIE1(0) - MT_WFDMA0(0);
134
developer20bb2202023-04-17 09:22:47 +0800135@@ -322,69 +400,7 @@ static int mt7915_dma_enable(struct mt7915_dev *dev)
developer2324aa22023-04-12 11:30:15 +0800136 mt76_poll(dev, MT_WFDMA_EXT_CSR_HIF_MISC,
137 MT_WFDMA_EXT_CSR_HIF_MISC_BUSY, 0, 1000);
138
139- /* set WFDMA Tx/Rx */
140- mt76_set(dev, MT_WFDMA0_GLO_CFG,
141- MT_WFDMA0_GLO_CFG_TX_DMA_EN |
142- MT_WFDMA0_GLO_CFG_RX_DMA_EN |
143- MT_WFDMA0_GLO_CFG_OMIT_TX_INFO |
144- MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2);
145-
146- if (is_mt7915(mdev))
147- mt76_set(dev, MT_WFDMA1_GLO_CFG,
148- MT_WFDMA1_GLO_CFG_TX_DMA_EN |
149- MT_WFDMA1_GLO_CFG_RX_DMA_EN |
150- MT_WFDMA1_GLO_CFG_OMIT_TX_INFO |
151- MT_WFDMA1_GLO_CFG_OMIT_RX_INFO);
152-
153- if (dev->hif2) {
154- mt76_set(dev, MT_WFDMA0_GLO_CFG + hif1_ofs,
155- MT_WFDMA0_GLO_CFG_TX_DMA_EN |
156- MT_WFDMA0_GLO_CFG_RX_DMA_EN |
157- MT_WFDMA0_GLO_CFG_OMIT_TX_INFO |
158- MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2);
159-
160- if (is_mt7915(mdev))
161- mt76_set(dev, MT_WFDMA1_GLO_CFG + hif1_ofs,
162- MT_WFDMA1_GLO_CFG_TX_DMA_EN |
163- MT_WFDMA1_GLO_CFG_RX_DMA_EN |
164- MT_WFDMA1_GLO_CFG_OMIT_TX_INFO |
165- MT_WFDMA1_GLO_CFG_OMIT_RX_INFO);
166-
167- mt76_set(dev, MT_WFDMA_HOST_CONFIG,
168- MT_WFDMA_HOST_CONFIG_PDMA_BAND);
169- }
170-
171- /* enable interrupts for TX/RX rings */
172- irq_mask = MT_INT_RX_DONE_MCU |
173- MT_INT_TX_DONE_MCU |
174- MT_INT_MCU_CMD;
175-
176- if (!dev->phy.mt76->band_idx)
177- irq_mask |= MT_INT_BAND0_RX_DONE;
178-
179- if (dev->dbdc_support || dev->phy.mt76->band_idx)
180- irq_mask |= MT_INT_BAND1_RX_DONE;
181-
182- if (mtk_wed_device_active(&dev->mt76.mmio.wed)) {
183- u32 wed_irq_mask = irq_mask;
184- int ret;
185-
186- wed_irq_mask |= MT_INT_TX_DONE_BAND0 | MT_INT_TX_DONE_BAND1;
developerbbd45e12023-05-19 08:22:06 +0800187- if (!is_mt798x(&dev->mt76))
developer2324aa22023-04-12 11:30:15 +0800188- mt76_wr(dev, MT_INT_WED_MASK_CSR, wed_irq_mask);
189- else
190- mt76_wr(dev, MT_INT_MASK_CSR, wed_irq_mask);
191-
192- ret = mt7915_mcu_wed_enable_rx_stats(dev);
193- if (ret)
194- return ret;
195-
196- mtk_wed_device_start(&dev->mt76.mmio.wed, wed_irq_mask);
197- }
198-
199- mt7915_irq_enable(dev, irq_mask);
developer20bb2202023-04-17 09:22:47 +0800200-
201- return 0;
202+ return __mt7915_dma_enable(dev, reset, true);
developer2324aa22023-04-12 11:30:15 +0800203 }
developer20bb2202023-04-17 09:22:47 +0800204
205 int mt7915_dma_init(struct mt7915_dev *dev, struct mt7915_phy *phy2)
developer2324aa22023-04-12 11:30:15 +0800206@@ -560,7 +576,7 @@ int mt7915_dma_init(struct mt7915_dev *dev, struct mt7915_phy *phy2)
207 mt7915_poll_tx);
208 napi_enable(&dev->mt76.tx_napi);
209
210- mt7915_dma_enable(dev);
211+ mt7915_dma_enable(dev, false);
212
213 return 0;
214 }
215@@ -642,7 +658,7 @@ int mt7915_dma_reset(struct mt7915_dev *dev, bool force)
216 mt76_rmw(dev, MT_WFDMA0_EXT0_CFG, MT_WFDMA0_EXT0_RXWB_KEEP,
217 MT_WFDMA0_EXT0_RXWB_KEEP);
218
219- mt7915_dma_enable(dev);
220+ mt7915_dma_enable(dev, !force);
221
222 return 0;
223 }
224diff --git a/mt7915/mac.c b/mt7915/mac.c
developerbbd45e12023-05-19 08:22:06 +0800225index fb6bab8..7be1e17 100644
developer2324aa22023-04-12 11:30:15 +0800226--- a/mt7915/mac.c
227+++ b/mt7915/mac.c
developerbbd45e12023-05-19 08:22:06 +0800228@@ -1574,6 +1574,8 @@ void mt7915_mac_reset_work(struct work_struct *work)
developer2324aa22023-04-12 11:30:15 +0800229 if (!(READ_ONCE(dev->recovery.state) & MT_MCU_CMD_STOP_DMA))
230 return;
231
232+ dev_info(dev->mt76.dev,"%s L1 SER recovery start.\n",
233+ wiphy_name(dev->mt76.hw->wiphy));
234 if (mtk_wed_device_active(&dev->mt76.mmio.wed)) {
235 mtk_wed_device_stop(&dev->mt76.mmio.wed);
developerbbd45e12023-05-19 08:22:06 +0800236 if (!is_mt798x(&dev->mt76))
237@@ -1611,6 +1613,12 @@ void mt7915_mac_reset_work(struct work_struct *work)
developer2324aa22023-04-12 11:30:15 +0800238 mt7915_wait_reset_state(dev, MT_MCU_CMD_RECOVERY_DONE);
239 }
240
241+ mt76_wr(dev, MT_MCU_INT_EVENT, MT_MCU_INT_EVENT_RESET_DONE);
242+ mt7915_wait_reset_state(dev, MT_MCU_CMD_NORMAL_STATE);
243+
244+ /* enable dma tx/rx and interrupt */
245+ __mt7915_dma_enable(dev, false, false);
246+
247 clear_bit(MT76_MCU_RESET, &dev->mphy.state);
248 clear_bit(MT76_RESET, &dev->mphy.state);
249 if (phy2)
developerbbd45e12023-05-19 08:22:06 +0800250@@ -1625,9 +1633,6 @@ void mt7915_mac_reset_work(struct work_struct *work)
developer2324aa22023-04-12 11:30:15 +0800251
developerbbd45e12023-05-19 08:22:06 +0800252 tasklet_schedule(&dev->mt76.irq_tasklet);
developer2324aa22023-04-12 11:30:15 +0800253
254- mt76_wr(dev, MT_MCU_INT_EVENT, MT_MCU_INT_EVENT_RESET_DONE);
255- mt7915_wait_reset_state(dev, MT_MCU_CMD_NORMAL_STATE);
256-
257 mt76_worker_enable(&dev->mt76.tx_worker);
258
259 local_bh_disable();
developerbbd45e12023-05-19 08:22:06 +0800260@@ -1649,6 +1654,8 @@ void mt7915_mac_reset_work(struct work_struct *work)
developer2324aa22023-04-12 11:30:15 +0800261 ieee80211_queue_delayed_work(ext_phy->hw,
262 &phy2->mt76->mac_work,
263 MT7915_WATCHDOG_TIME);
264+ dev_info(dev->mt76.dev,"%s L1 SER recovery completed.\n",
265+ wiphy_name(dev->mt76.hw->wiphy));
266 }
267
268 /* firmware coredump */
developerbbd45e12023-05-19 08:22:06 +0800269@@ -1723,6 +1730,10 @@ skip_coredump:
developer2324aa22023-04-12 11:30:15 +0800270
271 void mt7915_reset(struct mt7915_dev *dev)
272 {
273+ dev_info(dev->mt76.dev, "%s SER recovery state: 0x%08x\n",
274+ wiphy_name(dev->mt76.hw->wiphy),
275+ READ_ONCE(dev->recovery.state));
276+
277 if (!dev->recovery.hw_init_done)
278 return;
279
280diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h
developerbbd45e12023-05-19 08:22:06 +0800281index 9c79eff..d1715ff 100644
developer2324aa22023-04-12 11:30:15 +0800282--- a/mt7915/mt7915.h
283+++ b/mt7915/mt7915.h
developerbbd45e12023-05-19 08:22:06 +0800284@@ -472,6 +472,7 @@ int mt7915_dma_init(struct mt7915_dev *dev, struct mt7915_phy *phy2);
developer2324aa22023-04-12 11:30:15 +0800285 void mt7915_dma_prefetch(struct mt7915_dev *dev);
286 void mt7915_dma_cleanup(struct mt7915_dev *dev);
287 int mt7915_dma_reset(struct mt7915_dev *dev, bool force);
developer20bb2202023-04-17 09:22:47 +0800288+int __mt7915_dma_enable(struct mt7915_dev *dev, bool reset, bool wed_reset);
developer2324aa22023-04-12 11:30:15 +0800289 int mt7915_txbf_init(struct mt7915_dev *dev);
290 void mt7915_init_txpower(struct mt7915_dev *dev,
291 struct ieee80211_supported_band *sband);
292--
2932.18.0
294