blob: 751687b99ab8aab29fb2601bf02f6786188ba3c1 [file] [log] [blame]
developer2324aa22023-04-12 11:30:15 +08001From 96866c5d7d33633c450df65f2154789aca683311 Mon Sep 17 00:00:00 2001
2From: Bo Jiao <Bo.Jiao@mediatek.com>
3Date: Tue, 11 Apr 2023 10:56:17 +0800
4Subject: [PATCH 3/3] wifi: mt76: mt7915: disable wfdma tx/rx during SER
5 recovery.
6
7Signed-off-by: Bo Jiao <Bo.Jiao@mediatek.com>
8---
9 dma.c | 6 ++
10 mt7915/dma.c | 144 +++++++++++++++++++++++++++---------------------
11 mt7915/mac.c | 17 +++++-
12 mt7915/mt7915.h | 1 +
13 4 files changed, 101 insertions(+), 67 deletions(-)
14
15diff --git a/dma.c b/dma.c
16index df2ca73..c22ea64 100644
17--- a/dma.c
18+++ b/dma.c
19@@ -466,6 +466,9 @@ mt76_dma_tx_queue_skb_raw(struct mt76_dev *dev, struct mt76_queue *q,
20 struct mt76_queue_buf buf = {};
21 dma_addr_t addr;
22
23+ if (test_bit(MT76_MCU_RESET, &dev->phy.state))
24+ goto error;
25+
26 if (q->queued + 1 >= q->ndesc - 1)
27 goto error;
28
29@@ -507,6 +510,9 @@ mt76_dma_tx_queue_skb(struct mt76_dev *dev, struct mt76_queue *q,
30 dma_addr_t addr;
31 u8 *txwi;
32
33+ if (test_bit(MT76_RESET, &dev->phy.state))
34+ goto free_skb;
35+
36 t = mt76_get_txwi(dev);
37 if (!t)
38 goto free_skb;
39diff --git a/mt7915/dma.c b/mt7915/dma.c
40index 43a5456..3b8a2ab 100644
41--- a/mt7915/dma.c
42+++ b/mt7915/dma.c
43@@ -250,12 +250,88 @@ static void mt7915_dma_disable(struct mt7915_dev *dev, bool rst)
44 }
45 }
46
47-static int mt7915_dma_enable(struct mt7915_dev *dev)
48+void __mt7915_dma_enable(struct mt7915_dev *dev, bool reset, bool wed_reset)
49 {
50 struct mt76_dev *mdev = &dev->mt76;
51 u32 hif1_ofs = 0;
52 u32 irq_mask;
53
54+ if (dev->hif2)
55+ hif1_ofs = MT_WFDMA0_PCIE1(0) - MT_WFDMA0(0);
56+
57+ /* enable wpdma tx/rx */
58+ if (!reset) {
59+ mt76_set(dev, MT_WFDMA0_GLO_CFG,
60+ MT_WFDMA0_GLO_CFG_TX_DMA_EN |
61+ MT_WFDMA0_GLO_CFG_RX_DMA_EN |
62+ MT_WFDMA0_GLO_CFG_OMIT_TX_INFO |
63+ MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2);
64+
65+ if (is_mt7915(mdev))
66+ mt76_set(dev, MT_WFDMA1_GLO_CFG,
67+ MT_WFDMA1_GLO_CFG_TX_DMA_EN |
68+ MT_WFDMA1_GLO_CFG_RX_DMA_EN |
69+ MT_WFDMA1_GLO_CFG_OMIT_TX_INFO |
70+ MT_WFDMA1_GLO_CFG_OMIT_RX_INFO);
71+
72+ if (dev->hif2) {
73+ mt76_set(dev, MT_WFDMA0_GLO_CFG + hif1_ofs,
74+ MT_WFDMA0_GLO_CFG_TX_DMA_EN |
75+ MT_WFDMA0_GLO_CFG_RX_DMA_EN |
76+ MT_WFDMA0_GLO_CFG_OMIT_TX_INFO |
77+ MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2);
78+
79+ if (is_mt7915(mdev))
80+ mt76_set(dev, MT_WFDMA1_GLO_CFG + hif1_ofs,
81+ MT_WFDMA1_GLO_CFG_TX_DMA_EN |
82+ MT_WFDMA1_GLO_CFG_RX_DMA_EN |
83+ MT_WFDMA1_GLO_CFG_OMIT_TX_INFO |
84+ MT_WFDMA1_GLO_CFG_OMIT_RX_INFO);
85+
86+ mt76_set(dev, MT_WFDMA_HOST_CONFIG,
87+ MT_WFDMA_HOST_CONFIG_PDMA_BAND);
88+ }
89+ }
90+
91+ /* enable interrupts for TX/RX rings */
92+ irq_mask = MT_INT_RX_DONE_MCU |
93+ MT_INT_TX_DONE_MCU |
94+ MT_INT_MCU_CMD;
95+
96+ if (!dev->phy.mt76->band_idx)
97+ irq_mask |= MT_INT_BAND0_RX_DONE;
98+
99+ if (dev->dbdc_support || dev->phy.mt76->band_idx)
100+ irq_mask |= MT_INT_BAND1_RX_DONE;
101+
102+ if (mtk_wed_device_active(&dev->mt76.mmio.wed) && wed_reset) {
103+ u32 wed_irq_mask = irq_mask;
104+ int ret;
105+
106+ wed_irq_mask |= MT_INT_TX_DONE_BAND0 | MT_INT_TX_DONE_BAND1;
107+ if (!is_mt7986(&dev->mt76))
108+ mt76_wr(dev, MT_INT_WED_MASK_CSR, wed_irq_mask);
109+ else
110+ mt76_wr(dev, MT_INT_MASK_CSR, wed_irq_mask);
111+
112+ ret = mt7915_mcu_wed_enable_rx_stats(dev);
113+ if (ret)
114+ return ret;
115+
116+ mtk_wed_device_start(&dev->mt76.mmio.wed, wed_irq_mask);
117+ }
118+
119+ irq_mask = reset ? MT_INT_MCU_CMD : irq_mask;
120+
121+ mt7915_irq_enable(dev, irq_mask);
122+ mt7915_irq_disable(dev, 0);
123+}
124+
125+static int mt7915_dma_enable(struct mt7915_dev *dev, bool reset)
126+{
127+ struct mt76_dev *mdev = &dev->mt76;
128+ u32 hif1_ofs = 0;
129+
130 if (dev->hif2)
131 hif1_ofs = MT_WFDMA0_PCIE1(0) - MT_WFDMA0(0);
132
133@@ -322,67 +398,7 @@ static int mt7915_dma_enable(struct mt7915_dev *dev)
134 mt76_poll(dev, MT_WFDMA_EXT_CSR_HIF_MISC,
135 MT_WFDMA_EXT_CSR_HIF_MISC_BUSY, 0, 1000);
136
137- /* set WFDMA Tx/Rx */
138- mt76_set(dev, MT_WFDMA0_GLO_CFG,
139- MT_WFDMA0_GLO_CFG_TX_DMA_EN |
140- MT_WFDMA0_GLO_CFG_RX_DMA_EN |
141- MT_WFDMA0_GLO_CFG_OMIT_TX_INFO |
142- MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2);
143-
144- if (is_mt7915(mdev))
145- mt76_set(dev, MT_WFDMA1_GLO_CFG,
146- MT_WFDMA1_GLO_CFG_TX_DMA_EN |
147- MT_WFDMA1_GLO_CFG_RX_DMA_EN |
148- MT_WFDMA1_GLO_CFG_OMIT_TX_INFO |
149- MT_WFDMA1_GLO_CFG_OMIT_RX_INFO);
150-
151- if (dev->hif2) {
152- mt76_set(dev, MT_WFDMA0_GLO_CFG + hif1_ofs,
153- MT_WFDMA0_GLO_CFG_TX_DMA_EN |
154- MT_WFDMA0_GLO_CFG_RX_DMA_EN |
155- MT_WFDMA0_GLO_CFG_OMIT_TX_INFO |
156- MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2);
157-
158- if (is_mt7915(mdev))
159- mt76_set(dev, MT_WFDMA1_GLO_CFG + hif1_ofs,
160- MT_WFDMA1_GLO_CFG_TX_DMA_EN |
161- MT_WFDMA1_GLO_CFG_RX_DMA_EN |
162- MT_WFDMA1_GLO_CFG_OMIT_TX_INFO |
163- MT_WFDMA1_GLO_CFG_OMIT_RX_INFO);
164-
165- mt76_set(dev, MT_WFDMA_HOST_CONFIG,
166- MT_WFDMA_HOST_CONFIG_PDMA_BAND);
167- }
168-
169- /* enable interrupts for TX/RX rings */
170- irq_mask = MT_INT_RX_DONE_MCU |
171- MT_INT_TX_DONE_MCU |
172- MT_INT_MCU_CMD;
173-
174- if (!dev->phy.mt76->band_idx)
175- irq_mask |= MT_INT_BAND0_RX_DONE;
176-
177- if (dev->dbdc_support || dev->phy.mt76->band_idx)
178- irq_mask |= MT_INT_BAND1_RX_DONE;
179-
180- if (mtk_wed_device_active(&dev->mt76.mmio.wed)) {
181- u32 wed_irq_mask = irq_mask;
182- int ret;
183-
184- wed_irq_mask |= MT_INT_TX_DONE_BAND0 | MT_INT_TX_DONE_BAND1;
185- if (!is_mt7986(&dev->mt76))
186- mt76_wr(dev, MT_INT_WED_MASK_CSR, wed_irq_mask);
187- else
188- mt76_wr(dev, MT_INT_MASK_CSR, wed_irq_mask);
189-
190- ret = mt7915_mcu_wed_enable_rx_stats(dev);
191- if (ret)
192- return ret;
193-
194- mtk_wed_device_start(&dev->mt76.mmio.wed, wed_irq_mask);
195- }
196-
197- mt7915_irq_enable(dev, irq_mask);
198+ __mt7915_dma_enable(dev, reset, true);
199
200 return 0;
201 }
202@@ -560,7 +576,7 @@ int mt7915_dma_init(struct mt7915_dev *dev, struct mt7915_phy *phy2)
203 mt7915_poll_tx);
204 napi_enable(&dev->mt76.tx_napi);
205
206- mt7915_dma_enable(dev);
207+ mt7915_dma_enable(dev, false);
208
209 return 0;
210 }
211@@ -642,7 +658,7 @@ int mt7915_dma_reset(struct mt7915_dev *dev, bool force)
212 mt76_rmw(dev, MT_WFDMA0_EXT0_CFG, MT_WFDMA0_EXT0_RXWB_KEEP,
213 MT_WFDMA0_EXT0_RXWB_KEEP);
214
215- mt7915_dma_enable(dev);
216+ mt7915_dma_enable(dev, !force);
217
218 return 0;
219 }
220diff --git a/mt7915/mac.c b/mt7915/mac.c
221index 97ca55d..f1fdcfd 100644
222--- a/mt7915/mac.c
223+++ b/mt7915/mac.c
224@@ -1578,6 +1578,8 @@ void mt7915_mac_reset_work(struct work_struct *work)
225 if (!(READ_ONCE(dev->recovery.state) & MT_MCU_CMD_STOP_DMA))
226 return;
227
228+ dev_info(dev->mt76.dev,"%s L1 SER recovery start.\n",
229+ wiphy_name(dev->mt76.hw->wiphy));
230 if (mtk_wed_device_active(&dev->mt76.mmio.wed)) {
231 mtk_wed_device_stop(&dev->mt76.mmio.wed);
232 if (!is_mt7986(&dev->mt76))
233@@ -1615,6 +1617,12 @@ void mt7915_mac_reset_work(struct work_struct *work)
234 mt7915_wait_reset_state(dev, MT_MCU_CMD_RECOVERY_DONE);
235 }
236
237+ mt76_wr(dev, MT_MCU_INT_EVENT, MT_MCU_INT_EVENT_RESET_DONE);
238+ mt7915_wait_reset_state(dev, MT_MCU_CMD_NORMAL_STATE);
239+
240+ /* enable dma tx/rx and interrupt */
241+ __mt7915_dma_enable(dev, false, false);
242+
243 clear_bit(MT76_MCU_RESET, &dev->mphy.state);
244 clear_bit(MT76_RESET, &dev->mphy.state);
245 if (phy2)
246@@ -1629,9 +1637,6 @@ void mt7915_mac_reset_work(struct work_struct *work)
247
248 tasklet_schedule(&dev->irq_tasklet);
249
250- mt76_wr(dev, MT_MCU_INT_EVENT, MT_MCU_INT_EVENT_RESET_DONE);
251- mt7915_wait_reset_state(dev, MT_MCU_CMD_NORMAL_STATE);
252-
253 mt76_worker_enable(&dev->mt76.tx_worker);
254
255 local_bh_disable();
256@@ -1653,6 +1658,8 @@ void mt7915_mac_reset_work(struct work_struct *work)
257 ieee80211_queue_delayed_work(ext_phy->hw,
258 &phy2->mt76->mac_work,
259 MT7915_WATCHDOG_TIME);
260+ dev_info(dev->mt76.dev,"%s L1 SER recovery completed.\n",
261+ wiphy_name(dev->mt76.hw->wiphy));
262 }
263
264 /* firmware coredump */
265@@ -1727,6 +1734,10 @@ skip_coredump:
266
267 void mt7915_reset(struct mt7915_dev *dev)
268 {
269+ dev_info(dev->mt76.dev, "%s SER recovery state: 0x%08x\n",
270+ wiphy_name(dev->mt76.hw->wiphy),
271+ READ_ONCE(dev->recovery.state));
272+
273 if (!dev->recovery.hw_init_done)
274 return;
275
276diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h
277index b66938b..376256d 100644
278--- a/mt7915/mt7915.h
279+++ b/mt7915/mt7915.h
280@@ -481,6 +481,7 @@ int mt7915_dma_init(struct mt7915_dev *dev, struct mt7915_phy *phy2);
281 void mt7915_dma_prefetch(struct mt7915_dev *dev);
282 void mt7915_dma_cleanup(struct mt7915_dev *dev);
283 int mt7915_dma_reset(struct mt7915_dev *dev, bool force);
284+void __mt7915_dma_enable(struct mt7915_dev *dev, bool reset, bool wed_reset);
285 int mt7915_txbf_init(struct mt7915_dev *dev);
286 void mt7915_init_txpower(struct mt7915_dev *dev,
287 struct ieee80211_supported_band *sband);
288--
2892.18.0
290