blob: 3f7f62758f5bf3cead8db72a33daead1e3125404 [file] [log] [blame]
developera67abd22024-02-26 11:42:48 +08001From c8e0568252515b5b9fe6982efd099b3d9320f6ff Mon Sep 17 00:00:00 2001
developerade48b12023-12-12 10:37:24 +08002From: Rex Lu <rex.lu@mediatek.com>
3Date: Mon, 11 Dec 2023 19:21:16 +0800
developera72bbd82024-02-04 18:27:28 +08004Subject: [PATCH] wifi: mt76: mt7915: support backaward compatiable
developerade48b12023-12-12 10:37:24 +08005
6---
developera67abd22024-02-26 11:42:48 +08007 mt7915/mmio.c | 4 ++--
8 wed.c | 2 +-
9 2 files changed, 3 insertions(+), 3 deletions(-)
developerade48b12023-12-12 10:37:24 +080010
developera67abd22024-02-26 11:42:48 +080011diff --git a/mt7915/mmio.c b/mt7915/mmio.c
12index 142f308..11db3ed 100644
13--- a/mt7915/mmio.c
14+++ b/mt7915/mmio.c
15@@ -697,7 +697,7 @@ int mt7915_mmio_wed_init(struct mt7915_dev *dev, void *pdev_ptr,
16 MT_RXQ_WED_RING_BASE;
17 wed->wlan.wpdma_rx_glo = pci_resource_start(pci_dev, 0) +
18 MT_WPDMA_GLO_CFG;
19- wed->wlan.wpdma_rx = pci_resource_start(pci_dev, 0) +
20+ wed->wlan.wpdma_rx[0] = pci_resource_start(pci_dev, 0) +
21 MT_RXQ_WED_DATA_RING_BASE;
22 } else {
23 struct platform_device *plat_dev = pdev_ptr;
24@@ -717,7 +717,7 @@ int mt7915_mmio_wed_init(struct mt7915_dev *dev, void *pdev_ptr,
25 wed->wlan.wpdma_tx = res->start + MT_TXQ_WED_RING_BASE;
26 wed->wlan.wpdma_txfree = res->start + MT_RXQ_WED_RING_BASE;
27 wed->wlan.wpdma_rx_glo = res->start + MT_WPDMA_GLO_CFG;
28- wed->wlan.wpdma_rx = res->start + MT_RXQ_WED_DATA_RING_BASE;
29+ wed->wlan.wpdma_rx[0] = res->start + MT_RXQ_WED_DATA_RING_BASE;
30 }
31
32 wed->wlan.nbuf = is_mt7915(&dev->mt76) ?
developera72bbd82024-02-04 18:27:28 +080033diff --git a/wed.c b/wed.c
developera67abd22024-02-26 11:42:48 +080034index 5ed681e..652f59e 100644
developera72bbd82024-02-04 18:27:28 +080035--- a/wed.c
36+++ b/wed.c
developera67abd22024-02-26 11:42:48 +080037@@ -175,7 +175,7 @@ int mt76_wed_dma_setup(struct mt76_dev *dev, struct mt76_queue *q, bool reset)
developerade48b12023-12-12 10:37:24 +080038 break;
developera67abd22024-02-26 11:42:48 +080039 case MT76_WED_RRO_Q_MSDU_PG:
40 q->flags &= ~MT_QFLAG_WED;
developera72bbd82024-02-04 18:27:28 +080041- __mt76_dma_queue_reset(dev, q);
developera67abd22024-02-26 11:42:48 +080042+ __mt76_dma_queue_reset(dev, q, false);
43 mtk_wed_device_msdu_pg_rx_ring_setup(q->wed, ring, q->regs);
44 q->head = q->ndesc - 1;
45 q->queued = q->head;
developerade48b12023-12-12 10:37:24 +080046--
472.18.0
48