developer | c41fcd3 | 2022-09-20 22:09:06 +0800 | [diff] [blame] | 1 | From 653bfcdadce50131c3c394b33acd94b110186744 Mon Sep 17 00:00:00 2001 |
developer | 91fc945 | 2022-06-28 11:24:56 +0800 | [diff] [blame] | 2 | From: Howard Hsu <howard-yh.hsu@mediatek.com> |
| 3 | Date: Mon, 30 May 2022 15:04:57 +0800 |
developer | c41fcd3 | 2022-09-20 22:09:06 +0800 | [diff] [blame] | 4 | Subject: [PATCH 99911/99916] Add mtk_vendor.h |
developer | 91fc945 | 2022-06-28 11:24:56 +0800 | [diff] [blame] | 5 | |
| 6 | --- |
| 7 | src/common/mtk_vendor.h | 195 ++++++++++++++++++++++++++++++++++++++++ |
| 8 | 1 file changed, 195 insertions(+) |
| 9 | create mode 100644 src/common/mtk_vendor.h |
| 10 | |
| 11 | diff --git a/src/common/mtk_vendor.h b/src/common/mtk_vendor.h |
| 12 | new file mode 100644 |
developer | c41fcd3 | 2022-09-20 22:09:06 +0800 | [diff] [blame] | 13 | index 000000000..528387fa5 |
developer | 91fc945 | 2022-06-28 11:24:56 +0800 | [diff] [blame] | 14 | --- /dev/null |
| 15 | +++ b/src/common/mtk_vendor.h |
| 16 | @@ -0,0 +1,195 @@ |
| 17 | +// SPDX-License-Identifier: ISC |
| 18 | +/* Copyright (C) 2020 Felix Fietkau <nbd@nbd.name> */ |
| 19 | +#ifndef MTK_VENDOR_H |
| 20 | +#define MTK_VENDOR_H |
| 21 | + |
| 22 | +#define OUI_MTK 0x000ce7 |
| 23 | + |
| 24 | +enum mtk_nl80211_vendor_subcmds { |
| 25 | + MTK_NL80211_VENDOR_SUBCMD_AMNT_CTRL = 0xae, |
| 26 | + MTK_NL80211_VENDOR_SUBCMD_CSI_CTRL = 0xc2, |
| 27 | + MTK_NL80211_VENDOR_SUBCMD_RFEATURE_CTRL = 0xc3, |
| 28 | + MTK_NL80211_VENDOR_SUBCMD_WIRELESS_CTRL = 0xc4, |
| 29 | + MTK_NL80211_VENDOR_SUBCMD_EDCCA_CTRL = 0xc7, |
| 30 | +}; |
| 31 | + |
| 32 | +enum mtk_vendor_attr_edcca_ctrl { |
| 33 | + MTK_VENDOR_ATTR_EDCCA_THRESHOLD_INVALID = 0, |
| 34 | + |
| 35 | + MTK_VENDOR_ATTR_EDCCA_CTRL_MODE, |
| 36 | + MTK_VENDOR_ATTR_EDCCA_CTRL_PRI20_VAL, |
| 37 | + MTK_VENDOR_ATTR_EDCCA_CTRL_SEC20_VAL, |
| 38 | + MTK_VENDOR_ATTR_EDCCA_CTRL_SEC40_VAL, |
| 39 | + MTK_VENDOR_ATTR_EDCCA_CTRL_SEC80_VAL, |
| 40 | + MTK_VENDOR_ATTR_EDCCA_CTRL_COMPENSATE, |
| 41 | + |
| 42 | + /* keep last */ |
| 43 | + NUM_MTK_VENDOR_ATTRS_EDCCA_CTRL, |
| 44 | + MTK_VENDOR_ATTR_EDCCA_CTRL_MAX = |
| 45 | + NUM_MTK_VENDOR_ATTRS_EDCCA_CTRL - 1 |
| 46 | +}; |
| 47 | + |
| 48 | +enum mtk_vendor_attr_edcca_ctrl_mode { |
| 49 | + EDCCA_CTRL_SET_EN = 0, |
| 50 | + EDCCA_CTRL_SET_THERS, |
| 51 | + EDCCA_CTRL_GET_EN, |
| 52 | + EDCCA_CTRL_GET_THERS, |
| 53 | + EDCCA_CTRL_NUM, |
| 54 | +}; |
| 55 | + |
| 56 | +static struct nla_policy edcca_ctrl_policy[NUM_MTK_VENDOR_ATTRS_EDCCA_CTRL] = { |
| 57 | + [MTK_VENDOR_ATTR_EDCCA_CTRL_MODE] = { .type = NLA_U8 }, |
| 58 | + [MTK_VENDOR_ATTR_EDCCA_CTRL_PRI20_VAL] = { .type = NLA_U8 }, |
| 59 | + [MTK_VENDOR_ATTR_EDCCA_CTRL_SEC20_VAL] = { .type = NLA_U8 }, |
| 60 | + [MTK_VENDOR_ATTR_EDCCA_CTRL_SEC40_VAL] = { .type = NLA_U8 }, |
| 61 | + [MTK_VENDOR_ATTR_EDCCA_CTRL_SEC80_VAL] = { .type = NLA_U8 }, |
| 62 | + [MTK_VENDOR_ATTR_EDCCA_CTRL_COMPENSATE] = { .type = NLA_U8 }, |
| 63 | +}; |
| 64 | + |
| 65 | +enum mtk_vendor_attr_csi_ctrl { |
| 66 | + MTK_VENDOR_ATTR_CSI_CTRL_UNSPEC, |
| 67 | + |
| 68 | + MTK_VENDOR_ATTR_CSI_CTRL_CFG, |
| 69 | + MTK_VENDOR_ATTR_CSI_CTRL_CFG_MODE, |
| 70 | + MTK_VENDOR_ATTR_CSI_CTRL_CFG_TYPE, |
| 71 | + MTK_VENDOR_ATTR_CSI_CTRL_CFG_VAL1, |
| 72 | + MTK_VENDOR_ATTR_CSI_CTRL_CFG_VAL2, |
| 73 | + MTK_VENDOR_ATTR_CSI_CTRL_MAC_ADDR, |
| 74 | + MTK_VENDOR_ATTR_CSI_CTRL_INTERVAL, |
| 75 | + |
| 76 | + MTK_VENDOR_ATTR_CSI_CTRL_DUMP_NUM, |
| 77 | + |
| 78 | + MTK_VENDOR_ATTR_CSI_CTRL_DATA, |
| 79 | + |
| 80 | + /* keep last */ |
| 81 | + NUM_MTK_VENDOR_ATTRS_CSI_CTRL, |
| 82 | + MTK_VENDOR_ATTR_CSI_CTRL_MAX = |
| 83 | + NUM_MTK_VENDOR_ATTRS_CSI_CTRL - 1 |
| 84 | +}; |
| 85 | + |
| 86 | +enum mtk_vendor_attr_csi_data { |
| 87 | + MTK_VENDOR_ATTR_CSI_DATA_UNSPEC, |
| 88 | + MTK_VENDOR_ATTR_CSI_DATA_PAD, |
| 89 | + |
| 90 | + MTK_VENDOR_ATTR_CSI_DATA_VER, |
| 91 | + MTK_VENDOR_ATTR_CSI_DATA_TS, |
| 92 | + MTK_VENDOR_ATTR_CSI_DATA_RSSI, |
| 93 | + MTK_VENDOR_ATTR_CSI_DATA_SNR, |
| 94 | + MTK_VENDOR_ATTR_CSI_DATA_BW, |
| 95 | + MTK_VENDOR_ATTR_CSI_DATA_CH_IDX, |
| 96 | + MTK_VENDOR_ATTR_CSI_DATA_TA, |
| 97 | + MTK_VENDOR_ATTR_CSI_DATA_I, |
| 98 | + MTK_VENDOR_ATTR_CSI_DATA_Q, |
| 99 | + MTK_VENDOR_ATTR_CSI_DATA_INFO, |
| 100 | + MTK_VENDOR_ATTR_CSI_DATA_RSVD1, |
| 101 | + MTK_VENDOR_ATTR_CSI_DATA_RSVD2, |
| 102 | + MTK_VENDOR_ATTR_CSI_DATA_RSVD3, |
| 103 | + MTK_VENDOR_ATTR_CSI_DATA_RSVD4, |
| 104 | + MTK_VENDOR_ATTR_CSI_DATA_TX_ANT, |
| 105 | + MTK_VENDOR_ATTR_CSI_DATA_RX_ANT, |
| 106 | + MTK_VENDOR_ATTR_CSI_DATA_MODE, |
| 107 | + MTK_VENDOR_ATTR_CSI_DATA_H_IDX, |
| 108 | + |
| 109 | + /* keep last */ |
| 110 | + NUM_MTK_VENDOR_ATTRS_CSI_DATA, |
| 111 | + MTK_VENDOR_ATTR_CSI_DATA_MAX = |
| 112 | + NUM_MTK_VENDOR_ATTRS_CSI_DATA - 1 |
| 113 | +}; |
| 114 | + |
| 115 | +enum mtk_vendor_attr_mnt_ctrl { |
| 116 | + MTK_VENDOR_ATTR_AMNT_CTRL_UNSPEC, |
| 117 | + |
| 118 | + MTK_VENDOR_ATTR_AMNT_CTRL_SET, |
| 119 | + MTK_VENDOR_ATTR_AMNT_CTRL_DUMP, |
| 120 | + /* keep last */ |
| 121 | + NUM_MTK_VENDOR_ATTRS_AMNT_CTRL, |
| 122 | + MTK_VENDOR_ATTR_AMNT_CTRL_MAX = |
| 123 | + NUM_MTK_VENDOR_ATTRS_AMNT_CTRL - 1 |
| 124 | +}; |
| 125 | + |
| 126 | +enum mtk_vendor_attr_mnt_set { |
| 127 | + MTK_VENDOR_ATTR_AMNT_SET_UNSPEC, |
| 128 | + |
| 129 | + MTK_VENDOR_ATTR_AMNT_SET_INDEX, |
| 130 | + MTK_VENDOR_ATTR_AMNT_SET_MACADDR, |
| 131 | + |
| 132 | + /* keep last */ |
| 133 | + NUM_MTK_VENDOR_ATTRS_AMNT_SET, |
| 134 | + MTK_VENDOR_ATTR_AMNT_SET_MAX = |
| 135 | + NUM_MTK_VENDOR_ATTRS_AMNT_SET - 1 |
| 136 | +}; |
| 137 | + |
| 138 | +enum mtk_vendor_attr_mnt_dump { |
| 139 | + MTK_VENDOR_ATTR_AMNT_DUMP_UNSPEC, |
| 140 | + |
| 141 | + MTK_VENDOR_ATTR_AMNT_DUMP_INDEX, |
| 142 | + MTK_VENDOR_ATTR_AMNT_DUMP_LEN, |
| 143 | + MTK_VENDOR_ATTR_AMNT_DUMP_RESULT, |
| 144 | + |
| 145 | + /* keep last */ |
| 146 | + NUM_MTK_VENDOR_ATTRS_AMNT_DUMP, |
| 147 | + MTK_VENDOR_ATTR_AMNT_DUMP_MAX = |
| 148 | + NUM_MTK_VENDOR_ATTRS_AMNT_DUMP - 1 |
| 149 | +}; |
| 150 | + |
| 151 | +enum mtk_vendor_attr_wireless_ctrl { |
| 152 | + MTK_VENDOR_ATTR_WIRELESS_CTRL_UNSPEC, |
| 153 | + |
| 154 | + MTK_VENDOR_ATTR_WIRELESS_CTRL_FIXED_MCS, |
| 155 | + MTK_VENDOR_ATTR_WIRELESS_CTRL_FIXED_OFDMA, |
| 156 | + MTK_VENDOR_ATTR_WIRELESS_CTRL_PPDU_TX_TYPE, |
| 157 | + MTK_VENDOR_ATTR_WIRELESS_CTRL_NUSERS_OFDMA, |
| 158 | + MTK_VENDOR_ATTR_WIRELESS_CTRL_BA_BUFFER_SIZE, |
| 159 | + MTK_VENDOR_ATTR_WIRELESS_CTRL_MIMO, |
| 160 | + MTK_VENDOR_ATTR_WIRELESS_CTRL_AMPDU, |
| 161 | + MTK_VENDOR_ATTR_WIRELESS_CTRL_AMSDU, |
| 162 | + MTK_VENDOR_ATTR_WIRELESS_CTRL_CERT, |
| 163 | + |
| 164 | + /* keep last */ |
| 165 | + NUM_MTK_VENDOR_ATTRS_WIRELESS_CTRL, |
| 166 | + MTK_VENDOR_ATTR_WIRELESS_CTRL_MAX = |
| 167 | + NUM_MTK_VENDOR_ATTRS_WIRELESS_CTRL - 1 |
| 168 | +}; |
| 169 | + |
| 170 | +enum mtk_vendor_attr_rfeature_ctrl { |
| 171 | + MTK_VENDOR_ATTR_RFEATURE_CTRL_UNSPEC, |
| 172 | + |
| 173 | + MTK_VENDOR_ATTR_RFEATURE_CTRL_HE_GI, |
| 174 | + MTK_VENDOR_ATTR_RFEATURE_CTRL_HE_LTF, |
| 175 | + MTK_VENDOR_ATTR_RFEATURE_CTRL_TRIG_TYPE_CFG, |
| 176 | + MTK_VENDOR_ATTR_RFEATURE_CTRL_TRIG_TYPE_EN, |
| 177 | + MTK_VENDOR_ATTR_RFEATURE_CTRL_TRIG_TYPE, |
| 178 | + MTK_VENDOR_ATTR_RFEATURE_CTRL_ACK_PLCY, |
| 179 | + |
| 180 | + /* keep last */ |
| 181 | + NUM_MTK_VENDOR_ATTRS_RFEATURE_CTRL, |
| 182 | + MTK_VENDOR_ATTR_RFEATURE_CTRL_MAX = |
| 183 | + NUM_MTK_VENDOR_ATTRS_RFEATURE_CTRL - 1 |
| 184 | +}; |
| 185 | + |
| 186 | +#define CSI_MAX_COUNT 256 |
| 187 | +#define ETH_ALEN 6 |
| 188 | + |
| 189 | +struct csi_data { |
| 190 | + s16 data_i[CSI_MAX_COUNT]; |
| 191 | + s16 data_q[CSI_MAX_COUNT]; |
| 192 | + s8 rssi; |
| 193 | + u8 snr; |
| 194 | + u32 ts; |
| 195 | + u8 data_bw; |
| 196 | + u8 pri_ch_idx; |
| 197 | + u8 ta[ETH_ALEN]; |
| 198 | + u32 info; |
| 199 | + u8 rx_mode; |
| 200 | + u32 h_idx; |
| 201 | + u16 tx_idx; |
| 202 | + u16 rx_idx; |
| 203 | +}; |
| 204 | + |
| 205 | +struct amnt_data { |
| 206 | + u8 idx; |
| 207 | + u8 addr[ETH_ALEN]; |
| 208 | + s8 rssi[4]; |
| 209 | + u32 last_seen; |
| 210 | +}; |
| 211 | +#endif /* MTK_VENDOR_H */ |
| 212 | -- |
developer | c41fcd3 | 2022-09-20 22:09:06 +0800 | [diff] [blame] | 213 | 2.25.1 |
developer | 91fc945 | 2022-06-28 11:24:56 +0800 | [diff] [blame] | 214 | |