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developer978a0512022-03-08 15:20:03 +08001/dts-v1/;
2#include "mt7981.dtsi"
3/ {
4 model = "MediaTek MT7981 RFB";
5 compatible = "mediatek,mt7981-spim-snand-gsw-rfb";
6 chosen {
7 bootargs = "console=ttyS0,115200n1 loglevel=8 \
8 earlycon=uart8250,mmio32,0x11002000";
9 };
10
11 memory {
12 // fpga ddr2: 128MB*2
13 reg = <0 0x40000000 0 0x10000000>;
14 };
15
developer7e6086a2022-05-18 14:50:36 +080016 gpio-keys {
17 compatible = "gpio-keys";
18 reset {
19 label = "reset";
20 linux,code = <KEY_RESTART>;
21 gpios = <&pio 1 GPIO_ACTIVE_LOW>;
22 };
23
24 wps {
25 label = "wps";
26 linux,code = <KEY_WPS_BUTTON>;
27 gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
28 };
29 };
30
developer978a0512022-03-08 15:20:03 +080031 nmbm_spim_nand {
32 compatible = "generic,nmbm";
33
34 #address-cells = <1>;
35 #size-cells = <1>;
36
37 lower-mtd-device = <&spi_nand>;
38 forced-create;
39
40 partitions {
41 compatible = "fixed-partitions";
42 #address-cells = <1>;
43 #size-cells = <1>;
44
45 partition@0 {
46 label = "BL2";
47 reg = <0x00000 0x0100000>;
48 read-only;
49 };
50
51 partition@100000 {
52 label = "u-boot-env";
53 reg = <0x0100000 0x0080000>;
54 };
55
56 partition@180000 {
57 label = "Factory";
58 reg = <0x180000 0x0200000>;
59 };
60
61 partition@380000 {
62 label = "FIP";
63 reg = <0x380000 0x0200000>;
64 };
65
66 partition@580000 {
67 label = "ubi";
68 reg = <0x580000 0x4000000>;
69 };
70 };
71 };
72
73 sound_wm8960 {
74 compatible = "mediatek,mt79xx-wm8960-machine";
75 mediatek,platform = <&afe>;
76 audio-routing = "Headphone", "HP_L",
77 "Headphone", "HP_R",
78 "LINPUT1", "AMIC",
79 "RINPUT1", "AMIC";
80 mediatek,audio-codec = <&wm8960>;
81 status = "disabled";
82 };
83
84 sound_si3218x {
85 compatible = "mediatek,mt79xx-si3218x-machine";
86 mediatek,platform = <&afe>;
87 mediatek,ext-codec = <&proslic_spi>;
88 status = "disabled";
89 };
90
91 gsw: gsw@0 {
92 compatible = "mediatek,mt753x";
93 mediatek,ethsys = <&ethsys>;
94 #address-cells = <1>;
95 #size-cells = <0>;
96 };
97};
98
99&afe {
100 pinctrl-names = "default";
101 pinctrl-0 = <&pcm_pins>;
102 status = "okay";
103};
104
105&i2c0 {
106 pinctrl-names = "default";
107 pinctrl-0 = <&i2c_pins>;
108 status = "disabled";
109
110 wm8960: wm8960@1a {
111 compatible = "wlf,wm8960";
112 reg = <0x1a>;
113 };
114};
115
116&uart0 {
117 status = "okay";
118};
119
120&watchdog {
121 status = "okay";
122};
123
124&eth {
125 status = "okay";
126
127 gmac0: mac@0 {
128 compatible = "mediatek,eth-mac";
129 reg = <0>;
130 phy-mode = "2500base-x";
131
132 fixed-link {
133 speed = <2500>;
134 full-duplex;
135 pause;
136 };
137 };
138
139 gmac1: mac@1 {
140 compatible = "mediatek,eth-mac";
141 reg = <1>;
142 phy-mode = "gmii";
143 phy-handle = <&phy0>;
144 };
145
146 mdio: mdio-bus {
147 #address-cells = <1>;
148 #size-cells = <0>;
149
150 phy0: ethernet-phy@0 {
151 compatible = "ethernet-phy-id03a2.9461";
152 reg = <0>;
153 phy-mode = "gmii";
154 nvmem-cells = <&phy_calibration>;
155 nvmem-cell-names = "phy-cal-data";
156 };
157
158 };
159};
160
161&gsw {
162 mediatek,mdio = <&mdio>;
163 mediatek,portmap = "llllw";
164 mediatek,mdio_master_pinmux = <1>;
165 reset-gpios = <&pio 39 0>;
166 interrupt-parent = <&pio>;
167 interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
168 status = "okay";
169
170 port6: port@6 {
171 compatible = "mediatek,mt753x-port";
172 reg = <6>;
173 phy-mode = "sgmii";
174 fixed-link {
175 speed = <2500>;
176 full-duplex;
177 };
178 };
179};
180
181&hnat {
182 mtketh-wan = "eth1";
183 mtketh-lan = "eth0";
184 mtketh-max-gmac = <2>;
185 status = "okay";
186};
187
188&spi0 {
189 pinctrl-names = "default";
190 pinctrl-0 = <&spi0_flash_pins>;
191 status = "okay";
192 spi_nand: spi_nand@0 {
193 #address-cells = <1>;
194 #size-cells = <1>;
195 compatible = "spi-nand";
196 reg = <0>;
197 spi-max-frequency = <52000000>;
developer5fb80602023-05-02 18:54:53 +0800198 spi-tx-bus-width = <4>;
199 spi-rx-bus-width = <4>;
developer978a0512022-03-08 15:20:03 +0800200 };
201};
202
203&spi1 {
204 pinctrl-names = "default";
205 pinctrl-0 = <&spic_pins>;
206 status = "okay";
207
208 proslic_spi: proslic_spi@0 {
209 compatible = "silabs,proslic_spi";
210 reg = <0>;
211 spi-max-frequency = <10000000>;
212 spi-cpha = <1>;
213 spi-cpol = <1>;
214 channel_count = <1>;
215 debug_level = <4>; /* 1 = TRC, 2 = DBG, 4 = ERR */
216 reset_gpio = <&pio 15 0>;
217 ig,enable-spi = <1>; /* 1: Enable, 0: Disable */
218 };
219};
220
221&pio {
222
223 i2c_pins: i2c-pins-g0 {
224 mux {
225 function = "i2c";
226 groups = "i2c0_0";
227 };
228 };
229
230 pcm_pins: pcm-pins-g0 {
231 mux {
232 function = "pcm";
233 groups = "pcm";
234 };
235 };
236
237 pwm0_pin: pwm0-pin-g0 {
238 mux {
239 function = "pwm";
240 groups = "pwm0_0";
241 };
242 };
243
244 pwm1_pin: pwm1-pin-g0 {
245 mux {
246 function = "pwm";
247 groups = "pwm1_0";
248 };
249 };
250
251 pwm2_pin: pwm2-pin {
252 mux {
253 function = "pwm";
254 groups = "pwm2";
255 };
256 };
257
258 spi0_flash_pins: spi0-pins {
259 mux {
260 function = "spi";
261 groups = "spi0", "spi0_wp_hold";
262 };
263
264 conf-pu {
265 pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
266 drive-strength = <MTK_DRIVE_8mA>;
developerb5a819c2022-05-16 19:16:07 +0800267 bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
developer978a0512022-03-08 15:20:03 +0800268 };
269
270 conf-pd {
271 pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
272 drive-strength = <MTK_DRIVE_8mA>;
developerb5a819c2022-05-16 19:16:07 +0800273 bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
developer978a0512022-03-08 15:20:03 +0800274 };
275 };
276
277 spic_pins: spi1-pins {
278 mux {
279 function = "spi";
280 groups = "spi1_1";
281 };
282 };
283
284 uart1_pins: uart1-pins-g1 {
285 mux {
286 function = "uart";
287 groups = "uart1_1";
288 };
289 };
290
291 uart2_pins: uart2-pins-g1 {
292 mux {
293 function = "uart";
294 groups = "uart2_1";
295 };
296 };
297};
298
299&xhci {
300 mediatek,u3p-dis-msk = <0x0>;
301 phys = <&u2port0 PHY_TYPE_USB2>,
302 <&u3port0 PHY_TYPE_USB3>;
303 status = "okay";
304};