developer | 5d148cb | 2023-06-02 13:08:11 +0800 | [diff] [blame] | 1 | From 8e758bb3fc5eee316843eeaad1601ee44ce1c899 Mon Sep 17 00:00:00 2001 |
| 2 | From: Sam Shih <sam.shih@mediatek.com> |
| 3 | Date: Fri, 2 Jun 2023 13:06:30 +0800 |
| 4 | Subject: [PATCH] |
| 5 | [networking][999-2710-net-make-napi-disable-symmetric-with-enable.patch] |
| 6 | |
| 7 | --- |
| 8 | net/core/dev.c | 17 ++++++++++++----- |
| 9 | 1 file changed, 12 insertions(+), 5 deletions(-) |
| 10 | |
| 11 | diff --git a/net/core/dev.c b/net/core/dev.c |
| 12 | index 503af0034..cccd7b407 100644 |
| 13 | --- a/net/core/dev.c |
| 14 | +++ b/net/core/dev.c |
| 15 | @@ -6389,18 +6389,25 @@ EXPORT_SYMBOL(netif_napi_add); |
| 16 | |
| 17 | void napi_disable(struct napi_struct *n) |
| 18 | { |
| 19 | + unsigned long val, new; |
| 20 | + |
| 21 | might_sleep(); |
| 22 | set_bit(NAPI_STATE_DISABLE, &n->state); |
| 23 | |
| 24 | - while (test_and_set_bit(NAPI_STATE_SCHED, &n->state)) |
| 25 | - msleep(1); |
| 26 | - while (test_and_set_bit(NAPI_STATE_NPSVC, &n->state)) |
| 27 | - msleep(1); |
| 28 | + do { |
| 29 | + val = READ_ONCE(n->state); |
| 30 | + if (val & (NAPIF_STATE_SCHED | NAPIF_STATE_NPSVC)) { |
| 31 | + usleep_range(20, 200); |
| 32 | + continue; |
| 33 | + } |
| 34 | + |
| 35 | + new = val | NAPIF_STATE_SCHED | NAPIF_STATE_NPSVC; |
| 36 | + new &= ~(NAPIF_STATE_THREADED); |
| 37 | + } while (cmpxchg(&n->state, val, new) != val); |
| 38 | |
| 39 | hrtimer_cancel(&n->timer); |
| 40 | |
| 41 | clear_bit(NAPI_STATE_DISABLE, &n->state); |
| 42 | - clear_bit(NAPI_STATE_THREADED, &n->state); |
| 43 | } |
| 44 | EXPORT_SYMBOL(napi_disable); |
| 45 | |
| 46 | -- |
| 47 | 2.34.1 |
| 48 | |