| From 8e758bb3fc5eee316843eeaad1601ee44ce1c899 Mon Sep 17 00:00:00 2001 |
| From: Sam Shih <sam.shih@mediatek.com> |
| Date: Fri, 2 Jun 2023 13:06:30 +0800 |
| Subject: [PATCH] |
| [networking][999-2710-net-make-napi-disable-symmetric-with-enable.patch] |
| |
| --- |
| net/core/dev.c | 17 ++++++++++++----- |
| 1 file changed, 12 insertions(+), 5 deletions(-) |
| |
| diff --git a/net/core/dev.c b/net/core/dev.c |
| index 503af0034..cccd7b407 100644 |
| --- a/net/core/dev.c |
| +++ b/net/core/dev.c |
| @@ -6389,18 +6389,25 @@ EXPORT_SYMBOL(netif_napi_add); |
| |
| void napi_disable(struct napi_struct *n) |
| { |
| + unsigned long val, new; |
| + |
| might_sleep(); |
| set_bit(NAPI_STATE_DISABLE, &n->state); |
| |
| - while (test_and_set_bit(NAPI_STATE_SCHED, &n->state)) |
| - msleep(1); |
| - while (test_and_set_bit(NAPI_STATE_NPSVC, &n->state)) |
| - msleep(1); |
| + do { |
| + val = READ_ONCE(n->state); |
| + if (val & (NAPIF_STATE_SCHED | NAPIF_STATE_NPSVC)) { |
| + usleep_range(20, 200); |
| + continue; |
| + } |
| + |
| + new = val | NAPIF_STATE_SCHED | NAPIF_STATE_NPSVC; |
| + new &= ~(NAPIF_STATE_THREADED); |
| + } while (cmpxchg(&n->state, val, new) != val); |
| |
| hrtimer_cancel(&n->timer); |
| |
| clear_bit(NAPI_STATE_DISABLE, &n->state); |
| - clear_bit(NAPI_STATE_THREADED, &n->state); |
| } |
| EXPORT_SYMBOL(napi_disable); |
| |
| -- |
| 2.34.1 |
| |