blob: aa31f2294a9768a3e607a20757ab93ac0eb90ced [file] [log] [blame]
developer2cdaeb12022-10-04 20:25:05 +08001diff --git a/drivers/cpufreq/mediatek-cpufreq.c b/drivers/cpufreq/mediatek-cpufreq.c
2index b23b6d2..147a224 100644
3--- a/drivers/cpufreq/mediatek-cpufreq.c
4+++ b/drivers/cpufreq/mediatek-cpufreq.c
5@@ -15,6 +15,7 @@
6 #include <linux/regulator/consumer.h>
7 #include <linux/slab.h>
8 #include <linux/thermal.h>
9+#include <linux/nvmem-consumer.h>
10
11 #define MIN_VOLT_SHIFT (100000)
12 #define MAX_VOLT_SHIFT (200000)
13@@ -539,6 +540,11 @@ static int mtk_cpufreq_init(struct cpufreq_policy *policy)
14 struct mtk_cpu_dvfs_info *info;
15 struct cpufreq_frequency_table *freq_table;
16 int ret;
17+ int target_vproc;
developer59515632022-10-15 16:55:26 +080018+ u8 reg_val;
developer2cdaeb12022-10-04 20:25:05 +080019+ struct nvmem_cell *cell;
20+ size_t len;
developer59515632022-10-15 16:55:26 +080021+ u8 *buf;
developer2cdaeb12022-10-04 20:25:05 +080022
23 info = mtk_cpu_dvfs_info_lookup(policy->cpu);
24 if (!info) {
25@@ -547,6 +553,22 @@ static int mtk_cpufreq_init(struct cpufreq_policy *policy)
26 return -EINVAL;
27 }
28
29+ cell = nvmem_cell_get(info->cpu_dev, "calibration-data");
30+ if (!IS_ERR(cell)) {
developer59515632022-10-15 16:55:26 +080031+ buf = (u8 *)nvmem_cell_read(cell, &len);
developer2cdaeb12022-10-04 20:25:05 +080032+ nvmem_cell_put(cell);
33+ if (!IS_ERR(buf)) {
34+ reg_val = buf[0] & 0x1f;
35+ pr_debug("%s: read vbinning value: %d\n", __func__, reg_val);
36+ if (reg_val > 0) {
37+ target_vproc = 850000 + reg_val * 10000;
38+ dev_pm_opp_remove(info->cpu_dev, 1800000000);
39+ dev_pm_opp_add(info->cpu_dev, 1800000000, target_vproc);
40+ }
41+ kfree(buf);
42+ }
43+ }
44+
45 ret = dev_pm_opp_init_cpufreq_table(info->cpu_dev, &freq_table);
46 if (ret) {
47 pr_err("failed to init cpufreq table for cpu%d: %d\n",