developer | 691e73f | 2021-06-28 19:41:35 +0800 | [diff] [blame] | 1 | /dts-v1/; |
developer | 565bacb | 2021-09-28 21:26:32 +0800 | [diff] [blame] | 2 | #include "mt7986a.dtsi" |
| 3 | #include "mt7986a-pinctrl.dtsi" |
| 4 | #include "mt7986-spim-nor-partition.dtsi" |
developer | 691e73f | 2021-06-28 19:41:35 +0800 | [diff] [blame] | 5 | / { |
| 6 | model = "MediaTek MT7986a RFB"; |
| 7 | compatible = "mediatek,mt7986a-2500wan-nor-rfb"; |
developer | 565bacb | 2021-09-28 21:26:32 +0800 | [diff] [blame] | 8 | chosen { |
| 9 | bootargs = "console=ttyS0,115200n1 loglevel=8 \ |
| 10 | earlycon=uart8250,mmio32,0x11002000"; |
| 11 | }; |
| 12 | |
| 13 | memory { |
| 14 | reg = <0 0x40000000 0 0x10000000>; |
| 15 | }; |
| 16 | |
| 17 | sound { |
| 18 | compatible = "mediatek,mt7986-wm8960-machine"; |
| 19 | mediatek,platform = <&afe>; |
| 20 | audio-routing = "Headphone", "HP_L", |
| 21 | "Headphone", "HP_R", |
| 22 | "LINPUT1", "AMIC", |
| 23 | "RINPUT1", "AMIC"; |
| 24 | mediatek,audio-codec = <&wm8960>; |
| 25 | status = "okay"; |
| 26 | }; |
developer | 691e73f | 2021-06-28 19:41:35 +0800 | [diff] [blame] | 27 | }; |
| 28 | |
developer | 209e52d | 2022-06-30 11:32:57 +0800 | [diff] [blame] | 29 | &fan { |
| 30 | pwms = <&pwm 1 50000 0>; |
| 31 | status = "disabled"; |
| 32 | }; |
| 33 | |
developer | 565bacb | 2021-09-28 21:26:32 +0800 | [diff] [blame] | 34 | &pwm { |
| 35 | pinctrl-names = "default"; |
| 36 | pinctrl-0 = <&pwm0_pin &pwm1_pin_g1>; |
developer | 691e73f | 2021-06-28 19:41:35 +0800 | [diff] [blame] | 37 | status = "okay"; |
developer | 565bacb | 2021-09-28 21:26:32 +0800 | [diff] [blame] | 38 | }; |
developer | 5b91be7 | 2021-09-27 14:03:07 +0800 | [diff] [blame] | 39 | |
developer | 565bacb | 2021-09-28 21:26:32 +0800 | [diff] [blame] | 40 | &uart0 { |
| 41 | status = "okay"; |
| 42 | }; |
| 43 | |
| 44 | &uart1 { |
| 45 | pinctrl-names = "default"; |
| 46 | pinctrl-0 = <&uart1_pins>; |
| 47 | status = "okay"; |
| 48 | }; |
| 49 | |
| 50 | &uart2 { |
| 51 | pinctrl-names = "default"; |
| 52 | pinctrl-0 = <&uart2_pins>; |
developer | a2613e6 | 2022-07-01 18:29:37 +0800 | [diff] [blame] | 53 | status = "disabled"; |
developer | 565bacb | 2021-09-28 21:26:32 +0800 | [diff] [blame] | 54 | }; |
| 55 | |
| 56 | &i2c0 { |
| 57 | pinctrl-names = "default"; |
| 58 | pinctrl-0 = <&i2c_pins>; |
| 59 | status = "okay"; |
| 60 | |
| 61 | wm8960: wm8960@1a { |
| 62 | compatible = "wlf,wm8960"; |
| 63 | reg = <0x1a>; |
developer | 5b91be7 | 2021-09-27 14:03:07 +0800 | [diff] [blame] | 64 | }; |
| 65 | }; |
| 66 | |
developer | 565bacb | 2021-09-28 21:26:32 +0800 | [diff] [blame] | 67 | &auxadc { |
| 68 | status = "okay"; |
developer | 5b91be7 | 2021-09-27 14:03:07 +0800 | [diff] [blame] | 69 | }; |
| 70 | |
developer | 565bacb | 2021-09-28 21:26:32 +0800 | [diff] [blame] | 71 | &watchdog { |
| 72 | status = "okay"; |
developer | 691e73f | 2021-06-28 19:41:35 +0800 | [diff] [blame] | 73 | }; |
| 74 | |
developer | 565bacb | 2021-09-28 21:26:32 +0800 | [diff] [blame] | 75 | ð { |
| 76 | status = "okay"; |
| 77 | |
| 78 | gmac0: mac@0 { |
| 79 | compatible = "mediatek,eth-mac"; |
| 80 | reg = <0>; |
| 81 | phy-mode = "2500base-x"; |
developer | 283fc45 | 2022-08-18 19:50:33 +0800 | [diff] [blame^] | 82 | |
| 83 | fixed-link { |
| 84 | speed = <2500>; |
| 85 | full-duplex; |
| 86 | pause; |
| 87 | link-gpio = <&pio 47 0>; |
| 88 | phy-handle = <&phy5>; |
| 89 | label = "lan5"; |
| 90 | }; |
developer | 565bacb | 2021-09-28 21:26:32 +0800 | [diff] [blame] | 91 | }; |
| 92 | |
| 93 | gmac1: mac@1 { |
| 94 | compatible = "mediatek,eth-mac"; |
| 95 | reg = <1>; |
| 96 | phy-mode = "2500base-x"; |
developer | f0a1e45 | 2022-08-15 12:06:11 +0800 | [diff] [blame] | 97 | phy-handle = <&phy6>; |
developer | 565bacb | 2021-09-28 21:26:32 +0800 | [diff] [blame] | 98 | }; |
| 99 | |
| 100 | mdio: mdio-bus { |
| 101 | #address-cells = <1>; |
| 102 | #size-cells = <0>; |
developer | 691e73f | 2021-06-28 19:41:35 +0800 | [diff] [blame] | 103 | |
developer | f0a1e45 | 2022-08-15 12:06:11 +0800 | [diff] [blame] | 104 | reset-gpios = <&pio 6 1>; |
| 105 | reset-delay-us = <600>; |
| 106 | |
developer | 565bacb | 2021-09-28 21:26:32 +0800 | [diff] [blame] | 107 | phy5: phy@5 { |
developer | 283fc45 | 2022-08-18 19:50:33 +0800 | [diff] [blame^] | 108 | compatible = "ethernet-phy-id67c9.de0a"; |
developer | 565bacb | 2021-09-28 21:26:32 +0800 | [diff] [blame] | 109 | reg = <5>; |
developer | 565bacb | 2021-09-28 21:26:32 +0800 | [diff] [blame] | 110 | }; |
developer | 691e73f | 2021-06-28 19:41:35 +0800 | [diff] [blame] | 111 | |
developer | 565bacb | 2021-09-28 21:26:32 +0800 | [diff] [blame] | 112 | phy6: phy@6 { |
developer | f0a1e45 | 2022-08-15 12:06:11 +0800 | [diff] [blame] | 113 | compatible = "ethernet-phy-ieee802.3-c45"; |
developer | 565bacb | 2021-09-28 21:26:32 +0800 | [diff] [blame] | 114 | reg = <6>; |
developer | 565bacb | 2021-09-28 21:26:32 +0800 | [diff] [blame] | 115 | }; |
| 116 | |
| 117 | switch@0 { |
| 118 | compatible = "mediatek,mt7531"; |
| 119 | reg = <31>; |
| 120 | reset-gpios = <&pio 5 0>; |
| 121 | |
| 122 | ports { |
| 123 | #address-cells = <1>; |
| 124 | #size-cells = <0>; |
| 125 | |
| 126 | port@0 { |
| 127 | reg = <0>; |
| 128 | label = "lan0"; |
| 129 | }; |
| 130 | |
| 131 | port@1 { |
| 132 | reg = <1>; |
| 133 | label = "lan1"; |
| 134 | }; |
| 135 | |
| 136 | port@2 { |
| 137 | reg = <2>; |
| 138 | label = "lan2"; |
| 139 | }; |
| 140 | |
| 141 | port@3 { |
| 142 | reg = <3>; |
| 143 | label = "lan3"; |
| 144 | }; |
| 145 | |
| 146 | port@4 { |
| 147 | reg = <4>; |
| 148 | label = "lan4"; |
| 149 | }; |
| 150 | |
| 151 | port@5 { |
| 152 | reg = <5>; |
| 153 | label = "lan5"; |
| 154 | phy-mode = "2500base-x"; |
| 155 | |
| 156 | fixed-link { |
| 157 | speed = <2500>; |
| 158 | full-duplex; |
| 159 | pause; |
| 160 | }; |
| 161 | }; |
| 162 | |
| 163 | port@6 { |
| 164 | reg = <6>; |
| 165 | label = "cpu"; |
| 166 | ethernet = <&gmac0>; |
| 167 | phy-mode = "2500base-x"; |
| 168 | |
| 169 | fixed-link { |
| 170 | speed = <2500>; |
| 171 | full-duplex; |
| 172 | pause; |
| 173 | }; |
developer | 691e73f | 2021-06-28 19:41:35 +0800 | [diff] [blame] | 174 | }; |
| 175 | }; |
| 176 | }; |
| 177 | }; |
| 178 | }; |
developer | 565bacb | 2021-09-28 21:26:32 +0800 | [diff] [blame] | 179 | |
| 180 | &hnat { |
| 181 | mtketh-wan = "eth1"; |
| 182 | mtketh-lan = "lan"; |
| 183 | mtketh-max-gmac = <2>; |
| 184 | status = "okay"; |
| 185 | }; |
| 186 | |
| 187 | &spi0 { |
| 188 | pinctrl-names = "default"; |
| 189 | pinctrl-0 = <&spi_flash_pins>; |
| 190 | cs-gpios = <0>, <0>; |
| 191 | status = "okay"; |
| 192 | spi_nor@0 { |
| 193 | #address-cells = <1>; |
| 194 | #size-cells = <1>; |
| 195 | compatible = "jedec,spi-nor"; |
| 196 | reg = <0>; |
developer | b9b1ffc | 2021-12-16 14:19:08 +0800 | [diff] [blame] | 197 | spi-max-frequency = <52000000>; |
developer | 565bacb | 2021-09-28 21:26:32 +0800 | [diff] [blame] | 198 | spi-tx-buswidth = <4>; |
| 199 | spi-rx-buswidth = <4>; |
| 200 | }; |
| 201 | }; |
| 202 | |
| 203 | &spi1 { |
| 204 | pinctrl-names = "default"; |
| 205 | pinctrl-0 = <&spic_pins_g2>; |
| 206 | status = "okay"; |
| 207 | }; |
| 208 | |
| 209 | &pcie0 { |
| 210 | pinctrl-names = "default"; |
| 211 | pinctrl-0 = <&pcie0_pins>; |
| 212 | status = "okay"; |
| 213 | }; |
| 214 | |
| 215 | &wbsys { |
| 216 | mediatek,mtd-eeprom = <&factory 0x0000>; |
| 217 | status = "okay"; |
| 218 | }; |
| 219 | |
| 220 | &pio { |
| 221 | spi_flash_pins: spi-flash-pins-33-to-38 { |
| 222 | mux { |
| 223 | function = "flash"; |
| 224 | groups = "spi0", "spi0_wp_hold"; |
| 225 | }; |
| 226 | conf-pu { |
| 227 | pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP"; |
| 228 | drive-strength = <MTK_DRIVE_8mA>; |
developer | b5a819c | 2022-05-16 19:16:07 +0800 | [diff] [blame] | 229 | bias-pull-up = <MTK_PUPD_SET_R1R0_11>; |
developer | 565bacb | 2021-09-28 21:26:32 +0800 | [diff] [blame] | 230 | }; |
| 231 | conf-pd { |
| 232 | pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO"; |
| 233 | drive-strength = <MTK_DRIVE_8mA>; |
developer | b5a819c | 2022-05-16 19:16:07 +0800 | [diff] [blame] | 234 | bias-pull-down = <MTK_PUPD_SET_R1R0_11>; |
developer | 565bacb | 2021-09-28 21:26:32 +0800 | [diff] [blame] | 235 | }; |
| 236 | }; |
| 237 | }; |