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git01.mediatek.com / filogic / uboot / fed4c95afc8352c18e222909de9c73ff92763015 / drivers / clk / rockchip / clk_rk3328.c
  1. 416f8d3 rockchip: clk: fix wrong CONFIG_IS_ENABLED handling by Heiko Stuebner · Sat Nov 09 00:06:30 2019 +0100
  2. 93c4485 clk: rockchip: rk3328: Configure CPU clock by Simon South · Thu Oct 10 15:28:36 2019 -0400
  3. 2a5eb5e rockchip: clk: rk3328: remove clk_enable() by Kever Yang · Wed Aug 28 16:23:49 2019 +0800
  4. 54467d9 rockchip: clk: rk3328: add clk_enable ops for HCLK_HOST0 by Kever Yang · Thu Aug 15 15:37:31 2019 +0800
  5. 9fbe17c rockchip: use 'arch-rockchip' as header file path by Kever Yang · Thu Mar 28 11:01:23 2019 +0800
  6. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · Sun May 06 17:58:06 2018 -0400
  7. bdfb5c4 Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR by Tom Rini · Wed Apr 18 13:50:47 2018 -0400
  8. bb870a5 rockchip: clk: rk3328: convert to use live dt by Kever Yang · Sun Feb 11 11:53:09 2018 +0800
  9. f01c581 clk: rockchip: Add rk3328 gamc clock support by David Wu · Sat Jan 13 14:02:36 2018 +0800
  10. 432976f rockchip: clk: bind reset driver by Elaine Zhang · Tue Dec 19 18:22:38 2017 +0800
  11. 4fbb6c2 rockchip: clock: update sysreset driver binding by Kever Yang · Fri Nov 03 15:16:13 2017 +0800
  12. a942223 rockchip: clk: Add rk3328 SARADC clock support by David Wu · Wed Sep 20 14:35:44 2017 +0800
  13. 99b546d rockchip: clk: update dwmmc clock div by Kever Yang · Thu Jul 27 12:54:01 2017 +0800
  14. ba1dea4 dm: Rename dev_addr..() functions by Simon Glass · Wed May 17 17:18:05 2017 -0600
  15. 5a02763 rockchip: clk: rk3328: add ciu_clk entry for eMMC/SDMMC by Xu Ziyuan · Sun Apr 16 17:44:46 2017 +0800
  16. 1cfd550 rockchip: rk3328: add clock driver by Kever Yang · Thu Feb 23 15:37:52 2017 +0800