Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / fed4c95afc8352c18e222909de9c73ff92763015 / drivers / clk / rockchip / clk_rk3288.c
  1. 416f8d3 rockchip: clk: fix wrong CONFIG_IS_ENABLED handling by Heiko Stuebner · Sat Nov 09 00:06:30 2019 +0100
  2. 0aa59ee rockchip: clk: rk3288: remove clk_enable() by Kever Yang · Wed Aug 28 16:23:48 2019 +0800
  3. 9fbe17c rockchip: use 'arch-rockchip' as header file path by Kever Yang · Thu Mar 28 11:01:23 2019 +0800
  4. cf6741b rockchip: rk3288: Add i2s pinctrl and clock support by Simon Glass · Thu Dec 27 20:15:20 2018 -0700
  5. d2d191d rockchip: clk: rk3288: handle clk_enable requests for GMAC by Jonathan Gray · Tue May 08 19:49:05 2018 +1000
  6. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · Sun May 06 17:58:06 2018 -0400
  7. 83d71f9 rockchip: clk: rk3288: add clk_enable function and support USB HOST0/HSIC by Wadim Egorov · Mon Mar 19 16:39:29 2018 +0100
  8. 08ffa44 rockchip: clk: rk3288: convert to use live dt by Kever Yang · Sun Feb 11 11:53:08 2018 +0800
  9. 6dd2fb4 rockchip: clk: guard set_parent implementations against OF_PLATDATA by Philipp Tomsich · Thu Jan 25 15:27:10 2018 +0100
  10. 879d2fb clk: rockchip: clk_rk3288: Implement "assign-clock-parent" and "assign-clock-rate" by David Wu · Sat Jan 13 14:06:33 2018 +0800
  11. 432976f rockchip: clk: bind reset driver by Elaine Zhang · Tue Dec 19 18:22:38 2017 +0800
  12. 4fbb6c2 rockchip: clock: update sysreset driver binding by Kever Yang · Fri Nov 03 15:16:13 2017 +0800
  13. 3c248b2 rockchip: clk: Add SARADC clock support for rk3288 by David Wu · Wed Sep 20 14:28:19 2017 +0800
  14. f20995b rockchip: clk: remove RATE_TO_DIV by Kever Yang · Thu Jul 27 12:54:02 2017 +0800
  15. 99b546d rockchip: clk: update dwmmc clock div by Kever Yang · Thu Jul 27 12:54:01 2017 +0800
  16. 30ca6a4 rockchip: Init clocks again when chain-loading by Simon Glass · Wed May 31 17:57:32 2017 -0600
  17. 303384f rockchip: rk3288: Convert clock driver to use shifted masks by Simon Glass · Wed May 31 17:57:31 2017 -0600
  18. ba1dea4 dm: Rename dev_addr..() functions by Simon Glass · Wed May 17 17:18:05 2017 -0600
  19. 42118e4 rockchip: clk: rk3288: add ciu_clk entry for eMMC/SDMMC/SDIO by Xu Ziyuan · Sun Apr 16 17:44:45 2017 +0800
  20. 643549b rockchip: clk: rk3288: limit gpll and cpll init to SPL build by Heiko Stübner · Sat Feb 18 19:46:22 2017 +0100
  21. cb1c7af rockchip: clk: Support setting ACLK by Simon Glass · Sun Nov 13 14:22:13 2016 -0700
  22. 901c2ce rockchip: rk3288: Move rockchip_get_cru() out of the driver by Simon Glass · Sat Oct 01 20:04:52 2016 -0600
  23. 4051462 clk: rk3288: add PWM clock get rate by Kever Yang · Fri Aug 12 17:57:05 2016 +0800
  24. 1b7dcc3 rockchip: remove log2 reimplementation from clock drivers by Heiko Stübner · Fri Jul 22 23:51:06 2016 +0200
  25. 4776f0b move: rockchip: move clock drivers into a subdirectory by Heiko Stübner · Fri Jul 29 14:47:21 2016 +0200[Renamed from drivers/clk/clk_rk3288.c]
  26. ae8fe41 rockchip: Use rockchip_get_clk() to obtain the SoC clock by Simon Glass · Sun Jul 17 15:23:17 2016 -0600
  27. 7f78c24 rockchip: rk3288: fix FREF_MIN_HZ constant by Heiko Stübner · Sat Jul 16 00:17:17 2016 +0200
  28. 1bd4a54 cosmetic: rockchip: rk3288: rename rkclk_configure_cpu by Heiko Stübner · Sat Jul 16 00:17:16 2016 +0200
  29. 00c5fd4 rockchip: clk: Update the rk3288 driver to support of-platdata by Simon Glass · Mon Jul 04 11:58:29 2016 -0600
  30. 994c29d rockchip: clk: Move all DT decoding to ofdata_to_platdata() by Simon Glass · Mon Jul 04 11:58:28 2016 -0600
  31. a962243 clk: convert API to match reset/mailbox style by Stephen Warren · Fri Jun 17 09:44:00 2016 -0600
  32. 9a8f4cf Merge git://git.denx.de/u-boot-dm by Tom Rini · Fri May 27 15:49:43 2016 -0400
  33. 3ce69bf rockchip: rk3288: Add clock support for the gmac ethernet interface by Sjoerd Simons · Sun Feb 28 22:24:59 2016 +0100
  34. 859f256 Rename reset to sysreset by Stephen Warren · Thu May 12 12:03:35 2016 -0600
  35. 94906e4 rockchip: spl: Support full-speed CPU in SPL by Simon Glass · Thu Jan 21 19:45:17 2016 -0700
  36. e6a682b rockchip: rk3288: clock: Fix various minor errors by Simon Glass · Thu Jan 21 19:45:15 2016 -0700
  37. 273afb2 rockchip: clk: Add support for clocks needed by the displays by Simon Glass · Thu Jan 21 19:45:02 2016 -0700
  38. 5562bf1 rockchip: Rename the CRU_MODE_CON fields by Simon Glass · Thu Jan 21 19:45:01 2016 -0700
  39. 410d45c rockchip: clk: Make rkclk_get_clk() SoC-specific by Simon Glass · Thu Jan 21 19:44:05 2016 -0700
  40. d4a8a68 rockchip: mmc: Update the driver to use the new clock ID by Simon Glass · Thu Jan 21 19:43:45 2016 -0700
  41. 344f366 rockchip: clock: Add a function to find a clock by ID by Simon Glass · Thu Jan 21 19:43:41 2016 -0700
  42. 398ced1 rockchip: clk: Add a function to get a peripheral clock rate by Simon Glass · Thu Jan 21 19:43:40 2016 -0700
  43. afe0cb0 rockchip: clock: Rename the general clock variable to gclk_rate by Simon Glass · Thu Jan 21 19:43:39 2016 -0700
  44. 8d32f4b rockchip: Use a separate clock ID for clocks by Simon Glass · Thu Jan 21 19:43:38 2016 -0700
  45. ecf20f6 clk: add static qualifier to local functions by Masahiro Yamada · Wed Jan 13 13:16:10 2016 +0900
  46. 421358c rockchip: rk3288: Add clock driver by Simon Glass · Sun Aug 30 16:55:31 2015 -0600