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git01.mediatek.com / filogic / uboot / e22085abbaf9eee11ef507ade130188d143f25a4 / arch / riscv
  1. f7e6d33 riscv: Implement new SBI v0.2 extensions by Bin Meng · Mon Mar 09 19:35:31 2020 -0700
  2. 887d809 riscv: Introduce a new config for SBI v0.1 by Bin Meng · Mon Mar 09 19:35:30 2020 -0700
  3. c20421b riscv: Add SBI v0.2 extension definitions by Bin Meng · Mon Mar 09 19:35:29 2020 -0700
  4. ee3bcd0 riscv: Add basic support for SBI v0.2 by Bin Meng · Mon Mar 09 19:35:28 2020 -0700
  5. 9da11d1 riscv: Mark existing SBI as v0.1 SBI by Bin Meng · Mon Mar 09 19:35:27 2020 -0700
  6. fb5eabc riscv: Avoid calling sbi_clear_ipi() by Bin Meng · Fri Mar 06 00:44:17 2020 -0800
  7. ad76cd4 riscv: Fix sbi_remote_sfence_vma{,_asid} by Bin Meng · Fri Mar 06 00:44:16 2020 -0800
  8. 6373a17 dma-mapping: move dma_map_(un)single() to <linux/dma-mapping.h> by Masahiro Yamada · Fri Feb 14 16:40:19 2020 +0900
  9. 05a5dba dma-mapping: fix the prototype of dma_unmap_single() by Masahiro Yamada · Fri Feb 14 16:40:18 2020 +0900
  10. 7167d67 dma-mapping: fix the prototype of dma_map_single() by Masahiro Yamada · Fri Feb 14 16:40:17 2020 +0900
  11. b7b1838 Merge tag 'dm-pull-6feb20' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm by Tom Rini · Tue Feb 11 10:58:41 2020 -0500
  12. 750fee5 riscv: Remove unnecessary instruction by Sean Anderson · Mon Jan 27 16:39:44 2020 -0500
  13. e8b46a1 riscv: Add option to print registers on exception by Sean Anderson · Wed Dec 25 00:27:44 2019 -0500
  14. 5e75a27 riscv: Fix breakage caused by linker relaxation by Sean Anderson · Tue Dec 17 21:35:32 2019 -0500
  15. d66c5f7 dm: core: Require users of devres to include the header by Simon Glass · Mon Feb 03 07:36:15 2020 -0700
  16. 4a81a21 asm: dma-mapping.h: Fix dma mapping functions by Vignesh Raghavendra · Thu Jan 16 14:23:45 2020 +0530
  17. f11478f common: Move hang() to the same header as panic() by Simon Glass · Sat Dec 28 10:45:07 2019 -0700
  18. 3bbe70c common: Move device-tree setup functions to fdt_support.h by Simon Glass · Sat Dec 28 10:44:54 2019 -0700
  19. 284f71b common: Move relocate_code() to init.h by Simon Glass · Sat Dec 28 10:44:45 2019 -0700
  20. c308e01 riscv: add option to wait for ack from secondary harts in smp functions by Lukas Auer · Sun Dec 08 23:28:51 2019 +0100
  21. c7460b8 riscv: add functions for reading the IPI status by Lukas Auer · Sun Dec 08 23:28:50 2019 +0100
  22. 314d3ef riscv: dts: Add #address-cells and #size-cells in nor node by Rick Chen · Thu Nov 14 13:52:29 2019 +0800
  23. 3209fb8 riscv: dts: Support four cores SMP by Rick Chen · Thu Nov 14 13:52:28 2019 +0800
  24. 55bc1bd riscv: Fix clear bss loop in the start-up code by Rick Chen · Thu Nov 14 13:52:27 2019 +0800
  25. 883275d riscv: ax25: cache: Add SPL_RISCV_MMODE for SPL by Rick Chen · Thu Nov 14 13:52:25 2019 +0800
  26. eb61303 riscv: andes_plic: Fix some wrong configurations by Rick Chen · Thu Nov 14 13:52:24 2019 +0800
  27. 276292a riscv: ax25: add SPL support by Rick Chen · Thu Nov 14 13:52:21 2019 +0800
  28. a8ed626 riscv: dts: Add hifive-unleashed-a00 dts from Linux by Jagan Teki · Mon Nov 18 16:59:40 2019 +0530
  29. 0381370 riscv: increase stack size to avoid a stack overflow during distro boot by Lukas Auer · Sun Oct 20 20:53:47 2019 +0200
  30. 6980b6b common: Move board_get_usable_ram_top() out of common.h by Simon Glass · Thu Nov 14 12:57:45 2019 -0700
  31. 8f3f761 common: Move enable/disable_interrupts out of common.h by Simon Glass · Thu Nov 14 12:57:42 2019 -0700
  32. 9b61c7c common: Move interrupt functions into a new header by Simon Glass · Thu Nov 14 12:57:41 2019 -0700
  33. 6333448 common: Move ARM cache operations out of common.h by Simon Glass · Thu Nov 14 12:57:39 2019 -0700
  34. 1d91ba7 common: Move some cache and MMU functions out of common.h by Simon Glass · Thu Nov 14 12:57:37 2019 -0700
  35. b8745f0 RISC-V: Align boot image header with Linux by Atish Patra · Wed Oct 09 10:34:17 2019 -0700
  36. 211be3b gpio: sifive: add support for DM based gpio driver for FU540-SoC by Sagar Shrikant Kadam · Tue Oct 01 10:00:46 2019 -0700
  37. 49cb706 riscv: cache: use CCTL to flush d-cache by Rick Chen · Wed Aug 28 18:46:11 2019 +0800
  38. 5ff8f41 riscv: dts: move out AE350 L2 node from cpus node by Rick Chen · Wed Aug 28 18:46:10 2019 +0800
  39. 05a684e riscv: cache: Flush L2 cache before jump to linux by Rick Chen · Wed Aug 28 18:46:09 2019 +0800
  40. 19117d2 riscv: ax25: add imply v5l2 cache controller by Rick Chen · Thu Aug 29 10:30:13 2019 +0800
  41. eaae83b riscv: andes_plic: init plic by scanning each cpu node by Rick Chen · Wed Aug 21 11:26:50 2019 +0800
  42. b9ad45d riscv: update fix_rela_dyn by Marcus Comstedt · Sun Aug 11 14:45:29 2019 +0200
  43. e9fbc71 riscv: add a generic FIT generator script by Lukas Auer · Wed Aug 21 21:14:47 2019 +0200
  44. 2a2a925 riscv: support SPL stack and global data relocation by Lukas Auer · Wed Aug 21 21:14:46 2019 +0200
  45. 396f0bd riscv: add SPL support by Lukas Auer · Wed Aug 21 21:14:45 2019 +0200
  46. 6134659 riscv: add run mode configuration for SPL by Lukas Auer · Wed Aug 21 21:14:43 2019 +0200
  47. f942636 riscv: Access CSRs using CSR numbers by Bin Meng · Wed Jul 10 23:43:13 2019 -0700
  48. a27264c riscv: Sync csr.h with Linux kernel v5.2 by Bin Meng · Wed Jul 10 23:43:12 2019 -0700
  49. 9cce6f7 env: Drop environment.h header file where not needed by Simon Glass · Thu Aug 01 09:47:12 2019 -0600
  50. d680e9a efi_loader: use predefined constants in crt0_*_efi.S by Heinrich Schuchardt · Thu Jul 11 06:39:32 2019 +0200
  51. 4216f34 riscv: Add Microchip MPFS Icicle board support by Padmarao Begari · Tue May 28 15:47:51 2019 +0530
  52. 43ec7e0 CONFIG_SPL_SYS_[DI]CACHE_OFF: add by Trevor Woerner · Fri May 03 09:41:00 2019 -0400
  53. ba64b8b CONFIG_SYS_[DI]CACHE_OFF: convert to Kconfig by Trevor Woerner · Fri May 03 09:40:59 2019 -0400
  54. 583b409 RISCV: image: Add booti support by Atish Patra · Mon May 06 17:49:39 2019 -0700
  55. 3043b90 riscv: prior_stage_fdt_address should only be used when OF_PRIOR_STAGE is enabled by Rick Chen · Tue Apr 30 13:49:35 2019 +0800
  56. e5e6c36 riscv: Introduce CONFIG_XIP to support booting from flash by Rick Chen · Tue Apr 30 13:49:33 2019 +0800
  57. a009fa7 dts: switch spi-flash to jedec, spi-nor compatible by Neil Armstrong · Sun Feb 10 10:16:20 2019 +0000
  58. 5ca381e riscv: dts: fix CONFIG_DEFAULT_DEVICE_TREE failure by Rick Chen · Wed Apr 03 10:43:37 2019 +0800
  59. 5e56cda riscv: dts: ae350 support SMP by Rick Chen · Tue Apr 02 15:56:43 2019 +0800
  60. f71410a riscv: ax25: Andes specific cache shall only support in M-mode by Rick Chen · Tue Apr 02 15:56:42 2019 +0800
  61. 14a1075 riscv: ax25: Add platform-specific Kconfig options by Rick Chen · Tue Apr 02 15:56:41 2019 +0800
  62. 7376677 riscv: Add a SYSCON driver for Andestech's PLMT by Rick Chen · Tue Apr 02 15:56:40 2019 +0800
  63. 6df4ed0 riscv: Add a SYSCON driver for Andestech's PLIC by Rick Chen · Tue Apr 02 15:56:39 2019 +0800
  64. cddde09 riscv: hang if relocation of secondary harts fails by Lukas Auer · Sun Mar 17 19:28:40 2019 +0100
  65. 9ebf294 riscv: do not rely on hart ID passed by previous boot stage by Lukas Auer · Sun Mar 17 19:28:39 2019 +0100
  66. c4a6c8f riscv: boot images passed to bootm on all harts by Lukas Auer · Sun Mar 17 19:28:38 2019 +0100
  67. a359665 riscv: add support for multi-hart systems by Lukas Auer · Sun Mar 17 19:28:37 2019 +0100
  68. 8de4b3e riscv: save hart ID in register tp instead of s0 by Lukas Auer · Sun Mar 17 19:28:36 2019 +0100
  69. 01558e2 riscv: delay initialization of caches and debug UART by Lukas Auer · Sun Mar 17 19:28:35 2019 +0100
  70. e79178b riscv: implement IPI platform functions using SBI by Lukas Auer · Sun Mar 17 19:28:34 2019 +0100
  71. 9c03845 riscv: import the supervisor binary interface header file by Lukas Auer · Sun Mar 17 19:28:33 2019 +0100
  72. 83d573d riscv: add infrastructure for calling functions on other harts by Lukas Auer · Sun Mar 17 19:28:32 2019 +0100
  73. 818d49a riscv: Enable CONFIG_SYS_BOOT_RAMDISK_HIGH for using initrd by Anup Patel · Mon Feb 25 08:15:33 2019 +0000
  74. 7a167f2 riscv: Add SiFive FU540 board support by Anup Patel · Mon Feb 25 08:15:19 2019 +0000
  75. 0bbe9cf riscv: generic: Ensure that U-Boot runs within 4GB for 64bit systems by Anup Patel · Mon Feb 25 08:14:30 2019 +0000
  76. 6f07f45 riscv: Add place-holder asm/arch/clk.h for driver compilation by Anup Patel · Mon Feb 25 08:14:24 2019 +0000
  77. 928452a riscv: Add asm/dma-mapping.h for DMA mappings by Anup Patel · Mon Feb 25 08:14:17 2019 +0000
  78. 1240cd6 riscv: Rename cpu/qemu to cpu/generic by Anup Patel · Mon Feb 25 08:14:10 2019 +0000
  79. bf12fe9 riscv: qemu: define standalone load address by Lukas Auer · Fri Jan 04 01:37:34 2019 +0100
  80. d4e2417 riscv: remove RISC-V standalone linker script by Lukas Auer · Fri Jan 04 01:37:31 2019 +0100
  81. 09dfc3c riscv: use invalidate/flush_*cache_range functions in cache.c by Lukas Auer · Fri Jan 04 01:37:30 2019 +0100
  82. 6280e32 riscv: move the AX25-specific implementation of flush_dcache_all by Lukas Auer · Fri Jan 04 01:37:29 2019 +0100
  83. 8318e89 riscv: clarify error message on undefined exceptions by Lukas Auer · Fri Jan 04 01:37:28 2019 +0100
  84. e63488f riscv: bootm: Support booting VxWorks by Bin Meng · Fri Dec 21 07:13:41 2018 -0800
  85. f331b9b riscv: Remove ae350.dts by Bin Meng · Wed Dec 12 06:12:47 2018 -0800
  86. fda01b6 riscv: bootm: Change to use boot_hart from global data by Bin Meng · Wed Dec 12 06:12:46 2018 -0800
  87. 89681a7 riscv: Save boot hart id to the global data by Bin Meng · Wed Dec 12 06:12:45 2018 -0800
  88. bcc6c74 riscv: Adjust the _exit_trap() position to come before handle_trap() by Bin Meng · Wed Dec 12 06:12:44 2018 -0800
  89. 1f46f6d riscv: Return to previous privilege level after trap handling by Bin Meng · Wed Dec 12 06:12:43 2018 -0800
  90. ea95452 riscv: Fix context restore before returning from trap handler by Bin Meng · Wed Dec 12 06:12:42 2018 -0800
  91. 2e128a7 riscv: Move trap handler codes to mtrap.S by Bin Meng · Wed Dec 12 06:12:41 2018 -0800
  92. a7544ed riscv: Do some basic architecture level cpu initialization by Bin Meng · Wed Dec 12 06:12:40 2018 -0800
  93. 9e9e6fe riscv: Add indirect stringification to csr_xxx ops by Bin Meng · Wed Dec 12 06:12:39 2018 -0800
  94. edfe9a9 riscv: Update supports_extension() to use desc from cpu driver by Bin Meng · Wed Dec 12 06:12:38 2018 -0800
  95. 731e2d4 riscv: Add exception codes for xcause register by Bin Meng · Wed Dec 12 06:12:37 2018 -0800
  96. ea5086b riscv: Add CSR numbers by Bin Meng · Wed Dec 12 06:12:36 2018 -0800
  97. 2caa1ee riscv: Remove non-DM version of print_cpuinfo() by Bin Meng · Wed Dec 12 06:12:35 2018 -0800
  98. 7a3bbfb riscv: Probe cpus during boot by Bin Meng · Wed Dec 12 06:12:34 2018 -0800
  99. dada2d1 riscv: Enlarge the default SYS_MALLOC_F_LEN by Bin Meng · Wed Dec 12 06:12:33 2018 -0800
  100. 8fa4478 riscv: qemu: Add platform-specific Kconfig options by Bin Meng · Wed Dec 12 06:12:32 2018 -0800