| commit | 731e2d4e8ca8c2148e5752941640ed4e5f3997f0 | [log] [tgz] |
|---|---|---|
| author | Bin Meng <bmeng.cn@gmail.com> | Wed Dec 12 06:12:37 2018 -0800 |
| committer | Andes <uboot@andestech.com> | Tue Dec 18 09:56:27 2018 +0800 |
| tree | 4a1a5d03f2c44920b250cf9f3b1ad826f3634d8d | |
| parent | ea5086bb45c2f7af3e1040f9a032d002e88f2b9f [diff] |
riscv: Add exception codes for xcause register This adds all exception codes in encoding.h. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Anup Patel <anup@brainfault.org>