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git01.mediatek.com / filogic / uboot / a4ee69438d7c47c70b3ec3739f9c604cbaa6c34d / drivers / clk
  1. 63630a7 Merge branch 'next' by Tom Rini · Mon Oct 07 09:06:49 2024 -0600
  2. 1f528fd clk: renesas: rcar-gen3: Fix SSCG caching replacement with MDSEL/PE caching by Marek Vasut · Sat Oct 05 19:45:02 2024 +0200
  3. a17233d clk/qcom: sm8250: add debug data by Caleb Connolly · Mon Aug 19 21:34:20 2024 +0200
  4. 591a963 clk/qcom: sm6115: add debug data by Caleb Connolly · Mon Aug 19 21:34:19 2024 +0200
  5. 0ae54d8 clk/qcom: sdm845: add dump data by Caleb Connolly · Mon Aug 19 21:34:18 2024 +0200
  6. 86d2839 clk/qcom: implement clk dump by Caleb Connolly · Mon Aug 19 21:34:17 2024 +0200
  7. 9930fca clk: qcom: add driver for SM8150 SoC by Julius Lehmann · Wed Sep 11 19:13:09 2024 +0200
  8. 38f0459 Merge tag 'v2024.10-rc5' into next by Tom Rini · Mon Sep 16 14:48:13 2024 -0600
  9. 80bf1f7 clk: sophgo: cv1800b: Add clock controller driver for cv1800b SoC by Kongyang Liu · Tue Jun 11 17:41:14 2024 +0800
  10. 77d8dc6 clk: sifive: avoid declaring static variables in includes by Heinrich Schuchardt · Sat Feb 17 00:18:04 2024 +0100
  11. 1c46665 clk: sifive: append missing \n to messages by Heinrich Schuchardt · Fri Feb 16 17:35:35 2024 +0100
  12. d3114b3 clk/qcom: add initial clock driver for sc7280 by Caleb Connolly · Wed Aug 21 15:41:46 2024 +0200
  13. b711ef7 global_data: Drop spl_handoff by Simon Glass · Wed Aug 21 10:19:13 2024 -0600
  14. 8ae30e5 global_data: Move pci_clk to m68k and powerpc by Simon Glass · Wed Aug 21 10:18:53 2024 -0600
  15. 6076b74 Merge tag 'v2024.10-rc3' into next by Tom Rini · Mon Aug 19 18:24:58 2024 -0600
  16. 90e8302 Merge patch series "clk: mediatek: mt7622: clk migration for OF_UPSTREAM" by Tom Rini · Mon Aug 19 16:15:47 2024 -0600
  17. 24f10ca clk: mediatek: mt7622: add missing clock PERIBUS_SEL clock by Christian Marangi · Sat Aug 03 10:43:25 2024 +0200
  18. 66b75e4 clk: mediatek: mt7622: add missing clock PERI_UART4_PD by Christian Marangi · Sat Aug 03 10:43:24 2024 +0200
  19. 10bf15f clk: mediatek: mt7622: add missing clock MUX1_SEL by Christian Marangi · Sat Aug 03 10:43:23 2024 +0200
  20. 5ef8a21 clk: mediatek: mt7622: add missing clock define for MAIN_CORE_EN by Christian Marangi · Sat Aug 03 10:43:22 2024 +0200
  21. 614ae87 clk: mediatek: mt7622: move INFRA_TRNG to the bottom by Christian Marangi · Sat Aug 03 10:43:21 2024 +0200
  22. 20cefbc clk: mediatek: mt7622: fix broken peri_cgs clk with XTAL parents by Christian Marangi · Sat Aug 03 10:43:19 2024 +0200
  23. 15e3742 Merge patch series "clk: mediatek: mt7986: clk migration for OF_UPSTREAM" by Tom Rini · Mon Aug 19 16:15:13 2024 -0600
  24. 07603e4 clk: mediatek: mt7986: rename CK to CLK by Christian Marangi · Sat Aug 03 10:40:48 2024 +0200
  25. bf79ce0 clk: mediatek: mt7986: convert to unified infracfg gates + muxes by Christian Marangi · Sat Aug 03 10:40:47 2024 +0200
  26. 61c9220 clk: mediatek: mt7986: replace infracfg ID with upstream linux by Christian Marangi · Sat Aug 03 10:40:46 2024 +0200
  27. 6698b4d clk: mediatek: mt7986: move INFRA_TRNG_CK to the bottom of the list by Christian Marangi · Sat Aug 03 10:40:45 2024 +0200
  28. efc33e4 clk: mediatek: mt7986: comment out CK_TOP_A_TUNER as not used by Christian Marangi · Sat Aug 03 10:40:44 2024 +0200
  29. 0fc50e7 clk: mediatek: mt7986: drop 1/1 spurious factor for topckgen by Christian Marangi · Sat Aug 03 10:40:43 2024 +0200
  30. 83b17ec clk: mediatek: mt7986: reorder TOPCKGEN factor ID by Christian Marangi · Sat Aug 03 10:40:42 2024 +0200
  31. 9276f07 clk: mediatek: mt7986: rename TOPCKGEN factor clock to upstream naming by Christian Marangi · Sat Aug 03 10:40:41 2024 +0200
  32. 30c4b86 clk: mediatek: mt7986: fix typo for infra_i2c0_ck by Christian Marangi · Sat Aug 03 10:40:40 2024 +0200
  33. 6a89a38 clk: mediatek: mt7986: add missing entry for IPCIE_PIPE_CK infra gate by Christian Marangi · Sat Aug 03 10:40:39 2024 +0200
  34. ab4de13 clk: mediatek: mt7986: drop 1/1 infracfg spurious factor by Christian Marangi · Sat Aug 03 10:40:38 2024 +0200
  35. 76052a2 clk: mediatek: mt7986: fix wrong parent for INFRA_ADC_26M_CK by Christian Marangi · Sat Aug 03 10:40:37 2024 +0200
  36. 7739a5f clk: mediatek: mt7986: rename 66M_MCK to SYSAXI_D2 by Christian Marangi · Sat Aug 03 10:40:36 2024 +0200
  37. 0178c61 clk: mediatek: mt7986: rename CB_CKSQ_40M to TOP_XTAL by Christian Marangi · Sat Aug 03 10:40:35 2024 +0200
  38. d349194 clk: mediatek: mt7986: fix wrong shift for PCIe clocks by Christian Marangi · Sat Aug 03 10:40:34 2024 +0200
  39. c7e9c37 Merge patch series "clk: mediatek: mt7988: clk migration for OF_UPSTREAM" by Tom Rini · Mon Aug 19 16:14:29 2024 -0600
  40. e4bfc44 clk: mediatek: mt7988: rename CK to CLK by Christian Marangi · Sat Aug 03 10:33:02 2024 +0200
  41. 826afb7 clk: mediatek: mt7988: convert to unified infracfg gates + muxes by Christian Marangi · Sat Aug 03 10:33:01 2024 +0200
  42. 54894b3 clk: mediatek: mt7988: replace clock ID with upstream linux by Christian Marangi · Sat Aug 03 10:33:00 2024 +0200
  43. dee002c clk: mediatek: mt7988: comment out infracfg clk not defined by Christian Marangi · Sat Aug 03 10:32:59 2024 +0200
  44. 245c850 clk: mediatek: mt7988: drop 1/1 spurious factor for topckgen by Christian Marangi · Sat Aug 03 10:32:58 2024 +0200
  45. ecf47ee clk: mediatek: mt7988: reorder TOPCKGEN factor ID by Christian Marangi · Sat Aug 03 10:32:57 2024 +0200
  46. 532f979 clk: mediatek: mt7988: rename TOPCKGEN factor clock to upstream naming by Christian Marangi · Sat Aug 03 10:32:56 2024 +0200
  47. d1f073e clk: mediatek: mt7988: drop 1/1 infracfg spurious factor by Christian Marangi · Sat Aug 03 10:32:55 2024 +0200
  48. 70bc4e4 clk: mediatek: mt7988: fix wrong parent for INFRA_PCIE_PERI_26M_CK_P2 by Christian Marangi · Sat Aug 03 10:32:54 2024 +0200
  49. 82a4ce2 clk: mediatek: mt7988: move INFRA_PCIE_PERI_26M_CK_Px clock at top by Christian Marangi · Sat Aug 03 10:32:53 2024 +0200
  50. fb43efd clk: mediatek: mt7988: rename TOP_CK_NPU_SEL_CM_TOPS_SEL to TOP_NPU_SEL by Christian Marangi · Sat Aug 03 10:32:52 2024 +0200
  51. 6db498a clk: mediatek: mt7988: rename TOP_DA_SELM_XTAL_SEL to TOP_DA_SEL by Christian Marangi · Sat Aug 03 10:32:51 2024 +0200
  52. 2861be6 clk: mediatek: mt7988: rename CB_CKSQ_40M to TOP_XTAL by Christian Marangi · Sat Aug 03 10:32:50 2024 +0200
  53. a662e1e Merge patch series "clk: mediatek: mt7981: clk migration for OF_UPSTREAM" by Tom Rini · Mon Aug 19 16:13:51 2024 -0600
  54. f245164 clk: mediatek: mt7981: rename CK to CLK by Christian Marangi · Fri Aug 02 15:53:15 2024 +0200
  55. 9435d81 clk: mediatek: mt7981: convert to unified infracfg gates + muxes by Christian Marangi · Fri Aug 02 15:53:14 2024 +0200
  56. 8199eeb clk: mediatek: mt7981: fix support for pwm3 clock by Christian Marangi · Fri Aug 02 15:53:13 2024 +0200
  57. 8247bfd clk: mediatek: mt7981: replace infracfg ID with upstream linux by Christian Marangi · Fri Aug 02 15:53:12 2024 +0200
  58. bc63482 clk: mediatek: mt7981: drop 1/1 spurious factor by Christian Marangi · Fri Aug 02 15:53:11 2024 +0200
  59. be9dbee clk: mediatek: mt7981: implement sgmii0/1 clock by Christian Marangi · Fri Aug 02 15:53:10 2024 +0200
  60. 52726b5 clk: mediatek: mt7981: fix wrong parent list for INFRA_PWM1_SEL mux by Christian Marangi · Fri Aug 02 15:53:09 2024 +0200
  61. f8117ac clk: mediatek: mt7981: fix wrong parent for TOP_FAUD clock by Christian Marangi · Fri Aug 02 15:53:08 2024 +0200
  62. 046faee clk: mediatek: mt7981: fix wrong mux width for pwm2 and pwm1 clock by Christian Marangi · Fri Aug 02 15:53:04 2024 +0200
  63. 4fd1445 clk: mediatek: mt7981: fix typo for infra_i2c0_ck by Christian Marangi · Fri Aug 02 15:53:03 2024 +0200
  64. 14077e7 clk: mediatek: mt7981: add missing clock for infra_ipcie_pipe by Christian Marangi · Fri Aug 02 15:53:02 2024 +0200
  65. 7f9cceb clk: mediatek: mt7623: remap peri clock ID and add MUX by Christian Marangi · Fri Aug 02 15:45:05 2024 +0200
  66. b6ea620 clk: mediatek: mt7623: remap apmixedsys clock ID by Christian Marangi · Fri Aug 02 15:45:04 2024 +0200
  67. e80ebc8 clk: mediatek: mt7623: define id_offs_map and import clk ID from upstream by Christian Marangi · Fri Aug 02 15:45:03 2024 +0200
  68. 326ab20 clk: mediatek: mt7623: split clk tree to dedicated topckgen and apmixed by Christian Marangi · Fri Aug 02 15:45:02 2024 +0200
  69. 87b96c3 clk: mediatek: mt7623: fix broken peri_cgs clk with XTAL parents by Christian Marangi · Fri Aug 02 15:45:01 2024 +0200
  70. fb05644 clk: zynqmp: Add set_rate support for display clocks by Venkatesh Yadav Abbarapu · Thu Jul 11 13:59:39 2024 +0530
  71. 04a0643 clk: imx8m: register ARM A53 core clock by Hou Zhiqiang · Thu Aug 01 11:59:46 2024 +0800
  72. f84d65c clk: clk-uclass: Print clk name in clk_enable/clk_disable by Michael Trimarchi · Tue Jul 09 08:28:13 2024 +0200
  73. 46bba6e clk: Fix error message in clk_get_bulk by Jan Kiszka · Sat Mar 09 13:27:09 2024 +0100
  74. a4a0c6e Merge patch series "clk: mediatek: add OPs to support OF_UPSTREAM" by Tom Rini · Thu Aug 01 15:32:54 2024 -0600
  75. 3c2ae7d clk: mediatek: add support for APMIXED parent in infra MUX by Christian Marangi · Fri Jun 28 19:40:57 2024 +0200
  76. 475d00f clk: mediatek: add support for GATEs for APMIXED OPs by Christian Marangi · Fri Jun 28 19:40:56 2024 +0200
  77. c05ebe6 clk: mediatek: implement MUX_FLAGS and MUX_MIXED_FLAGS macro by Christian Marangi · Fri Jun 28 19:40:55 2024 +0200
  78. 29771ad clk: mediatek: add support for remapping clock ID by Christian Marangi · Fri Jun 28 19:40:54 2024 +0200
  79. e03d080 clk: mediatek: provide common clk init function for infrasys by Christian Marangi · Fri Jun 28 19:40:53 2024 +0200
  80. 56dc7cd clk: mediatek: add support for gate clock to reference topckgen clock by Christian Marangi · Fri Jun 28 19:40:52 2024 +0200
  81. 1bde149 clk: mediatek: add support for parent mux from different source for topckgen by Christian Marangi · Fri Jun 28 19:40:51 2024 +0200
  82. a4143eb clk: mediatek: add support for parent mux from different source by Christian Marangi · Fri Jun 28 19:40:50 2024 +0200
  83. 8f5b30c clk: mediatek: add support for gate ID at offset by Christian Marangi · Fri Jun 28 19:40:49 2024 +0200
  84. baa244c clk: mediatek: add support for gates in clk_tree for infrasys by Christian Marangi · Fri Jun 28 19:40:48 2024 +0200
  85. 358415a clk: mediatek: return XTAL rate for infrasys get_mux_rate by Christian Marangi · Fri Jun 28 19:40:47 2024 +0200
  86. 16f5f3f clk: mediatek: return XTAL rate directly for gates with XTAL parent by Christian Marangi · Fri Jun 28 19:40:46 2024 +0200
  87. 5690c25 Merge branch 'qcom-main' of https://gitlab.denx.de/u-boot/custodians/u-boot-snapdragon by Tom Rini · Thu Jul 25 18:04:16 2024 -0600
  88. d6b748e clock: qcom: ipq4019: add missing networking resets by Robert Marko · Mon Jun 03 14:06:14 2024 +0200
  89. bbb5483 clock: qcom: ipq4019: add ESS clock by Robert Marko · Mon Jun 03 14:06:12 2024 +0200
  90. 127dc6c Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-samsung by Tom Rini · Thu Jul 25 09:14:29 2024 -0600
  91. 040f068 clk: exynos: Add SSS clocks for Exynos850 by Sam Protsenko · Tue Jul 23 13:14:37 2024 -0500
  92. cd506ef Merge tag 'u-boot-imx-master-20240722' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx by Tom Rini · Mon Jul 22 17:56:14 2024 -0600
  93. 907d1c4 clk: imx6q: Add definition for IMX6QDL_CLK_PWM1 by Emil Kronborg · Mon Jul 22 13:14:58 2024 -0300
  94. 55f528f clk: imx6q: Add definition for IMX6QDL_CLK_I2C3 by Emil Kronborg · Fri Jul 12 14:19:10 2024 +0000
  95. f9b6d17 clk: imx8mp: Make parent names arrays const pointers by Michael Trimarchi · Sun Jul 07 10:20:01 2024 +0200
  96. 0e9e169 clk: imx8mm: Make parent names arrays const pointers by Michael Trimarchi · Sun Jul 07 10:20:00 2024 +0200
  97. a5e8304 clk: imx8mn: Make parent names arrays const pointers by Michael Trimarchi · Sun Jul 07 10:19:59 2024 +0200
  98. 2468583 clk: imx: clk-imx8mn Fix nand and spi clock parent by Michael Trimarchi · Sun Jul 07 10:19:58 2024 +0200
  99. 94dce2f drivers: clk: Remove duplicate newlines by Marek Vasut · Sat Jul 20 14:40:30 2024 +0200
  100. f373002 clk: sunxi: add EMAC and EPHY clocks and resets for the V3s SoC by Michael Walle · Mon May 13 22:56:08 2024 +0200