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901301c4c1afb12ab045ab53f1b4554a54505ac4
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arch
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x86
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dts
ba63457
x86: galileo: Enable CPU driver
by Bin Meng
· Sun May 22 01:45:30 2016 -0700
ae86455
x86: Use latest microcode for all BayTrail boards
by Bin Meng
· Mon May 23 15:25:20 2016 +0800
ef348a7
x86: baytrail: Update to latest microcode
by Bin Meng
· Sun May 22 01:45:28 2016 -0700
0651f62
x86: dts: Update to include ACTL register details
by Bin Meng
· Sat May 07 07:46:15 2016 -0700
2a0b94c
x86: Add congatec conga-QA3/E3845-4G (Bay Trail) support
by Stefan Roese
· Wed Mar 16 08:48:21 2016 +0100
a0b0961
x86: Add support for the samus chromebook
by Simon Glass
· Wed Mar 16 07:44:43 2016 -0600
40ce12b
x86: dts: Drop memory SPD compatible string
by Simon Glass
· Wed Mar 16 07:44:39 2016 -0600
7be7f3e
x86: link: Add pin configuration to the device tree
by Simon Glass
· Fri Mar 11 22:07:12 2016 -0700
77f8292
x86: broadwell: Add a few microcode files
by Simon Glass
· Sun Mar 06 19:28:34 2016 -0700
ed5652c
x86: dts: link: Add board ID GPIOs
by Simon Glass
· Sun Mar 06 19:28:12 2016 -0700
d7729f8
x86: dts: link: Move SPD info into the memory controller
by Simon Glass
· Sun Mar 06 19:28:11 2016 -0700
8a307ee
x86: link: Add required GPIO properties
by Simon Glass
· Sun Mar 06 19:28:10 2016 -0700
5afa22a
x86: Add Intel Cougar Canyon 2 board
by Bin Meng
· Wed Feb 17 00:16:25 2016 -0800
95bae0d
x86: minnowmax: Drop io-base property in the pch_pinctrl node
by Bin Meng
· Mon Feb 01 01:40:49 2016 -0800
6e916cc
x86: ich6_gpio: Convert to use proper DM API
by Bin Meng
· Mon Feb 01 01:40:47 2016 -0800
d940667
spi: ich: Use compatible strings to distinguish controller version
by Bin Meng
· Mon Feb 01 01:40:37 2016 -0800
4f8d4e9
x86: Correct spi node alias
by Bin Meng
· Wed Jan 27 00:56:34 2016 -0800
a75abeb
x86: ivybridge: Use syscon for the GMA device
by Simon Glass
· Sun Jan 17 16:11:59 2016 -0700
74a9e6a
x86: ivybridge: Drop special EHCI init
by Simon Glass
· Sun Jan 17 16:11:55 2016 -0700
37a91ff
x86: ivybridge: Convert SDRAM init to use driver model
by Simon Glass
· Sun Jan 17 16:11:50 2016 -0700
9afcd96
x86: ivybridge: Use the I2C driver to perform SMbus init
by Simon Glass
· Sun Jan 17 16:11:45 2016 -0700
582075c
x86: ivybridge: Drop the special PCI driver
by Simon Glass
· Sun Jan 17 16:11:41 2016 -0700
5cc400b
x86: ivybridge: Do the SATA init before relocation
by Simon Glass
· Sun Jan 17 16:11:35 2016 -0700
b4974c4
x86: ivybridge: Use common CPU init code
by Simon Glass
· Sun Jan 17 16:11:23 2016 -0700
061e9ea
x86: ivybridge: Add a driver for the bd82x6x northbridge
by Simon Glass
· Sun Jan 17 16:11:15 2016 -0700
62b3717
x86: ivybridge: Move lpc_early_init() to probe()
by Simon Glass
· Sun Jan 17 16:11:11 2016 -0700
044f1a0
x86: ivybridge: Set up the LPC device using driver model
by Simon Glass
· Sun Jan 17 16:11:10 2016 -0700
5ce1af5
dm: x86: queensbay: Add an interrupt driver
by Simon Glass
· Tue Jan 19 21:32:31 2016 -0700
1a44e88
dm: x86: quark: Add an interrupt driver
by Simon Glass
· Tue Jan 19 21:32:30 2016 -0700
3276163
dm: x86: spi: Convert ICH SPI driver to driver model PCI API
by Simon Glass
· Mon Jan 18 20:19:21 2016 -0700
715b129
x86: qemu: remove cpu node in device tree
by Miao Yan
· Thu Jan 07 01:32:05 2016 -0800
4336af6
x86: qemu: add a cpu uclass driver for qemu target
by Miao Yan
· Thu Jan 07 01:32:01 2016 -0800
e05c67e
x86: ivybridge: Add microcode blobs for all the steppings
by Bin Meng
· Fri Dec 11 02:55:47 2015 -0800
20e9e16
x86: Fix PCI UART compatible string for crownbay and galileo
by Bin Meng
· Mon Dec 07 05:28:13 2015 -0800
38de020
x86: Convert to use driver model timer
by Bin Meng
· Fri Nov 13 00:11:22 2015 -0800
b0245de
ns16550: unify serial_x86
by Thomas Chou
· Thu Nov 19 21:48:06 2015 +0800
7ca7374
x86: qemu: Convert to use driver model keyboard
by Bin Meng
· Thu Nov 12 05:33:06 2015 -0800
50704d3
x86: crownbay: Convert to use driver model keyboard
by Bin Meng
· Thu Nov 12 05:33:05 2015 -0800
3356cad
x86: Add an i8042 device for boards that have it
by Simon Glass
· Wed Nov 11 10:05:43 2015 -0700
0cab3ec
Various Makefiles: Add SPDX-License-Identifier tags
by Tom Rini
· Tue Nov 10 01:06:16 2015 +0000
a4dd9bf
x86: Add support for Advantech SOM-6896
by George McCollister
· Wed Oct 21 08:05:33 2015 -0500
8331aa0
x86: galileo: Enable mrc cache
by Bin Meng
· Mon Oct 12 01:30:43 2015 -0700
84dd04f
x86: Remove unused rw-mrc-cache properties in the link and panther dts files
by Bin Meng
· Sun Oct 11 21:37:46 2015 -0700
9582ad5
x86: Enable mrc cache for bayleybay and minnowmax
by Bin Meng
· Sun Oct 11 21:37:44 2015 -0700
9c12432
x86: galileo: Add PCIe root port IRQ routing
by Bin Meng
· Wed Sep 09 23:20:28 2015 -0700
51395ba
x86: Convert to use driver model pci on quark/galileo
by Bin Meng
· Thu Sep 03 05:37:26 2015 -0700
a1a969e
x86: panther: Add PCI and video configuration
by Simon Glass
· Thu Aug 27 19:54:48 2015 -0600
1132853
exynos: x86: dts: Add tpm nodes to the device tree for Chrome OS devices
by Simon Glass
· Sat Aug 22 18:31:37 2015 -0600
4521a6c
x86: crownbay: Support Topcliff integrated pci uart devices with driver model
by Bin Meng
· Mon Aug 24 01:14:03 2015 -0700
a2f61ba
x86: crownbay: Enable on-board SMSC superio keyboard controller
by Bin Meng
· Mon Aug 24 01:00:08 2015 -0700
bcab137
x86: minnowmax: Correct pad-offset value for host_en1
by Simon Glass
· Sat Aug 22 15:58:56 2015 -0600
1b46485
x86: minnowmax: Add access to GPIOs E0, E1, E2
by Simon Glass
· Sat Aug 22 15:58:53 2015 -0600
35dffd5
x86: baytrail: Support multiple microcode copies
by Bin Meng
· Sat Aug 15 14:37:50 2015 -0600
dddf6fd
x86: baytrail: Add microcode for BayTrail-I D0 stepping
by Bin Meng
· Sat Aug 15 14:37:49 2015 -0600
7133c39
x86: minnowmax: Define and enable interrupt setup
by Simon Glass
· Thu Aug 13 10:36:16 2015 -0600
74fdb58
x86: baytrail: Configure FSP UPD from device tree
by Andrew Bradford
· Fri Aug 07 08:36:35 2015 -0400
8aea77a
x86: dts: Add a device tree file for EFI
by Simon Glass
· Tue Aug 04 12:33:48 2015 -0600
947391c
x86: bayleybay: Configure PCI IRQ
by Bin Meng
· Thu Jul 30 03:49:18 2015 -0700
e1c4935
x86: Add Intel Bayley Bay board support
by Bin Meng
· Thu Jul 30 03:49:17 2015 -0700
6a3de7c
x86: Add microcode for BayTrail-I B0 stepping
by Bin Meng
· Thu Jul 30 03:49:16 2015 -0700
6647f57
x86: qemu: Add MP initialization
by Bin Meng
· Mon Jul 27 19:16:08 2015 +0800
354dcdd
x86: qemu: Enable writing MP table
by Bin Meng
· Wed Jul 22 01:21:13 2015 -0700
d0e9373
x86: Convert to use driver model pci on queensbay/crownbay
by Bin Meng
· Sun Jul 19 00:20:07 2015 +0800
770fd33
x86: Enable DM RTC support for all x86 boards
by Bin Meng
· Wed Jul 15 16:23:39 2015 +0800
0e87edc
dm: x86: minnowmax: Move PCI to use driver model
by Simon Glass
· Fri Jul 03 18:28:26 2015 -0600
d2f66a3
x86: queensbay: Change PCIe root ports' interrupt routing
by Bin Meng
· Tue Jun 23 12:18:55 2015 +0800
c9d0525
x86: queensbay: Correct Topcliff device irqs
by Bin Meng
· Tue Jun 23 12:18:44 2015 +0800
8800c41
x86: crownbay: Enable DM RTC support
by Bin Meng
· Tue Jun 23 12:18:43 2015 +0800
3916df5
x86: crownbay: Add MP initialization
by Bin Meng
· Wed Jun 17 11:15:39 2015 +0800
f813548
x86: gpio: add pinctrl support from the device tree
by Gabriel Huau
· Mon May 25 22:27:37 2015 -0700
ef37e7b
x86: qemu: Implement PIRQ routing
by Bin Meng
· Wed Jun 03 09:20:06 2015 +0800
70be096
x86: coreboot: Control I/O port 0xb2 writing via device tree
by Bin Meng
· Wed Jun 03 09:20:05 2015 +0800
000883b
x86: qemu: Create separate i440fx and q35 device trees
by Bin Meng
· Wed Jun 03 09:20:04 2015 +0800
ef9e9f9
x86: quark: Implement PIRQ routing
by Bin Meng
· Mon May 25 22:35:06 2015 +0800
51c3b1e
x86: Refactor PIRQ routing support
by Bin Meng
· Mon May 25 22:35:04 2015 +0800
2229c4c
x86: Support QEMU x86 targets
by Bin Meng
· Thu May 07 21:34:08 2015 +0800
1eaaf6c
x86: Enable multi-core init for Minnowboard MAX
by Simon Glass
· Wed Apr 29 22:26:03 2015 -0600
9278471
x86: link: Add PCH driver to support SPI Flash
by Simon Glass
· Mon Apr 20 07:07:03 2015 -0600
07ea9da
x86: minnowmax: use the correct NOR in the configuration
by Gabriel Huau
· Sat Apr 25 08:13:11 2015 -0700
6d2466c
x86: minnowmax: add GPIO banks in the device tree
by Gabriel Huau
· Sat Apr 25 13:16:57 2015 -0700
60ccd37
x86: Add alias for SPI node in the board dts
by Bin Meng
· Wed Apr 15 12:00:11 2015 +0800
06e694f
x86: chromebook_link: dts: Add PCH and LPC devices
by Simon Glass
· Thu Mar 26 09:29:29 2015 -0600
e0e7b36
dm: x86: pci: Convert chromebook_link to use driver model for pci
by Simon Glass
· Thu Mar 05 12:25:33 2015 -0700
3da658a
dm: x86: pci: Convert coreboot to use driver model for pci
by Simon Glass
· Thu Mar 05 12:25:32 2015 -0700
5f8865f
x86: Add support for panther (Asus Chromebox)
by Simon Glass
· Mon Mar 02 12:40:54 2015 -0700
ba6faff
x86: Add SPI support to quark/galileo
by Bin Meng
· Wed Feb 04 16:26:12 2015 +0800
6af4d46
x86: galileo: Add GPIO support
by Bin Meng
· Wed Feb 04 16:26:10 2015 +0800
cdffd3b
x86: quark: Call MRC in dram_init()
by Bin Meng
· Thu Feb 05 23:42:28 2015 +0800
8d6ed12
x86: Add basic Intel Galileo board support
by Bin Meng
· Mon Feb 02 22:35:28 2015 +0800
4a56f10
x86: Add support for Intel Minnowboard Max
by Simon Glass
· Tue Jan 27 22:13:47 2015 -0700
7f9f6a9
x86: dts: Add SPI flash MRC details for chromebook_link
by Simon Glass
· Mon Jan 19 22:16:13 2015 -0700
c8921be
x86: Make chromebook_link the default board for coreboot
by Bin Meng
· Tue Jan 06 22:14:21 2015 +0800
9281eb5
x86: ivybridge: Update microcode early in boot
by Simon Glass
· Thu Jan 01 16:18:14 2015 -0700
37e4030
x86: crownbay: Add pci devices in the dts file
by Bin Meng
· Wed Dec 31 16:05:14 2014 +0800
b2cfbd6
x86: Use ePAPR defined properties for x86-uart
by Bin Meng
· Wed Dec 31 16:05:13 2014 +0800
aea05d8
x86: Clean up the board dts files
by Bin Meng
· Wed Dec 24 13:06:39 2014 +0800
82db36c
x86: Rename coreboot.dsti to serial.dtsi
by Bin Meng
· Wed Dec 24 13:06:38 2014 +0800
8776c30
x86: Remove alex.dts in arch/x86/dts
by Bin Meng
· Wed Dec 24 13:06:37 2014 +0800
7bb2c3c
x86: Rename coreboot-serial to x86-serial
by Bin Meng
· Wed Dec 17 15:50:47 2014 +0800
8bfe066
x86: Convert microcode format to device-tree-only
by Simon Glass
· Wed Dec 17 15:50:37 2014 +0800
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