commit | 9c12432f51db7cec80fef89fd3d1825e68a65872 | [log] [tgz] |
---|---|---|
author | Bin Meng <bmeng.cn@gmail.com> | Wed Sep 09 23:20:28 2015 -0700 |
committer | Simon Glass <sjg@chromium.org> | Wed Sep 16 19:53:53 2015 -0600 |
tree | da3aae3084ca4a484534ec3ca15edc98eaf62d1c | |
parent | 8f578dbe96d5affe4e3d85197f0ff46e349a4c47 [diff] |
x86: galileo: Add PCIe root port IRQ routing Now we have enabled PCIe root port on Quark SoC, add its PIRQ routing information in the device tree as well. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>