tree da3aae3084ca4a484534ec3ca15edc98eaf62d1c
parent 8f578dbe96d5affe4e3d85197f0ff46e349a4c47
author Bin Meng <bmeng.cn@gmail.com> 1441866028 -0700
committer Simon Glass <sjg@chromium.org> 1442454833 -0600

x86: galileo: Add PCIe root port IRQ routing

Now we have enabled PCIe root port on Quark SoC, add its PIRQ
routing information in the device tree as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>